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PI6C2973-2FC [PERICOM]

PLL Based Clock Driver, 6C Series, 12 True Output(s), 0 Inverted Output(s), CMOS, PQFP52, LQFP-52;
PI6C2973-2FC
型号： PI6C2973-2FC
厂家： PERICOM SEMICONDUCTOR CORPORATION    PERICOM SEMICONDUCTOR CORPORATION
描述：

PLL Based Clock Driver, 6C Series, 12 True Output(s), 0 Inverted Output(s), CMOS, PQFP52, LQFP-52

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PI6C2973-2  
Low Voltage PLL Clock Driver  
Description  
Features  
• FullyIntegratedPLL  
ThePI6C2973-2isa3.3Vcompatible,PLLbasedclockdriverdevice  
targeted for high-performance CISC or RISC processor based sys-  
tems.Withoutputfrequenciesofupto125MHzandskewsof550ps  
thePI6C2973-2isideallysuitedformostsynchronoussystems.The  
device offers twelve low-skew outputs, plus a feedback and sync.  
output for added flexibility and ease of system implementation.  
ThePI6C2973-2offersaveryflexibleoutputenable/disablescheme.  
Note that all of the control inputs on the PI6C2973-2 have internal  
pull–up resistors.  
• Output Frequency up to 125 MHz  
• Compatible with PowerPC and Pentium Microprocessors  
• 3.3VV  
CC  
• ± 100ps Typical Cycle–to–Cycle Jitter  
• Availablepackaging:52-pinLQFP  
ThePI6C2973-2isfully3.3Vcompatibleandrequiresnoexternalloop  
filtercomponents.AllinputsacceptLVCMOS/LVTTLcompatible  
levelswhiletheoutputsprovideLVCMOSlevelswiththecapability  
todrive50Ohmtransmissionlines. Forseriesterminatedlineseach  
PI6C2973-2 output can drive two 50 Ohm lines in parallel thus  
effectively doubling the fanout of the device.  
PinConfiguration  
39 38 37 36 35 34 33 32 31 30 29 28 27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
fselFB1  
QSync  
GNDO  
Qc0  
fselb1  
fselb0  
fsela1  
fsela0  
Qa3  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
VCCO  
Qc1  
VCCO  
Qa2  
52-pin  
FC  
fselc0  
fselc1  
Qc2  
GNDO  
Qa1  
VCCO  
Qc3  
VCCO  
Qa0  
GND0  
NC  
GND0  
VCO_Sel  
1
2
3
4
5
6
7
8
9 10 11 12 13  
PS8623  
07/24/02  
1
PI6C2973-2  
LowVoltagePLLClockDriver  
BlockDiagram  
PECL_CLK  
PECL_CLK  
VC0_Sel  
PLL_En  
REF_Sel  
Qa0  
Q
D
0
1
Qa1  
Qa2  
Qa3  
Qb0  
Qb1  
Qb2  
Qb3  
0
1
TCLK0  
PHASE  
DETECTOR  
VCO  
TCLK1  
TCLK_Sel  
LPF  
Ext_FB  
Q
D
MR/OE  
Q
D
Qc0  
Qc1  
POWER-ON  
RESET  
÷4  
Q
Q
D
D
÷2, ÷4  
Qc2  
Qc3  
QFB  
÷2  
÷8  
2
2
fsela0:1  
fselb0:1  
2
3
Sync Pulse  
Data Generator  
fselc0:1  
fselFBO:2  
D
QSync  
Q
Inv_Clk (Internal Only)  
PS8623  
07/24/02  
2
PI6C2973-2  
LowVoltagePLLClockDriver  
FunctionTable1  
fsela1  
fsela0  
Qa  
fselb1  
fselb0  
Qb  
fselc1  
fselc0  
Qc  
0
0
1
1
0
1
0
1
NA  
NA  
÷4  
0
0
1
1
0
1
0
1
÷2  
NA  
÷4  
0
0
1
1
0
1
0
1
NA  
÷2  
NA  
NA  
NA  
NA  
FunctionTable2  
FunctionTable3  
fselFB2  
fselFB1  
fselFB0  
QFB  
Control Pin  
Logic '0'  
Logic '1'  
0
0
0
0
0
0
1
1
0
1
0
1
NA  
NA  
NA  
NA  
VCO_Sel  
Ref_Sel  
VCO/2  
TCLK  
VCO  
PECL  
TCLK_Sel  
PLL_En  
TCLK0  
TCLK1  
Bypass PLL  
Master Reset/Output Hi-Z  
Enable PLL  
Enable Outputs  
MR/OE  
1
1
1
1
0
0
1
1
0
1
0
1
NA  
NA  
÷8  
NA  
Timing Diagrams  
fVCO  
Qc  
Qa  
Sync  
PS8623  
07/24/02  
3
PI6C2973-2  
LowVoltagePLLClockDriver  
AbsoluteMaximumRatings  
Symbol  
Parameter  
Supply Voltage  
Input Voltage  
Min.  
–0.3  
–0.3  
Max.  
Units  
V
V
CC  
4.6  
V
I
V
+0.3  
V
DD  
I
Input Current  
±20  
125  
mA  
°C  
IN  
T
Storage Temperature  
–40  
STOR  
*Absolute maximum continuous ratings are those values beyond which damage to the device may occur.  
Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability.  
Functional operation under absolute-maximum-rated conditions is not implied.  
(4)  
DC Characteristics (T = 0°C to 70°C, V = 3.3V ± 5%)  
A
CC  
Symbol  
Conditions  
Characteristic  
Min.  
Typ.  
Max.  
3.6  
Units  
VIH  
Input HIGH Voltage  
Input LOW Voltage  
2.0  
V
VIL  
0.8  
Peak-to Peak Input Voltage  
PECL_CLK  
VPP  
300  
1000  
mV  
V
Common Mode Range  
PECL_CLK  
VCMR  
Note 1  
VCC–2.0  
2.4  
VCC–0.6  
VOH  
VOL  
IIN  
IOH = –20mA(2)  
IOL = 20mA(2)  
Note 3  
Output HIGH Voltage  
Output LOW Voltage  
0.5  
±120  
215  
20  
Input Current  
µΑ  
ICC  
Maximum Quiescent Supply Current  
Analog VCC Current  
190  
15  
mA  
ICCA  
CIN  
Cpd  
Input Capacitance  
4
pF  
Per Output  
Power Dissipation Capacitance  
25  
Notes:  
1. VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when  
the “High” input is within the VCMR range and the input lies within the VPP specification.  
2. Outputs can drive series or parallel terminated 50 Ohm (or 50 Ohm to VCC/2) transmission lines on the incident edge.  
3. Inputs have pull–up/pull–down resistors which affect input current.  
4. Special thermal handling may be required in some configurations.  
PS8623  
07/24/02  
4
PI6C2973-2  
LowVoltagePLLClockDriver  
PLL Input Reference Characteristic (T = 0°C to 70°C)  
A
Symbol  
Conditions  
Characteristics  
Min.  
Max.  
Units  
tr, tf  
fref  
TCLK Input Rise/Falls  
Reference Input Frequency  
Reference Input Duty Cycle  
3.0  
37.5  
75  
ns  
MHz  
%
frefDC  
25  
AC Characteristics (T = 0°C to 70°C, V = 3.3V ± 5%)  
A
CC  
Symbol  
tr, t  
Characteristics  
Conditions  
Min.  
0.15  
Typ.  
Max.  
Units  
Output Rise/Fall Time (Note7)  
Output Duty Cycle (Note7)  
0.8 to 2.0V  
1.2  
ns  
f
t
/2  
t
/2  
t
/2  
CYCLE  
+750  
CYCLE  
–750  
CYCLE  
±500  
t
pw  
TCLK0  
TCLK1  
PECL_CLK  
–600  
–600  
–350  
400  
400  
50  
Propagation Delay  
Notes 7, 8, QFB = ÷8  
ps  
t
pd  
t
Output-to-Output Skew  
VCO Lock Range  
Note 7  
550  
250  
os  
f
200  
VCO  
Maximum Output Frequency Q (÷2)  
125  
62.5  
MHz  
f
Q (÷4)  
Q (÷8)  
max  
31.25  
Note 7  
tjitter  
, t  
Cycle–to–Cycle Jitter (Peak–to–Peak)  
Output Disable Time  
±100  
ps  
ns  
t
2
2
8
PLZ PHZ  
t
,t  
Output ENable TIme  
10  
10  
PZL PZH  
t
Maximum PLL Lock Time  
ms  
lock  
Notes:  
7. 50 Ohm transmission line terminated into V /2  
CC  
8. tpd is specified for a 50 MHz input reference. The window will shrink/grow proportionally from the minimum limit with shorter/  
longer input reference periods. The tpd does not include jitter.  
PS8623  
07/24/02  
5
PI6C2973-2  
LowVoltagePLLClockDriver  
PackagingMechanical:52-PinLQFP  
12.00 BSC  
.472  
Square  
10.00 BSC  
.394  
0.09  
0.20  
Square  
.004  
.008  
GAUGE PLANE  
0
7
0.45  
0.75  
.018  
.030  
1.00 REF  
.039  
1.60  
.063  
Max.  
.004  
0.10  
Seating Plane  
1.35  
1.45  
0.05  
0.15  
0.65 BSC  
.026  
0.22  
0.38  
.009  
.015  
.053  
.057  
.002  
.006  
X.XX  
X.XX  
DENOTES DIMENSIONS  
IN MILLIMETERS  
OrderingInformation  
Part Number  
Packaging  
Operating Temperature  
PI6C2973-2FC  
52-pin LQFP  
Commercial  
Pericom Semiconductor Corporation  
2380BeringDrive • SanJose, CA95131•1-800-435-2336 • Fax(408)435-1100• http://www.pericom.com  
PS8623  
07/24/02  
6

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