PI6C490086LE [PERICOM]
PLL Clock Multiplier;型号: | PI6C490086LE |
厂家: | PERICOM SEMICONDUCTOR CORPORATION |
描述: | PLL Clock Multiplier 时钟 光电二极管 外围集成电路 晶体 |
文件: | 总5页 (文件大小:816K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PI6C490086
PLL Clock Multiplier
Features
Description
Î Support XTAL or Clock input at 25MHz
Î ree buffered outputs support VDD operation
Î One 8.192 MHz output
e PI6C490086 is a low jitter clock generator supporting
either XTAL or reference input. Two of its buffered outputs can
support wide operating voltage from 1.8V to 3.3V. It is a cost ef-
fective way to generate multiple outputs for all kinds of applica-
tions that need 25MHz with different power supplies and a 8.192
MHz clock signal.
Î Very low phase jitter(RMS), 25MHz : < 2ps
Î Very low additive jitter: <500fs (typ)
Î 3.3V supply voltage for Core
Î 1.8V ~ 3.3V supply voltage for two outputs
Î Packaging: 16-pin TSSOP
Î Commercial & Industrial Temperature support
Applications
Î Networking Systems
Î Femtocell BTS
Î Peripheral
Block Diagram
Pin Configuration (16-Pin TSSOP)
16
15
14
13
12
11
10
9
X1/ICLKIN
1
2
3
4
5
6
7
8
X2
V
V
DDO
V
DD
DDO8
V
GND
DD
GND
V
DD
CLK8
PLL
V
CLK1
CLK2
DD
CLK3
CLK2
CLK1
V
DDO8
CLK8
GND
OE#
V
DDO
X1/CLKIN
X2
Crystal
Oscillator
CLK3
GND
OE#
GND
16-pin (173 mil) TSSOP
www.pericom.com
PI6C490086
RevB
2/16/2012
12-0165
1
PI6C490086
PLL Clock Multiplier
Pin number
Pin Name
Type
Description
1
X1/CLKIN
VDD
Input
Crystal connection or clock input
3.3V Core and CLK1 supply voltage
Supply voltage for CLK8
8.192 MHz output
2, 4, 14
Power
Power
Output
Power
5
VDDO8
CLK8
6
7, 9, 15
GND
Connect to Ground
Global output enable when low. Internal pull-down
resistor.
8
OE#
Input
10
11
12
13
16
CLK3
VDDO
CLK2
CLK1
X2
Output
Power
Clock Output 3
Supply voltage from 1.8V to 3.3V for CLK2 and CLK3
Clock Output 2
Output
Output
Output
Clock Output 1
Crystal connection
Function Table
OE#
CLK1/CLK2/CLK3/CLK8
Enabled
0
1
Hi-Z, weak pull down
www.pericom.com
PI6C490086
RevB
2/16/2012
12-0165
2
PI6C490086
PLL Clock Multiplier
Maximum Ratings
(Above which useful life may be impaired. For user guidelines, not tested.)
Note: Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. is is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
Storage Temperature.......................................................... –65°C to +150°C
Supply Voltage to Ground Potential, VDD ........................–0.5V to +4.6V
Power Requirements(Over operating free-air temperature range)
Symbol
Parameter
Min.
3.135
1.71
Typ.
Max.
3.465
3.465
Units
V
Power Supply Voltage
3.3
VDD
Power Supply Voltage for outputs
Power supply current, no load
V
VDDO, VDDO8
20
mA
IDD
0
+70
+85
4
Ambient Operating Temperature
Power Supply Ramp Time
°C
TA
-40
ms
tUP
DC Electrical Characteristics
Symbol Parameter
Condition
CLKIN, OE#
CLKIN, OE#
Min.
Typ.
Max.
Units
Input High Voltage
Input Low Voltage
V
V
VIH
VIL
VDD/2+1
VDD/2-1
8MHz out-
put
V
V
VDDo8 – 0.4
VDDo – 0.4
IOH = -4mA
and -8mA
Output High Voltage
VOH
25MHz
output
Output Low Voltage
0.4
V
VOL
ZO
IOL = 4mA and 8mA
W
Nominal Output Impedance
20
OE#
200
230
4
Internal Pull-down Resistor
Input Capacitance
kW
RPD
CIN
CLKIN
Inputs
pF
www.pericom.com
PI6C490086
RevB
2/16/2012
12-0165
3
PI6C490086
PLL Clock Multiplier
AC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
Min.
Typ.
Max. Units
Fundamental Crystal
Input Clock
25
25
1
Input Frequency
MHz
FIN
Output Rise Time
Output Fall Time
Output Rise Time
Output Fall Time
20% to 80% 25MHz, Note 1
80% to 20% 25MHz, Note 1
tR
tF
tR
tF
1
ns
20% to 80% 8.192MHz, Note 1
2
80% to 20% 8.192MHz, Note 1
Note 2
2
Duty Cycle
50
53
%
tDC
Output Frequency Synthesis Error
Clock Phase Jitter (RMS)
Additive Jitter
0
ppm
ps
Ferror
Jphase
Jadd
25MHz only, Note 2
25MHz, Note 3
8.192MHz
0.5
1.5
500
fs
Absolute Period Jitter (pk-pk)
1. Note 1: Measured with 7 pF lump load.
+/-100
ps
Jadd
2. Note 2: 12 kHz to 20 MHz offset frequency using a crystal input.
3. Note 3: CLKIN input with X2 floating.
4. Note 4: Do not drive this device without a crystal or valid clock input
Crystal Oscillator Circuit
X1
C1
20pF
Crystal�(CL�=�16pF)
X2
C2
20pF
0.1µF
0.1µF
V
V
DD
OUTPUTS
CLK out
C
LOAD
DD
GND GND
CMOS Test Configuration
www.pericom.com
PI6C490086
RevB
2/16/2012
12-0165
4
PI6C490086
PLL Clock Multiplier
Packaging Mechanical: 16-Pin TSSOP (L)
DOCUMENT CONTROL NO.
PD - 1310
REVISION: E
16
DATE: 03/09/05
.169
.177
4.3
4.5
1
0.09
0.20
.193
.201
.004
.008
4.9
5.1
.047
0.45 .018
0.75 .030
max.
1.20
SEATING
PLANE
.252
BSC
6.4
.002
.006
0.05
0.15
.0256
BSC
.007
.012
0.65
0.19
0.30
Pericom Semiconductor Corporation
3545 N. 1st Street, San Jose, CA 95134
1-800-435-2335 • www.pericom.com
Note:
1. Package Outline Exclusive of Mold Flash and Metal Burr
2. Controlling dimentions in millimeters
3. Ref: JEDEC MO-153F/AB
DESCRIPTION: 16-Pin, 173-Mil Wide,TSSOP
PACKAGE CODE: L
Ordering Information
Ordering Code
Package Code Package Type
Operating Temperature
Commercial
PI6C490086LE
PI6C490086LIE
L
L
Pb-free & Green, 16-pin TSSOP
Pb-free & Green, 16-pin TSSOP
Industrial
Notes:
• Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
• E = Pb-free and Green
• X suffix = Tape/Reel
Pericom Semiconductor Corporation • 1-800-435-2336
www.pericom.com
PI6C490086
RevB
2/16/2012
12-0165
5
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