PI74ALVTC16244KEX [PERICOM]
Bus Driver, ALVT Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, 0.173 INCH, GREEN, PLASTIC, TVSOP-48;
| 型号： | PI74ALVTC16244KEX |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | Bus Driver, ALVT Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, 0.173 INCH, GREEN, PLASTIC, TVSOP-48 驱动器 |
| 文件： | 总8页 (文件大小：238K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI74ALVTC16244
1.8/2.5/3.3V 16-Bit Buffer/Driver
with 3-State Outputs
Product Features
Product Description
PI74ALVTC family is designed for low voltage operation,
VDD = 1.8Vto3.6V
Pericom Semiconductors PI74ALVTC series of logic circuits
are produced in the Companys advanced 0.35 micron CMOS
technology, achieving industry leading speed.
Supports Live Insertion
The PI74ALVTC16244 buffer/driver is designed specifically to
improve both the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and
transmitters.
3.6V I/O Tolerant Inputs and Outputs
Bus Hold
HighDrive,-32/64mA@3.3V
Uses patented noise reduction circuitry
Power-off high impedance inputs and outputs
Industrial operation at 40°C to +85°C
Packagesavailable:
Thedevicecanbeusedasfour4-bitbuffers,two8-bitbuffers,orone
16-bit buffer. It provides true outputs and symmetrical active-low
output-enable (OE) inputs.
To ensure the high-impedance state during power up or power
down, OE should be tied to Vdd through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
48-pin240milwideplasticTSSOP(A)
48-pin173milwideplastic TVSOP(K)
48-pin300milwideplastic SSOP(V)
The family offers both I/O Tolerant, which allows it to operate in
mixed 1.8/3.6V systems, and “Bus Hold,” which retains the data
input’s last state whenever the data input goes to high-impedance,
preventing “floating” inputs and eliminating the need for pullup/
down resistors.
Logic Block Diagram
1
25
1OE
3OE
47
46
2
3
36
35
13
14
1A
1A
1A
1A
1
2
3
4
1
1
1
1
Y
Y
Y
Y
1
2
3
4
3
3
3
3
A
A
A
A
1
2
3
4
3Y
3Y
3Y
3
Y
1
2
3
4
44
43
5
6
33
32
16
17
24
30
48
41
2
OE
4OE
19
20
8
2A
2A
2A
2A
1
2
3
4
2Y
2Y
2Y
2
Y
1
2
3
4
4
4
4
4
A
A
A
A
1
2
3
4
4Y
4Y
4Y
4
Y
1
2
3
4
29
27
26
40
38
37
9
11
12
22
23
PS8159D
11/23/98
1
PI74ALVTC16244
16-Bit Buffer Driver With 3-State Outputs
Truth Table(1)
Product Pin Description
Inputs
Outputs
Pin Name
nOE
Description
nOE
L
nA
X
nYx
H
3-State Output Enable Inputs (Active LOW)
H
L
nAx
Inputs
L
L
nYx
3-State Outputs
Ground
H
X
Z
GND
VCC
Note:
Power
1. H = High Signal Level
L = Low Signal Level
X = Don’t Care or Irrelevant
Z = High Impedance
Product Pin Configuration
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
2OE
1A1
1OE
2
1Y1
3
1A2
1Y2
4
GND
1A3
GND
5
1Y3
6
1A4
1Y4
7
VCC
2A1
VCC
8
2Y1
9
2A2
2Y2
10
GND
2A3
GND
11
12
13
14
15
16
17
18
19
20
21
22
23
24
2Y3
2Y4
2A4
3A1
3Y1
48-PIN
A48
K48
3A2
3Y2
GND
3A3
GND
3Y3
V48
3A4
3Y4
VCC
4A1
VCC
4Y1
4A2
4Y2
GND
GND
4Y3
4A3
4A4
3OE
4Y4
4OE
PS8159D
11/23/98
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PI74ALVTC16244
16-Bit Buffer Driver With 3-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions above those indicated in the operational sec-
tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect reliability.
Supply Voltage Range, VDD................................................. –0.5V to 4.6V
Input Voltage Range, VI ....................................................... -0.5V to 4.6V
Output Voltage Range, VO (3-Stated) .................................. -0.5V to 4.6V
Output Voltage Range, VO(1) (Active) ........................ –0.5V to VDD +0.5V
DC Input Diode Current (IIK) VI<0V.............................................. -50mA
DC Output Diode Current (IOK)
VO<0V ......................................................................................... -50mA
VO>VDD .......................................................................................+50mA
DC Output Source/Sink Current (IOH/IOL) ............................... -64/128mA
DC VDD or GND Current per Supply Pin (ICC or GND) ..............±100mA
Storage Temperature Range, Tstg ................................ –65°C to150°C
Recommended Operating Conditions2
Min.
Max.
Unit
Operating
1.8
1.2
2.0
3.6
3.6
VDD
Supply voltage
Data Retention Only
VDD = 2.7V to 3.6V
VDD = 2.7V to 3.6V
VIH
VIL
VI
High-level input voltage
Low-level input voltage
Input voltage
0.8
3.6
VDD
3.6
V
-0.3
0
Active State
VO
Output voltage
Off State
0
VDD = 3.0V to 3.6V
-32/64
±24
±18
±6
VDD = 2.7V to 3.0V
IO
Output current in IOH/IOL
mA
VDD = 2.3V to 2.7V
VDD = 1.8V
Input transistion rise or fall rate(3)
Operating free-air temperture
0
10
85
ns/V
C
∆t/∆v
TA
-40
Notes
1. Absolute maximum of IO must be observed.
2. Unused control inputs must be held HIGH or LOW to prevent them from floating.
3 As measured between 0.8V and 2.0V, VDD = 3.0V.
PS8159D
11/23/98
3
PI74ALVTC16244
16-Bit Buffer Driver With 3-State Outputs
Electrical Characteristics over Recommended Operating Free-Air Temperature Range
(unless otherwise noted)
DC Characteristics (2.7V<VDD ≤3.6V)
Parameter
Conditions
VDD
2.7 - 3.6
2.7
Min.
Typ.
Max.
Units
VIH
VIL
HIGH Level Input Voltage
LOW Level Input Voltage
2.0
0.8
IOH = −100µA
OH = −12mA
OH = −18mA
OH = −24mA
OH = −32mA
IOL = 100µA
OL = 12mA
OL = 18mA
OL = 24mA
OL = 32mA
OL = 64mA
VDD - 0.2
2.2
I
VOH HIGH Level Output Voltage
I
2.4
I
3.0
2.2
I
2.0
V
2.7 - 3.6
2.7
0.2
0.4
I
I
0.4
VOL LOW Level Output Voltage
I
0.45
0.5
3.0
I
I
0.55
±5.0
±10
II
Input Leakage Current
VI = VDD, or GND
VO = 3.6V
3.6
2.7
IOZ
3-STATE Output Leakage
µA
Power-OFF Leakage
Current
IOFF
VI or VO ≤ 3.6V
0
10
IODL Output Current Low
IODH Output Current High
V
IN = VIH orVIL, Vo = 1.5V(1)
IN = VIH orVIL, Vo = 1.5V(1)
150
-58
75
334
3.6
mA
V
-114
VI = 0.8V
3.0
3.6
IHOLD Bus Hold Current
A or B Outputs
VI = 2.0V
-75
VI = 0 to 3.6V
VI = VDD or GND
±500
50
µA
IDD Quiescent Supply Current
VDD ≤ (VI,VO) ≤ 3.6V
±50
2.7 - 3.6
VIH = VDD -0.6V,
Other inputs at VDD or Gnd
Increase in IDD per input
400
∆IDD
Notes
1. Duration of test must not exceed 1 second with only 1 output tested at a time.
PS8159D
11/23/98
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PI74ALVTC16244
16-Bit Buffer Driver With 3-State Outputs
Electrical Characteristics over Recommended Operating Free-Air Temperature Range
(unless otherwise noted)
DC Characteristics (2.3V ≤VDD ≤2.7V)
Dessription
Parameters
Conditions
VDD
Min.
Typ.
Max.
Units
VIH
VIL
HIGH Level Input Voltage
LOW Level Input Voltage
1.6
0.7
2.3 - 2.7
I
OH= -100µA
VDD- 0.2
1.8
VOH
HIGH Level Output Voltage
IOH= -12mA
IOH= -18mA
2.3
1.7
V
I
OL= 100µA
2.3 - 2.7
0.2
0.4
IOL= 12mA
IOL= 18mA
VOL
LOW Level Output Voltage
2.3
0.5
I
OL = 2mA
0.55
±5.0
±10
10
II
Input Leakage Current
3-STATE Output Leakage
Power-OFF Leakage Current
Output Current Low
V1 = VDD or GND
VO = 3.6V
2.7
2.3
0
IOZ
µA
IOFF
IODL
IODH
VI or VO ≤ 3.6V
V
IN = VIHor VIL,
V
O
= 1.5V(2)
= 1.5V(2)
110
-30
264
-60
2.7
2.5
mA
Output Current High
VIN = VIHor VIL,
VO
VI = 0.7V
VI = 1.7V
90
Bus Hold Current
A or B Outputs
(1)
IHOLD
-90
VI = VDDor GND
DD ≤ (VI,VO) ≤ 3.6V
40
µA
IDD
Quiescent Supply Current
Increase in IDD per input
V
±40
2.3 - 2.7
VIH= VDD-0.6V,
Inputs at VDD or Gnd
400
∆ΙDD
Notes
1. Not Guaranteed
2. Duration of test must not exceed 1 second with only 1 output tested at a time.
PS8159D
11/23/98
5
PI74ALVTC16244
16-Bit Buffer Driver With 3-State Outputs
Electrical Characteristics over Recommended Operating Free-Air Temperature Range
(unless otherwise noted)
DC Characteristics (1.8V ≤VDD ≤ 2.3V)
Description
Parameters
Conditions
VDD
Min.
Typ.
Max.
Units
VIH
VIL
HIGH Level Input Voltage
LOW Level Input Voltage
0.7 x VDD
1.8 - 2.3
0.2 x VDD
IOH = -100µA
VDD -0.2
1.4
VOH
VOL
HIGH Level Output Voltage
LOW Level Output Voltage
V
I
OH = -6mA
IOL = 10 µA
OL = 6mA
1.8
0.2
0.3
I
II
Input Leakage Current
2.3
1.8
±5.0
±10
V1 = VDD or GND
IOZ
3-STATE Output Leakage
VO = 3.6V
µA
Power-OFF Leakage
Current
IOFF
VI = VO ≤ 3.6V
0
10
IODL
IODH
Output Current Low
Output Current High
VIN = VIH or VIL, V
O
= 0.9V(2)
= 0.9V(2)
50
137
-34
1.8
mA
VIN = VIH or VIL, V
O
-14
VI = 0.4
50
Bus Hold Current
A or B Outputs
(1)
IHOLD
VI = 1.3
-50
VI = VDD or GND
20
1.8
µA
IDD
Quiescent Supply Current
Increase in IDD per input
VDD ≤ (VI,VO) ≤ 3.6V
±20
VI = VDD -06V,
Other inputs at VDD or Gnd
400
∆ΙDD
Note:
1. Not guaranteed
2. Duration of test must not exceed 1 second with only 1 output tested at a time.
PS8159D
11/23/98
6
PI74ALVTC16244
16-Bit Buffer Driver With 3-State Outputs
AC Electrical Characteristics
TA = -40°C to +85°C, CL = 50pF, RL = 500Ω
VDD = 3.3V
±0.3V
VDD = 2.5V
±0.2V
Symbol
Parameter
VDD = 1.8V
Units
Min.
Max.
Min.
Max.
Min.
1.5
Max.
3.5
tPHL, tPLH
tPZL, tPZH
tPLZ, tPHZ
Prop Delay
0.8
0.5
1.5
2.4
2.9
3.6
1.0
1.5
1.0
2.8
3.4
3.8
Output Enable Time
Output Disable Time
2.0
4.0
1.5
4.5
ns
Output to Output
Skew
(Note 1)
tOSHL
tOSLH
0.5
0.5
0.5
Note
1. Skew is defined as the absolute value of the difference between the actual propagation delay for
any two separate outputs of the same device. The specification applies to any outputs switching
in the same direction, either HIGH or LOW (tOSHL) or LOW to HIGH (tOSLH).
Capacitance
TA = +25°C
Typical
Symbol
Parameter
Conditions
Units
CIN
Input Capacitance
VDD = 1.8, 2.5V or 3.3V, VI = 0V or VDD
6
7
COUT
Output Capacitance VI = 0V or VDD, VDD = 1.8V, 2.5V or 3.3V
pF
Power Dissipation
Capacitance
VI = 0V or VDD, F = 10 MHz
DD = 1.8V, 2.5V or 3.3V
CPD
20
V
PS8159D
11/23/98
7
PI74ALVTC16244
16-Bit Buffer Driver With 3-State Outputs
Test Circuits and Switching Waveforms
Switch Position
Parameter Measurement Information (VDD = 1.8V - 3.6V)
Test
S1
Open
2 x VDD
t
pd
PLZ/ PZL
PHZ/ PZH
R1
2 x
VDD
t
t
500Ω
From Output
Under Test
Open
GND
GND
t
t
R
500Ω
L
50pF
C
L
Pulse Width
(See Note A)
VDD
Low-High-Low
Pulse
V
DD/2
0V
tW
VDD
High-Low-High
Pulse
V
DD/2
Setup, Hold, and Release Timing
0V
V
V
0V
DD
DD/2
Data
Input
Propagaton Delay
t
SU
tH
V
DD
V
V
DD
DD/2
Timing
Input
VDD/2
0V
Input
0V
t
PHL
t
PLH
V
DD
Output
VDD/2
VOL
t
PHL
tPLH
VDD
Notes:
Opposite Phase
Input Transition
V
DD/2
A. CL includes probe and jig capacitance.
0V
B. Waveform 1 is for an output with internal conditions
such that the output is LOW except when disabled by the
output control.
Enable Disable Timing
Waveform 2 is for an output with internal conditions
such that the output is HIGH except when disabled by
the output control.
V
DD
Output
Control
(Active LOW)
C. All input pulses are supplied by generators having the
following characteristics: PRR ≤ 10 MHz, ZO = 50Ω,
tr ≤ 2ns, tf ≤ 2ns, measured from 10% to 90%, unless
otherwise specified.
D. The outputs are measured one at a time with one transi-
tion per measurement.
V
DD/2
0V
t
PLZ
t
PZL
PZH
V
DD
V
DD
Output
Waveform 1
S1 at 2xVDD
(see Note B)
VDD/2
+0.15V
-0.15V
V
OL
t
t
PHZ
V
OH
Output
Waveform 2
S1 at GND
(see Note B)
VDD/2
0V
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
PS8159D
11/23/98
8
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