PI74FCT2543T [PERICOM]
Fast CMOS Latched Transceivers; 快速锁存CMOS收发器
| 型号： | PI74FCT2543T |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | Fast CMOS Latched Transceivers |
| 文件： | 总5页 (文件大小：88K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI74FCT543T/544T
(25Ω Series) PI74FCT2543T
Fast CMOS
Latched Transceivers
Product Features:
Product Description:
• PI74FCT543T/544/2543Tispincompatiblewithbipolar
FAST™ Series at a higher speed and lower power
consumption
• 25Ω series resistor on all outputs
• TTL input and output levels
Pericom Semiconductor’s PI74FCT series of logic circuits are
produced in the Company’s advanced 0.8 micron CMOS
technology, achieving industry leading speed grades. All
PI74FCT2XXX devices have a built-in 25 ohm series resistor on
all outputs to reduce noise because of reflections, thus eliminating
the need for an external terminating resistor.
• Low ground bounce outputs
• Extremely low static power
The PI74FCT543T/544T and PI74FCT2543T is an 8-bit wide
non-inverting transceiver designed with two sets of eight D-type
latches with separate input and output controls for each set. For
data flow from A to B, for example, the A-to-B Enable (CEAB)
input must be LOW in order to enter data from A0–A7 or to take
data from B0–B7, as indicated in the Truth Table. With CEAB
LOW, a LOW signal makes the A-to-B latches transparent; a
subsequent LOW-to-HIGH transition of the LEAB signal puts the
A latches in the storage mode and their outputs no longer change
the A inputs. With CEAB and OEAB both LOW, the 3-state B
output buffers are active and reflect the data present at the output
of the A latches. Control of data from B to A is similar, but uses the
CEAB, LEAB, and OEAB inputs. The PI74FCT543T is a non-
inverting of the PI74FCT544T.
• Hysteresis on all inputs
• Industrial operating temperature range: –40°C to +85°C
• Packages available:
– 24-pin300milwideplasticDIP(P)
– 24-pin150milwideplasticQSOP(Q)
– 24-pin150milwideplasticTQSOP(R)
– 24-pin300milwideplasticSOIC(S)
• Device models available on request
PI74FCT543/544/2543T Logic Block Diagram
DETAIL A
D
Q
B
0
LE
A0
Q
D
LE
A
1
2
3
4
5
6
7
B
B
B
B
B
B
B
1
2
3
4
5
6
7
A
A
A
A
A
A
DETAIL A x 7
OEBA
OEAB
CEBA
LEBA
CEAB
LEAB
NOTE: PI74FCT543/2543T function is shown.
PS2020A 03/11/96
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PI74FCT543T/544T
(25Ω Series) PI74FCT2543T
LATCHED TRANSCEIVERS
PI74FCT543/544/2543T Product Pin Configuration Product Pin Description
Pin Name Description
OEAB
OEBA
CEAB
CEBA
LEAB
LEBA
A0-A7
B0-B7
GND
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or B-to-A 3-State Outputs
B-to-A Data Inputs or A-to-B 3-State Outputs
Ground
24-PIN
P24
Q24
R24
S24
VCC
Power
PI74FCT543/2543T Truth Table (Non-Inverting)(1,2)
For A-to-B (Symmetric with B-to-A)
Latch
Status
Output
Buffers
Inputs
CEAB
LEAB OEAB
A-to-B
Storing
Storing
—
B0–B7
High-Z
H
—
—
L
—
H
—
—
H
L
—
—
L
High Z
Transparent
Storing
Current A Inputs
Previous* A Inputs
L
H
L
1. *Before LEAB LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
— = Don’t Care or Irrevelant
2. A-to-B data flow shown; B-to-A flow control is the same,
except using CEBA, LEBA, and OEBA.
PS2020A 03/11/96
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PI74FCT543T/544T
(25Ω Series) PI74FCT2543T
LATCHED TRANSCEIVERS
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Storage Temperature ................................................................. –65°C to +150°C
Ambient Temperature with Power Applied ................................. -40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) .......... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) ....... –0.5V to +7.0V
DC Input Voltage ......................................................................... –0.5V to +7.0V
DC Output Current ................................................................................... 120 mA
Power Dissipation......................................................................................... 0.5W
Stresses greater than those listed under
MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions above those
indicated in the operational sections of this
specification is not implied. Exposure to
absolute maximum rating conditions for
extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 5%)
Parameters Description
Test Conditions(1) Min. Typ(2) Max. Units
VOH
VOL
VOL
VIH
VIL
IIH
Output HIGH Voltage VCC = Min., VIN = VIH or VIL
Output LOW Current VCC = Min., VIN = VIH or VIL
Output LOW Current VCC = Min., VIN = VIH or VIL
IOH = –15.0 mA
2.4
3.0
V
V
IOL = 64 mA
0.3 0.55
0.3 0.50
IOL = 12 mA (25Ω Series)
V
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
Input HIGH Current
Input LOW Current
High Impedance
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
(Except I/O pins) VCC = Max.
(Except I/O pins) VCC = Max.
(I/O pins Only) VCC = Max.
(I/O pins Only) VCC = Max.
VCC = MAX.
2.0
V
0.8
V
VIN = VCC
1
µA
µA
µA
µA
µA
µA
V
IIL
VIN = GND
VIN = VCC
–1
IIH
1
IIL
VIN = GND
VOUT = 2.7V
VOUT = 0.5V
–1
IOZH
IOZL
VIK
IOFF
IOS
1
–1
Output Current
Clamp Diode Voltage VCC = Min., IIN = –18 mA
Power Down Disable VCC = GND, VOUT = 4.5V
Short Circuit Current VCC = Max.(3), VOUT = GND
Input Hysteresis
–0.7 –1.2
—
—
100
µA
mA
mV
–60 –120
200
VH
Capacitance (TA = 25°C, f = 1 MHz)
Parameters(4)
Description
Test Conditions
VIN = 0V
Typ
6
Max.
10
Units
pF
CIN
Input Capacitance
Output Capacitance
COUT
VOUT = 0V
8
12
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
PS2020A 03/11/96
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PI74FCT543T/544T
(25Ω Series) PI74FCT2543T
LATCHED TRANSCEIVERS
Power Supply Characteristics
Parameters Description
Test Conditions(1)
Min. Typ(2) Max. Units
ICC
Quiescent Power
Supply Current
VCC = Max.
VCC = Max.
VCC = Max.,
VIN = GND
or VCC
0.1
500
µA
∆ICC
ICCD
Supply Current per
Input @ TTL HIGH
VIN = 3.4V(3)
0.5
2.0
mA
Supply Current per
Input per MHz(4)
VIN = VCC
VIN = GND
0.15
0.25
mA/
MHz
Outputs Open
CEAB and OEAB = GND
CEBA = VCC
One Input Toggling
50% Duty Cycle
IC
Total Power Supply
Current(6)
VCC = Max.,
Outputs Open
fCP = 10 MHZ (LEAB)
50% Duty Cycle
CEAB and OEAB = GND
CEBA = VCC
VIN = VCC
VIN = GND
1.5
2.0
3.5(5)
5.5(5)
mA
VIN = 3.4V
VIN = GND
fI = 5 MHZ
One Bit Toggling
VCC = Max.,
Outputs Open
fCP = 10 MHZ (LEAB)
50% Duty Cycle
CEAB and OEAB = GND
CEBA = Vcc
VIN = VCC
VIN = GND
3.8
6.0
7.3(5)
VIN = 3.4V
VIN = GND
16.3(5)
Eight Bits Toggling
fI = 2.5 MHZ
50% Duty Cycle
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fI = Input Frequency
NI = Number of Inputs at fI
All currents are in milliamps and all frequencies are in megahertz.
PS2020A 03/11/96
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PI74FCT543T/544T
(25Ω Series) PI74FCT2543T
LATCHED TRANSCEIVERS
PI74FCT543/2543T (non-inverting) Switching Characteristics over Operating Range
543T/2543T
Com.
543AT/2543AT
Com.
543CT/2543CT
Com.
543DT
Com.
Parameters Description
Conditions(1)
Min
2.5
Max
8.5
Min
Max
Min
Max
Min
Max
Unit
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PZH
PZL
PropagationDelayTransparent
Mode A to B or B to A
PropagationDelay
LEBA to A , LEAB to B
C
L
L
= 50 pF
2.5
6.5
2.5
5.3
2.5
4.4
5.0
5.4
ns
N
N
N
N
R
= 500Ω
2.5
2.0
12.5
12.0
2.5
2.0
8.0
9.0
2.5
2.0
7.0
8.0
2.5
2.0
ns
ns
N
N
Output Enable Time
OEBA or OEAB to A
N
or BN
CEBA or CEAB to A
Output Disable Time(3)
OEBA or OEAB to A
CEBA or CEAB to A
Setup Time, HIGH or LOW
or B to LEBA or LEAB
Hold Time, HIGH or LOW
or B to LEBA or LEAB
LEBA or LEAB Pulse Width LOW(3)
N
or B
N
t
t
PZH
PZL
2.0
9.0
2.0
7.5
2.0
6.5
2.0
4.3
ns
N
or B
N
N
or B
N
t
SU
H
3.0
2.0
5.0
—
—
—
2.0
2.0
5.0
—
—
—
2.0
2.0
5.0
—
—
—
1.5
1.5
3.0
—
—
—
ns
ns
ns
A
N
N
t
A
N
N
tW
PI74FCT544T (inverting) Switching Characteristics over Operating Range
544T
Com.
544AT
Com.
544CT
Com.
Parameters Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Unit
t
t
t
t
t
t
PLH
PHL
PLH
PHL
PZH
PZL
PropagationDelayTransparent
Mode A to B or B to A
PropagationDelay
LEBA to A , LEAB to B
C
L
L
= 50 pF
2.5
8.5
2.5
6.5
8.0
9.0
2.5
5.3
ns
N
N
N
N
R
= 500Ω
2.5
2.0
12.5
12.0
2.5
2.0
2.5
2.0
7.0
8.0
ns
ns
N
N
Output Enable Time
OEBA or OEAB to A
N
or BN
CEBA or CEAB to A
Output Disable Time(3)
OEBA or OEAB to A
CEBA or CEAB to A
Setup Time, HIGH or LOW
or B to LEBA or LEAB
Hold Time, HIGH or LOW
or B to LEBA or LEAB
LEBA or LEAB Pulse Width LOW(3)
N
or B
N
t
t
PZH
PZL
2.0
9.0
2.0
7.5
2.0
6.5
ns
N
or B
N
N
or B
N
t
SU
H
3.0
2.0
5.0
—
—
—
2.0
2.0
5.0
—
—
—
2.0
2.0
5.0
—
—
—
ns
ns
ns
A
N
N
t
A
N
N
tW
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
PS2020A 03/11/96
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