PI74LPT646AR [PERICOM]

Registered Bus Transceiver, LPT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.150 INCH, 1.10 MM HEIGHT, 0.635 MM PITCH, PLASTIC, TQSOP-24;


型号：	PI74LPT646AR
厂家：	PERICOM SEMICONDUCTOR CORPORATION
描述：	Registered Bus Transceiver, LPT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.150 INCH, 1.10 MM HEIGHT, 0.635 MM PITCH, PLASTIC, TQSOP-24 光电二极管逻辑集成电路触发器
文件：	总6页 (文件大小：71K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PI74LPT646

PI74LPT652

^{3.3V 8-BIT REGISTERED T}P^RI^A7^N4^SL^CP^EIT^V6^E4^R6^S

PI74LPT652

Fast CMOS 3.3V 8-Bit

Registered Transceiver

Product Description

Product Features

Pericom Semiconductor’s PI74LPT series of logic circuits are pro-

duced in the Company’s advanced 0.6 micron CMOS technology,

achieving industry leading speed grades.

• CompatiblewithLCX™andLVT™familiesofproducts

• Supports 5V tolerant mixed signal mode operation

– Input can be 3V or 5V

– Output can be 3V or connected to 5V bus

The PI74LPT646 and PI74LPT652 are designed with a bus

transceiver with 3-state D-type flip-flops and control circuitry

arrangedformultiplexedtransmissionofdatadirectlyfromthedata

bus or from the internal storage registers. The PI74LPT652 utilizes

GAB and GBA signals to control the transceiver functions. The

PI74LPT646 utilizes the enable control (G) and direction pins

(DIR) to control the transceiver functions. SAB and SBA control

pins are used to select either real-time or stored data transfer. The

circuitry used for select control will eliminate the typical decoding

glitch that occurs in a multiplexer during the transition between

real-time and stored data. A low input level selects real-time data

and a high selects stored data.

• Advanced low power CMOS operation

• Excellent output drive capability:

Balanced drives (24 mA sink and source)

• Low ground bounce outputs

• Hysteresis on all inputs

• Industrial operating temperature range: –40°C to +85°C

• Packages available:

–24-pin173-milwideplasticTSSOP(L)

–24-pin150-milwideplasticQSOP(Q)

–24-pin150-milwideplasticTQSOP(R)

–24-pin300-milwideplasticSOIC(S)

The PI74LPT646 and PI74LPT652 can be driven from either 3.3V

or 5.0V devices allowing this device to be used as a translator in a

mixed 3.3/5.0V system.

Logic Block Diagram

PI74LPT652 ONLY

GBA

GAB

PI74LPT646

ONLY

DIR

CPBA

SBA

CPAB

SAB

B REG

1 OR 8 CHANNELS

A REG

TO 7 OTHER CHANNELS

PS2064A 01/15/97

PI74LPT646

PI74LPT652

3.3V 8-BIT REGISTERED TRANSCEIVERS

PI74LPT646

PI74LPT652

Product Pin Description

Product Pin Configuration Product Pin Configuration

Pin Name

Description

CPAB

SAB

DIR

CPAB

SAB

GAB

VCC

CPBA

SBA

VCC

A0-A7

Data Register A Inputs

Data Register B Outputs

CPBA

SBA

B0-B7

Data Register B Inputs

Data Register A Outputs

24-PIN

L24

Q24

R24

S24

24-PIN

L24

Q24

R24

S24

21 GBA

CPAB, CPBA Clock Pulse Inputs

SAB, SBA

DIR, G

GAB, GBA

GND

Output Data Source Select Inputs

Output Enable Inputs (LPT646)

Output Enable Inputs (LPT652)

Ground

GND

VCC

Power

PI74LPT646 Truth Table

Inputs

DATA I/O⁽²⁾

Function/Operation

DIR

CPAB CPBA

SAB

SBA

A0-A7 B0-B7

Isolation

Store A and B Data

H or L

Input

Output

Input

↑

Real Time B Data to A Bus

Stored B Data to A Bus

H or L

Input

Real Time A Data to B Bus

Stored A Data to B Bus

H or L

Output

PI74LPT652 Truth Table

Inputs

DATA I/O⁽²⁾

Function/Operation

GAB

GBA

CPAB CPBA

SAB

SBA

A0-A7

B0-B7

Isolation

Store A and B Data

H or L

Input

↑

Store A, Hold B

Store A in Both Registers

↑

H or L

Input

Unspecified⁽¹⁾

Output

↑

X⁽²⁾

Hold A, Store B

Store B in Both Registers

H or L

↑

Unspecified⁽¹⁾

Output

Input

↑

X⁽²⁾

Real Time B Data to A Bus

Stored B Data to A Bus

H or L

Output

Input

Output

Real Time A Data to B Bus

Stored A Data to B Bus

H or L

Input

Stored A Data to B Bus and

Stored B Data to A Bus

H or L

Output

Notes:

1. The data output functions may be enabled or disabled by various signals at the GAB or GBA inputs. Data

input functions are always enabled, i.e., data at the bus pins will be stored on every low-to-high transition

on the clock inputs.

2. Select control = L: clocks can occur simultaneously.

Select control = H: clocks must be staggered in order to load both registers.

H = High Voltage Level; L = Low Voltage Level; X = Don't Care; ↑ = LOW-to-HIGH transition

PS2064A 01/15/97

PI74LPT646

PI74LPT652

3.3V 8-BIT REGISTERED TRANSCEIVERS

REAL-TIME TRANSFER

BUS A TO B

REAL-TIME TRANSFER

BUS B TO A

BUS

LPT646 DIR

CPAB CPBA SAB

SBA

LPT646 DIR

CPAB CPBA SAB

SBA

LPT652 GAB GBA CPAB CPBA SAB

SBA

LPT652 GAB GBA CPAB CPBA SAB

SBA

STORAGE FROM

A AND/OR B

TRANSFER STORES

DATA TO A AND/OR B

BUS

LPT646 DIR

CPAB CPBA SAB

SBA

LPT646⁽¹⁾DIR

CPAB CPBA SAB

SBA

↑

H or L

LPT652 GAB GBA CPAB CPBA SAB

H or L H or L

SBA

LPT652 GAB GBA CPAB CPBA SAB

SBA

↑

1. Note: The LPT646 cannot transfer data to

A bus and B bus simultaneously.

PS2064A 01/15/97

PI74LPT646

PI74LPT652

3.3V 8-BIT REGISTERED TRANSCEIVERS

Maximum Ratings

(Above which the useful life may be impaired. For user guidelines, not tested.)

Storage Temperature............................................................–65°C to +150°C

Ambient Temperature with Power Applied...........................–40°C to +85°C

Supply Voltage to Ground Potential (Inputs & Vcc Only).... –0.5V to +7.0V

Supply Voltage to Ground Potential (Outputs & D/O Only) –0.5V to +7.0V

DC Input Voltage .................................................................. –0.5V to +7.0V

DC Output Current ............................................................................ 120 mA

Power Dissipation ................................................................................... 1.0W

Note:

Stresses greater than those listed under MAXIMUM

RATINGS may cause permanent damage to the

device. This is a stress rating only and functional

operation of the device at these or any other condi-

tions above those indicated in the operational

sectionsofthisspecificationisnotimplied. Exposure

to absolute maximum rating conditions for extended

periods may affect reliability.

DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 2.7V to 3.6V)

Parameters

Description

Test Conditions⁽¹⁾

Min. Typ⁽²⁾Max. Units

VIH

Input HIGH Voltage (Input pins)

Input HIGH Voltage (I/O pins)

Input LOW Voltage

Guaranteed Logic HIGH Level

2.2

2.0

–0.5

—

5.5

0.8

V^IL

IIH

IIL

Guaranteed Logic LOW Level

(Input and I/O pins)

Input HIGH Current (Input pins)

Input HIGH Current (I/O pins)

Input LOW Current (Input pins)

Input LOW Current (I/O pins)

High Impedance Output Current

(3-State Output pins)

Clamp Diode Voltage

Output HIGH Current

Output LOW Current

Output HIGH Voltage

VCC = Max.

VIN = 5.5V

—

–36

—

±1

µA

VCC = Max.

VIN = VCC

VCC = Max.

VIN = GND

VOUT = 5.5V

VOUT = GND

IOZH

IOZL

VIK

IODH

IODL

VOH

—

±1

VCC = Min., IIN = –18 mA

VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V⁽³⁾

–0.7

–60

–1.2

–110

200

—

VCC = Min.

IOH = –0.1 mA Vcc-0.2

—

VIN = VIH or VIL

V^CC= 3.0V,

VIN = VIH or VIL

VCC = Min.

VIN = VIH or VIL

IOH = –3 mA

IOH = –8 mA

IOH = –24 mA

IOL = 0.1 mA

IOL = 16 mA

IOL = 24 mA

2.4

2.4⁽⁵⁾

2.0

—

–60

—

3.0

—

0.2

0.4

0.5

–240

±100

—

VOL

Output LOW Voltage

—

µA

0.2

0.3

–85

—

IOS

IOFF

Short Circuit Current⁽⁴⁾

Power Down Disable

Input Hysteresis

VCC = Max.⁽³⁾, VOUT = GND

VCC = 0V, VIN or V^OUT≤ 4.5V

150

Notes:

1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at Vcc = 3.3V, +25°C ambient and maximum loading.

3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.

4. This parameter is guaranteed but not tested.

5. VOH = VCC – 0.6V at rated current.

Capacitance (TA = 25°C, f = 1 MHz)

Parameters⁽¹⁾

Description

Test Conditions

Typ.

Max.

Units

CIN

Input Capacitance

Output Capacitance

VIN = 0V

4.5

5.5

COUT

VOUT = 0V

Note:

1. This parameter is determined by device characterization but is not production tested.

PS2064A 01/15/97

PI74LPT646

PI74LPT652

3.3V 8-BIT REGISTERED TRANSCEIVERS

Power Supply Characteristics

Parameters Description

Test Conditions⁽¹⁾

Min. Typ⁽²⁾Max. Units

ICC

Quiescent Power Supply Current

VCC = Max.

VIN = GND or VCC

VIN = VCC – 0.6V⁽³⁾

0.1

2.0

µA

∆ICC

Quiescent Power Supply Current

TTL Inputs HIGH

ICCD

Dynamic Power Supply⁽⁴⁾

VCC = Max.,

VIN = VCC

µA/

Outputs Open

VIN = GND

MHz

G = DIR = GND

One Bit Toggling

50% Duty Cycle

Total Power Supply

Current⁽⁶⁾

VCC = Max.,

Outputs Open

fI = 10 MHZ

VIN = VCC – 0.6V

VIN = GND

0.6

2.3

50% Duty Cycle

G = DIR = GND

One Bit Toggling

VCC = Max.,

Outputs Open

fI = 2.5 MHZ

VIN = VCC – 0.6V

VIN = GND

2.1

4.7⁽⁵⁾

50% Duty Cycle

G = DIR = GND

8 Bits Toggling

Notes:

1. ForMax. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.

2. Typical values are at Vcc = 3.3V, +25°C ambient.

3. Per TTL driven input; all other inputs at Vcc or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.

6. I^C=IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fINI)

ICC = Quiescent Current (ICCL, ICCH and ICCZ)

∆I^CC= Power Supply Current for a TTL High Input

D^H= Duty Cycle for TTL Inputs High

NT = Number of TTL Inputs at DH

ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)

f^CP= Clock Frequency for Register Devices (Zero for Non-Register Devices)

NCP = Number of Clock Inputs at fCP

fI = Input Frequency

N^I= Number of Inputs at fI

All currents are in milliamps and all frequencies are in megahertz.

PS2064A 01/15/97

PI74LPT646

PI74LPT652

3.3V 8-BIT REGISTERED TRANSCEIVERS

PI74LPT646 Switching Characteristics over Operating Range⁽¹⁾

LPT646

Com.

LPT646A

Com.

LPT646C

Com.

Parameters Description

Conditions⁽²⁾

Min.⁽³⁾

Max.

Min.⁽³⁾

Max.

Min.⁽³⁾

Max.

Units

tPLH

tPHL

Propagation Delay

Bus to Bus

CL = 50pF

RL = 500Ω

2.0

4.0

2.0

6.0

7.5

2.0

1.5

5.0

6.3

1.5

2.0

1.5

5.0

5.4

tPZH

tPZL

Output Enable Time

G, DIR to Bus

Output Disable Time⁽³⁾

14.0

9.0

9.5

—

9.8

6.3

7.7

—

7.8

6.3

5.7

6.2

—

t^PHZ

tPLZ

G, DIR to Bus

tPLH

tPHL

Propagation Delay

Clock to Bus

tPLH

tPHL

Propagation Delay

SBA or SAB to Bus

t^SU

Setup Time HIGH or

LOW, BUS to Clock

t^H

Hold Time HIGH or

LOW, Bus to Clock

Clock Pulse Width⁽³⁾

HIGH or LOW

—

PI74LPT652 Switching Characteristics over Operating Range⁽¹⁾

LPT652

Com.

LPT652A

Com.

LPT652C

Com.

Min.⁽³⁾

Parameters Description

Conditions⁽²⁾

Min.⁽³⁾

Max.

Min.⁽³⁾

Max.

Units

t^PLH

tPHL

Propagation Delay

Bus to Bus

CL = 50pF

RL = 500Ω

2.0

7.5

2.0

1.5

5.0

6.3

1.5

2.0

1.5

5.0

5.4

tPZH

tPZL

Output Enable Time

GBA, GAB to Bus

Output Disable Time⁽³⁾

GBA, GAB to Bus

2.0

4.0

2.0

6.0

14.0

9.0

9.5

—

9.8

6.3

7.7

—

7.8

6.3

5.7

6.2

—

tPHZ

tPLZ

t^PLH

tPHL

Propagation Delay

Clock to Bus

tPLH

tPHL

Propagation Delay

SBA or SAB to Bus

tSU

Setup Time HIGH or

LOW, BUS to Clock

Hold Time HIGH or

LOW, Bus to Clock

Clock Pulse Width⁽³⁾

—

HIGH or LOW

Notes:

1. Propagation Delays and Enable/Disable times are with Vcc = 3.3V ±0.3V, normal range. For Vcc = 2.7V, extended range, all

Propagation Delays and Enable/Disable times should be degraded by 20%.

2. See test circuit and waveforms.

3. Minimum limits are guaranteed but not tested on Propagation Delays.

4. This parameter is guaranteed but not production tested.

5. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.

Pericom Semiconductor Corporation

2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com

PS2064A 01/15/97

PI74LPT646AR [PERICOM]

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