PI74LVTC16244VE [PERICOM]

3.3V 16-Bit Buffer/Line Driver with 3-State Outputs; 具有三态输出的3.3V 16位缓冲器/线路驱动器
PI74LVTC16244VE
型号: PI74LVTC16244VE
厂家: PERICOM SEMICONDUCTOR CORPORATION    PERICOM SEMICONDUCTOR CORPORATION
描述:

3.3V 16-Bit Buffer/Line Driver with 3-State Outputs
具有三态输出的3.3V 16位缓冲器/线路驱动器

总线驱动器 总线收发器 逻辑集成电路 光电二极管
文件: 总8页 (文件大小:167K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PI74LVTC16244  
3.3V 16-Bit Buffer/Line Driver  
with 3-State Outputs  
Product Features  
Product Description  
· Advanced low power CMOS design for 2.7V to 3.6V V  
operation  
Pericom Semiconductor’s PI74LVTC series of logic circuits are  
produced using the Company’s advanced CMOS technology,  
achieving industry leading speed.  
CC  
· Supports 5V input/output tolerance in mixed signal mode  
operation  
· Function compatible with LVT family of products  
· Balanced ±24mA output drive  
The PI74LVTC16244 is a non-inverting 16-bit buffer and line  
driver designed for low-voltage 2.7V to 3.6V V operation, with  
CC  
the capability of interfacing to the 5V system environment. This  
buffer/driver is designed specifically to improve both the perfor-  
mance and density of 3-State memory address drivers, clock  
drivers, and bus-oriented receivers and transmitters. The device  
can be used as four 4-bit buffers, two 8-bit buffers, or one  
16-bit buffer.  
· Typical V  
(Output Ground Bounce)  
OLP  
CC  
<0.8V at V =3.3V, T =25°C  
A
· I and Power Up/Down 3-State support live insertion  
off  
· Latch-up performance exceeds 200mA Per JESD78  
· ESD protection exceeds JESD 22  
- 2000V Human-Body Model (A114-B)  
- 200V Machine Model (A115-A)  
· Available Packages (Pb-free available):  
- 48-pin 240-mil wide plastic TSSOP (A48)  
- 48-pin 300-mil wide plastic SSOP (V48)  
When V is between 0 to 1.5V during power up or power down,  
CC  
the device is in the high-impedance state. To ensure the high-  
impedance state above 1.5V, OE should be tied to Vcc through a  
pullup resistor; the minimum value of the resistor is determined by  
the current sinking capability of the driver.  
· Industrial Temperature: -40°C to +85°C  
The device fully supports live-insertion with its I and power-up/  
off  
down 3-state. The I circuitry disables the outputs when the  
off  
powerisoff, preventingthebackflowofdamagingcurrentthrough  
the device. Power-up/down 3-state places the outputs in the high-  
impedancestateduringpoweruporpowerdown,preventingdriver  
conflict.  
Logic Block Diagram  
1
25  
1OE  
3OE  
3A1  
47  
2
3
36  
35  
13  
14  
1A1  
1Y1  
1Y2  
1Y3  
1Y4  
3Y1  
3Y2  
3Y3  
3Y4  
46  
1A2  
3A2  
3A3  
3A4  
44  
5
6
33  
32  
16  
17  
1A3  
43  
1A4  
24  
30  
48  
2OE  
4OE  
4A1  
19  
20  
41  
8
9
2A1  
2Y1  
2Y2  
2Y3  
2Y4  
4Y1  
4Y2  
4Y3  
4Y4  
29  
27  
26  
40  
2A2  
4A2  
4A3  
4A4  
22  
23  
38  
37  
11  
12  
2A3  
2A4  
PS8652A  
05/19/03  
1
PI74LVTC16244  
3.3V 16-Bit Buffer/Line Driver  
with 3-State Outputs  
Maximum Ratings  
(Above which the useful life may be impaired.  
For user guidelines, not tested.)  
Product Pin Description  
Pin Name  
Description  
Supply voltage range, V ............................ –0.5V to +6.5V  
CC  
Input voltage range, V (1) ............................... –0.5V to +6.5V  
I
xOE  
3-State Output Enable Inputs (Active LOW)  
Voltage range applied to any output in the  
high-impedance or power-off state, V (1) ..... –0.5V to +6.5V  
xAx  
Inputs  
O
Voltage range applied to any output in the  
xYx  
3-State Outputs  
Ground  
active state, V (1), (2)............................... –0.5V to V +0.5V  
O
CC  
GND  
VCC  
Input clamp current, I (V <0) ................................... –50mA  
IK  
I
Output clamp current, I (V <0) .............................. –50mA  
Power  
OK  
O
Continous Output Current I ........................................±50mA  
O
Continous Current through each VCC or GND pin ............ ±100mA  
Package thermal impedance, θ (3): package A ....... 104°C/W  
Product Pin Configuration  
JA  
package V ... 94°C/W  
Storage Temperature range, T .................... –65°C to 150°C  
stg  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
Notes:  
2
Stresses greater than those listed under MAXIMUM RATINGS may  
cause permanent damage to the device. This is a stress rating only and  
functional operation of the device at these or any other conditions above  
those indicated in the operational sections of this specification is not  
implied. Exposure to absolute maximum rating conditions for extended  
periods may affect reliability.  
3
4
5
6
7
V
V
CC  
2A1  
CC  
1. Inputnegative-voltageandoutputvoltageratingsmaybeexceededifthe  
input and output clamp current ratings are observed.  
2. This value is limited to 6.5V maximum.  
3. The package thermal impedance is calculated in accordance with JESD  
51.  
2Y1  
8
9
2Y2  
2A2  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
GND  
GND  
48-Pin  
A, V  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
Truth Table(4)  
Inputs  
Outputs  
3Y3  
3Y4  
3A3  
3A4  
xOE  
L
xAx  
H
xYx  
H
V
V
CC  
CC  
L
L
L
4Y1  
4Y2  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
H
X
Z
GND  
4Y3  
Notes:  
4. H = High Signal Level  
L = Low Signal Level  
X = Don’t Care or Irrelevant  
Z = High Impedance  
4Y4  
4OE  
PS8652A  
05/19/03  
2
PI74LVTC16244  
3.3V 16-Bit Buffer/Line Driver  
with 3-State Outputs  
Recommended Operating Conditions(5)  
Min.  
2.7  
Max.  
Units  
VCC Supply Voltage  
Operating  
3.6  
VIH High-level Input Voltage  
VIL Low-level Input Voltage  
VI Input Voltage  
VCC = 2.7V to 3.6V  
VCC = 2.7V to 3.6V  
2.0  
0.8  
5.5  
VCC  
5.5  
–12  
– 24  
12  
V
0
0
0
High or Low State  
3-State  
VO Output Voltage  
VCC = 2.7V  
IOH High-level output current  
IOL Low-level output current  
VCC = 3.0V to 3.6V  
VCC = 2.7V  
mA  
VCC = 3.0V to 3.6V  
24  
t/v Input transition rise or fall rate  
t/VCC Power-up ramp rate  
10  
ns/V  
µs/V  
°C  
150  
TA  
Operating free-air temperature  
– 40  
+85  
Notes:  
5. All unused inputs must be held at VCC or GND to ensure proper device operation.  
PS8652A  
05/19/03  
3
PI74LVTC16244  
3.3V 16-Bit Buffer/Line Driver  
with 3-State Outputs  
DC Electrical Characteristics (Over the Operating Range, T = –40°C to +85°C)  
A
Parameters  
Description  
Test Conditions  
Min.  
Max.  
Units  
VIK  
Clamp Diode Voltage  
VCC = 2.7V  
II = –18mA  
–1.2V  
VCC  
VCC = 2.7V to 3.6V  
VCC = 2.7V  
IOH = –100µA  
–0.2V  
IOH = –12mA  
IOH = –12mA  
2.2  
2.4  
2.2  
Out  
p
ut High Voltage  
ut Low Voltage  
VOH  
VCC = 3V  
V
IOH = –24mA  
VCC = 2.7V to 3.6V  
VCC = 2.7V  
IOL = 100µA  
IOL = 12mA  
0.2  
0.4  
0.4  
0.55  
±5  
VOL  
Outp  
I
OL = 12mA  
IOL = 24mA  
VI = 0 to 5.5V  
VI or VO = 0  
VCC = 3V  
II  
Input  
Leakage Current  
VCC = 0V to 3.6V  
VCC = 0V  
V
Power Off Output Leakage  
Current  
IOFF  
IOZ  
V
to 5.5V  
±5  
±5  
±5  
±5  
3-State Output Leakage  
Current  
VCC = 2.7V to 3.6V  
VO = 0V to 5.5V,  
VO = 0.5V to 5.5V,  
OE = don't care  
IOZPU  
IOZPD  
Power-Up 3-State Current  
VCC = 0V to 1.5V  
µA  
VO = 0.5V to 5.5V,  
OE = don't care  
Power-Down 3-State  
Current  
VCC = 1.5V to 0V  
VI = VCC or GND  
Quiescent Power Supply  
Current  
ICC  
VCC = 2.7V to 3.6V  
IO = 0  
100  
100  
3.6V VI 5.5V  
One input at VCC - 0.6V(6)  
ICC  
Notes:  
Increase in ICC  
VCC = 2.7V to 3.6V  
Other inputs at VCC or GND  
6. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.  
PS8652A  
05/19/03  
4
PI74LVTC16244  
3.3V 16-Bit Buffer/Line Driver  
with 3-State Outputs  
Capacitance  
Parameters  
(7)  
Description  
Input Capacitance  
Test Conditions  
= 3.3V, V = V or GND  
Typ.  
3.7  
7
Units  
C
V
V
I
CC  
I
CC  
C
Output Capacitance  
= 3.3V, V = V or GND  
O CC  
O
CC  
pF  
(8)  
C
Power Dissipation Capacitance  
V
CC  
= 3.3V, V = 0V or V f =10 MHz  
CC,  
15  
PD  
I
Notes:  
7. All typical values are measured at VCC = 3.3V, TA = 25°C.  
8. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current  
sumption (ICCD) at no output loading and operating at 50% duty cycle, CPD is related to ICCD dynamic operating  
expression: ICCD= (CPD)(VCC)(fIN)+(ICCstatic)  
con-  
current by the  
Switching Characteristics Over Operating Range  
V
= 3.3V ±0.3V  
V
= 2.7V  
CC  
CC  
To  
(Outpu-  
t)  
From  
(Input)  
C = 50pF, R =  
L
L
Parameters  
Description  
Units  
C = 50pF, R = 500Ohm  
L
L
500Ohm  
(9)  
Min.  
1.0  
Typ.  
Max.  
3.4  
Min.  
Max.  
3.8  
t
2.5  
2.5  
2.9  
PLH  
Propagation Delay  
Output Enable Time  
A
Y
Y
t
1.0  
3.4  
3.8  
PHL  
t
1.0  
4.2  
5.0  
PZH  
OE  
t
1.0  
1.0  
1.0  
3.0  
2.5  
2.4  
4.2  
4.0  
3.9  
5.0  
4.7  
4.3  
PZL  
ns  
t
PHZ  
Output Disable Time  
Output to Output  
OE  
Y
t
PLZ  
t
0.5  
SK(O)  
(10)  
Skew  
Notes:  
9. All typical values are measured at VCC = 3.3V, TA = 25°C.  
10. Skew between any two outputs, switching in the same direction.  
PS8652A  
05/19/03  
5
PI74LVTC16244  
3.3V 16-Bit Buffer/Line Driver  
with 3-State Outputs  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
= 2.7V and 3.3V ±0.3V  
6V  
S1  
Open  
GND  
500  
From Output  
Under Test  
Test  
/t  
S1  
t
Open  
6V  
GND  
C
= 50pF  
PLH PHL  
L
500Ω  
(See Note A)  
t
/t  
PLZ PZL  
t
/t  
PHZ PZH  
Load Circuit  
tW  
2.7V  
0V  
1.5V  
1.5V  
Input  
Voltage Waveforms  
Pulse Duration  
Output  
Control  
(Low Level  
Enabling)  
2.7V  
1.5V  
1.5V  
0V  
3V  
t
t
PLZ  
2.7V  
0V  
PZL  
Output  
Waveform 1  
S1 at 6V  
1.5V  
tPLH  
1.5V  
tPHL  
Input  
1.5V  
1.5V  
V
OL  
+0.3V  
(see Note B)  
V
OL  
t
t
PZH  
PHZ  
V
OH  
VOH  
V
OH  
-0.3V  
1.5V  
1.5V  
Output  
Waveform 2  
S1 at GND  
Output  
VOL  
0V  
(see Note B)  
Voltage Waveforms  
Propagation Delay Times  
Voltage Waveforms  
Enable and Disable Times  
Figure 1. Load Circuit and Voltage Waveforms  
Notes:  
A. CL includes probe and jig capacitance.  
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input impulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50W, tR £ 2.5ns, tF £ 2.5ns.  
D. The outputs are measured one at a time with one transition per measurement.  
PS8652A  
05/19/03  
6
PI74LVTC16244  
3.3V 16-Bit Buffer/Line Driver  
with 3-State Outputs  
Packaging Mechanical: 48-pin TSSOP (A)  
48  
.236  
.244  
6.0  
6.2  
1
.488 12.4  
.496 12.6  
.047  
1.20 Max  
SEATING PLANE  
0.09  
0.20  
.004  
.008  
0.45 .018  
0.75 .030  
.002  
.006  
0.05  
0.15  
.007  
.010  
.0197  
BSC  
.319  
BSC  
X.XX  
X.XX  
DENOTES DIMENSIONS  
IN MILLIMETERS  
0.50  
0.17  
0.27  
8.1  
Packaging Mechanical: 48-pin SSOP (V)  
48  
.395  
.420  
10.03  
10.67  
.291  
.299  
7.39  
7.59  
Gauge Plane  
.010  
0.25  
.02  
.04  
0.51  
1.01  
1
.620  
.630  
15.75  
16.00  
0.381  
0.635  
.015  
.025  
x 45˚  
.008  
0.20  
Nom.  
.110 2.79 Max  
.008 0.20  
.0135 0.34  
.025 BSC  
0.635  
.008 0.20  
.016 0.40  
0-8˚  
X.XX  
X.XX  
DENOTES DIMENSIONS  
IN MILLIMETERS  
PS8652A  
05/19/03  
7
PI74LVTC16244  
3.3V 16-Bit Buffer/Line Driver  
with 3-State Outputs  
Ordering Information  
Ordering Code  
Package Code  
Package Type  
PI74LVTC16244A  
PI74LVTC16244AE  
PI74LVTC16244V  
PI74LVTC16244VE  
A
A
V
V
48-pin, 240-mil wide plastic TSSOP (A)  
Pb-free, 48-pin, 240-mil wide plastic TSSOP (A)  
48-pin, 300-mil wide plastic SSOP (V)  
Pb-free, 48-pin, 300-mil wide plastic SSOP (V)  
Notes:  
1. Thermal characteristics can be found on the company web site at http://www.pericom.com/packaging/mechanicals.php  
2. X = Tape/Reel  
Pericom Semiconductor Corporation  
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com  
PS8652A  
05/19/03  
8

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