PI74LVTC244SX [PERICOM]
Bus Driver, LVT Series, 2-Func, 4-Bit, True Output, CMOS, PDSO20, 0.300 INCH, PLASTIC, SOIC-20;型号: | PI74LVTC244SX |
厂家: | PERICOM SEMICONDUCTOR CORPORATION |
描述: | Bus Driver, LVT Series, 2-Func, 4-Bit, True Output, CMOS, PDSO20, 0.300 INCH, PLASTIC, SOIC-20 驱动 光电二极管 逻辑集成电路 |
文件: | 总8页 (文件大小:349K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PI74LVTC244
3.3V 8-Bit Buffers/Line Drivers
with 3-State Outputs
ProductFeatures
ProductDescription
The PI74LVTC244 is a non-inverting 8-bit buffer and line driver
designed for low-voltage 2.7V to 3.6V V operation, with the
• Advanced low power CMOS design for 2.7V to 3.6V
CC
V
operation
CC
capability of interfacing to the 5V system environment. With its
balanced drive characteristics, this high-speed, low power device
provides low ground bounce and transmission line impedance
matching. This makes it ideal for driving on board buses and
transmissionlines.Thedevicecanbeusedastwo4-bitbufferswith
separate output enable (OE) inputs.
• Supports 5V input/output tolerance in mixed signal mode
operation
• Function compatible with LVT family of products
• Balanced ±24mA output drive
• TypicalV
(OutputGroundBounce)<0.8VatV =3.3V,
CC
OLP
T =25°C
A
WhenV isbetween0to1.5Vduringpoweruporpowerdown,the
CC
• I and Power Up/Down 3-State support live insertion
off
outputs of the device are in the high-impedance state. To ensure
the high-impedance state above 1.5V, OE should be tied to Vcc
through a pullup resistor; the minimum value of the resistor is
determined by the current sinking capability of the driver.
• Latch-upperformanceexceeds200mAPerJESD78
• ESDprotectionexceedsJESD22
–2000VHuman-BodyModel(A114-B)
–200VMachineModel(A115-A)
The device fully supports live-insertion with its I and power-up/
off
• Packages:
down 3-state. The I circuitry disables the outputs when the
off
–20-pin209-milwideplasticSSOP(H)
–20-pin173-milwideplasticTSSOP(L)
–20-pin300-milwideplasticSOIC(S)
powerisoff, preventingthebackflowofdamagingcurrentthrough
the device. Power-up/down 3-state places the outputs in the
high-impedance state during power up or power down, preventing
driverconflict.
LogicBlockDiagram
1
19
1OE
2OE
2A1
2
4
18
16
11
13
9
7
1A1
1A2
1A3
1A4
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
2A2
2A3
2A4
6
8
14
12
15
17
5
3
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PI74LVTC244
3.3V 8-Bit Buffers/Line Drivers
with3-StateOutputs
MaximumRatings
(Above which the useful life may be impaired.
For user guidelines, not tested.)
Product Pin Description
Supply voltage range, V .............................. –0.5V to+6.5V
CC
(1)
Pin Name
xOE
Description
Input voltage range, V ................................ –0.5V to+6.5V
I
3-State Output Enable Inputs (Active LOW)
Voltage range applied to any output in the
(1)
high-impedance or power-off state, V
....... –0.5V to+6.5V
O
xAx
Inputs
Voltage range applied to any output in the
xYx
3-State Outputs
Ground
(1,2)
active state, V
................................... –0.5VtoV +0.5V
CC
O
GND
VCC
Input clamp current, I (V <0)..................................... –50mA
IK
I
Output clamp current, I (V <0) ............................... –50mA
OK
O
Power
Continous Output Current I ....................................... ±50mA
O
Continous Current through each V or GND pin ............... ±100mA
CC
(3)
Package thermal impedance, θ
: package H ........... 81°C/W
package L ............ 84°C/W
package S ............ 84°C/W
JA
Product Pin Configuration
Storage Temperature range, T ..................... –65°Cto150°C
stg
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
1
2
20
19
18
17
16
15
14
13
12
11
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
Notes:
Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
3
4
5
6
7
8
1. Inputnegative-voltageandoutputvoltageratingsmaybeexceededifthe
input and output clamp current ratings are observed.
2. This value is limited to 6.5V maximum.
9
2Y1
1Y4
2A1
10
GND
3.ThepackagethermalimpedanceiscalculatedinaccordancewithJESD51.
Truth Table(1)
Inputs
Outputs
xOE
L
xAx
H
xYx
H
L
L
L
H
X
Z
Notes:
1. H = HighSignalLevel
L = LowSignalLevel
X = Don’t Care or Irrelevant
Z = HighImpedance
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PI74LVTC244
3.3V 8-Bit Buffers/Line Drivers
with3-StateOutputs
RecommendedOperatingConditions(1)
Min.
2.7
Max.
Units
VCC Supply Voltage
Operating
3.6
VIH High-level Input Voltage
VIL Low-level Input Voltage
VI Input Voltage
VCC = 2.7V to 3.6V
VCC = 2.7V to 3.6V
2.0
0.8
5.5
VCC
5.5
–12
–24
12
V
0
0
0
High or Low State
3-State
VO Output Voltage
VCC = 2.7V
IOH High-level output current
IOL Low-level output current
VCC = 3.0V to 3.6V
VCC = 2.7V
mA
VCC = 3.0V to 3.6V
24
10
ns/V
μs/V
°C
Δt/ΔV Input transition rise or fall rate
Δt/ΔVCC Power-up ramp rate
150
–40
TA
Operating free-air temperature
85
Notes:
1. All unused inputs must be held at VCC or GND to ensure proper device operation.
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PI74LVTC244
3.3V 8-Bit Buffers/Line Drivers
with3-StateOutputs
DCElectricalCharacteristics(OvertheOperatingRange, T =–40°C+85°C)
A
Paramete-
Description
Test Conditions
Min.
Max.
Units
rs
V
Clamp Diode Voltage
V
V
V
= 2.7V
I = –18mA
–1.2V
IK
CC
CC
CC
I
= 2.7V to 3.6V
= 2.7V
I
= –100μA
= –12mA
= –12mA
= –24mA
= 100μA
= 12mA
V
–0.2V
OH
CC
I
2.2
2.4
2.2
OH
Outout High Voltage
Outout Low Voltage
V
OH
I
OH
V
= 3V
CC
I
V
OH
V
V
= 2.7V to 3.6V
= 2.7V
I
0.2
0.4
0.4
0.55
±5
CC
OL
I
CC
OL
V
OL
I
= 12mA
OL
V
= 3V
CC
I
= 24mA
OL
I
Input leakage Current
Power Off Disable
V
V
= 0 to 3.6V
= 0V
0 ≤V ≤5.5V
I
CC
I
I
V or V = 0 to 5.5V
±5
OFF
CC
I
O
I
3-State Output Leakage
Current
OZ
V
V
V
= 2.7V to 3.6V
= 0V to 1.5V
= 1.5V to 0V
0 ≤ V ≤ 5.5V
±5
±5
±5
CC
CC
CC
O
V
= 0.5V to 5.5V,
O
I
Power-Up 3-State Current
OZPU
OE = don't care
μA
V
= 0.5V to 5.5V,
O
I
Power-Down 3-State Current
OZPD
OE = don't care
V = V or GND
Quiescent Power Supply
Current
I
CC
I
V
V
= 2.7V to 3.6V
= 3V to 3.6V
I = 0
O
100
100
CC
CC
CC
3.6V ≤ V ≤ 5.5V
I
(1)
One input at V - 0.6V
CC
Increase in I
ΔI
CC
CC
Other inputs at V or GND
CC
Notes:
1. This is the increase in supply current for each input that is at the specified TTL voltage level rather than V or GND
CC
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PI74LVTC244
3.3V 8-Bit Buffers/Line Drivers
with3-StateOutputs
Capacitance
(1)
Parameters
Description
Input Capacitance
Test Conditions
= 3.3V, V = V or GND
Typ.
3.0
6.2
28
Units
C
V
CC
V
CC
V
CC
IN
I
CC
C
Output Capacitance
= 3.3V, V = V or GND
pF
OUT
O
CC
(2)
C
Power Dissipation Capacitance
= 3.3V, V = 0V or V
f =10 MHz
PD
I
CC,
Notes:
1. All typical values are measured at VCC = 3.3V, TA = 25°C.
2. CPD is defined as the value of the internal equivalent capacitance withic is derived from dynamic operating current consumption (ICCD) at no
output loading and operating at 50% duty cycle, CPD is related to ICCD dynamic operating current by the expression: ICCD
(CPD)(VCC)(fIN)+(ICCstatic).
=
SwitchingCharacteristicsOverOperatingRange
V
= 3.3V ±0.3V
V
= 2.7V
CC
CC
From
(Input)
To
(Output)
Parameters
Description
Units
C = 50pF, R = 500-ohm
C = 50pF, R = 500-ohm
L
L
L
L
Min.
Max.
5.2
Min.
Max.
5.8
t
1.0
1.0
1.0
1.0
1.0
1.0
Propagation
Delay
PLH
A
Y
Y
t
5.2
5.8
PHL
t
5.8
6.8
PZH
Output Enable
Time
OE
t
1.0
1.0
1.0
5.8
4.6
4.6
1.0
1.0
1.0
6.8
4.8
4.8
PZL
ns
t
PHZ
Output Disable
Time
OE
Y
t
PLZ
Output to
Output Skew
t
0.5
(1)
SK(O)
Notes:
1. Skew between any two outputs, switching in the same direction.
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PI74LVTC244
3.3V 8-Bit Buffers/Line Drivers
with3-StateOutputs
PARAMETERMEASUREMENTINFORMATION
VCC = 2.7V and 3.3V ±0.3V
6V
S1
Open
GND
500Ω
From Output
Under Test
Test
/t
S1
CL = 50pF
500Ω
t
t
Open
6V
(See Note A)
PLH PHL
/t
PLZ PZL
t
/t
GND
PHZ PZH
LoadCircuit
tW
2.7V
0V
1.5V
1.5V
Input
VoltageWaveforms
PulseDuration
2.7V
Output
Control
(Low Level
Enabling)
1.5V
1.5V
tPLZ
0V
3V
tPZL
2.7V
0V
Output
Waveform 1
S1 at 2 x VCC
(see Note B)
1.5V
tPLH
1.5V
tPHL
Input
1.5V
VOL +0.15V
tPHZ
VOL
VOH
tPZH
VOH
Output
Waveform 2
S1 at GND
1.5V
1.5V
V
OH –0.15V
Output
1.5V
VOL
0V
(see Note B)
VoltageWaveforms
PropagationDelayTimes
VoltageWaveforms
Enable and Disable Times
Figure1.LoadCircuitandVoltageWaveforms
Notes:
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
•
•
All input impulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 500Ohm, tR ≤ 2.5ns, tF ≤ 2.5ns.
The outputs are measured one at a time with one transition per measurement.
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PI74LVTC244
3.3V 8-Bit Buffers/Line Drivers
with3-StateOutputs
PackagingMechanical:20-pinSSOP(H)
20
5.00
5.60
.197
.220
1
0.09
0.25
.004
.009
.272
.295
6.90
7.50
.022
.037
0.55
0.95
.078
2.00
Max
.291
.322
7.40
8.20
SEATING
PLANE
.002
Min
0.050
.0098
Max.
0.25
.0256
BSC
0.65
PackagingMechanical:20-pinTSSOP(L)
20
.169
.177
4.3
4.5
1
.252
.260
0.09
0.20
.004
.008
6.4
6.6
.047
1.20
Max
0.45 .018
0.75 .030
SEATING
PLANE
.238
.269
6.1
6.7
.002
.006
0.05
0.15
.007
.012
0.19
0.30
.0256
BSC
0.65
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PI74LVTC244
3.3V 8-Bit Buffers/Line Drivers
with3-StateOutputs
PackagingMechanical:20-pinSOIC(S)
20
7.40
7.60
.2914
.2992
0.254
0.737
.010
.029
x 45˚
1
.496
.511
12.60
12.99
.0091
.0125
0.23
0.32
0-8˚
0.41
1.27
.016
.050
.020 0.508
.030 0.762
REF
2.35
2.65
.0926
.1043
.394
.419
10.00
10.65
SEATING
PLANE
0.10
0.30
.0040
.0118
.050
BSC
1.27
.013
.020
0.33
0.51
X.XX
DENOTES CONTROLLING
X.XX
DIMENSIONS IN MILLIMETERS
OrderingInformation
Ordering Code
PI74LVTC244H
PI74LVTC244L
PI74LVTC244S
Packaging Code
Description
H
L
S
20-pin, 209-mil wide plastic SSOP
20-pin, 173-mil wide plastic TSSOP
20-pin, 300-mil wide plastic SOIC
Notes:
• Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
• Adding an X suffix = Tape/Reel
PericomSemiconductorCorporation•1-800-435-2336 • www.pericom.com
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