PI74VCX16373AE [PERICOM]
16-Bit Transparent D-Type Latch with 3-State Outputs; 16位透明D类锁存器具有三态输出
| 型号： | PI74VCX16373AE |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | 16-Bit Transparent D-Type Latch with 3-State Outputs |
| 文件： | 总8页 (文件大小：260K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI74VCX16373
16-Bit Transparent D-Type Latch
with 3-State Outputs
Features
Description
• The PI74VCX Family is designed for low voltage
PericomSemiconductor’sPI74VCX16373isparticularlysuitable
for implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers. This device can be used as two 8-
bit latches or one 16-bit latch. When the Latch Enable (LE) input
is HIGH, the Q outputs follow the (D) inputs. When LE is taken
LOW, the Q outputs are latched at the levels set up at the D inputs.
operation, V
= 1.8V to 3.6V
DD
• 3.6V I/O Tolerant Inputs and Outputs
• Supports Live Insertion
• Balanced Drive, ±24mA
• Uses patented Noise Reduction Circuitry
AbufferedOutputEnable(OE)inputcanbeusedtoplacetheeight
outputs in either a normal logic state (high or low logic levels) or
a high-impedance state in which the outputs neither load nor drive
the bus lines significantly. The high-impedance state and the
increased drive provide the capability to drive bus lines without
need for interface or pullup components. OE does not affect
internal operations of the latch. Old data can be retained or new
data can be entered while the outputs are in the high impedance
state.
• Typical V
(Output Ground Bounce)
OLP
< 0.6V at V
= 2.5V, T = 25ºC
DD
A
• Typical V
(Output V Undershoot)
OHV
OH
<–0.6VatV =2.5V,T =25ºC
DD
A
• Power-Off high impedance inputs and outputs
• Industrial operation at –40°C to +85°C
• Packaging(Pb-free&Greenavailable):
–48-pin240-milwideplasticTSSOP(A)
To ensure the high-impedance state during power up or power
down, OE should be tied to V
through a pullup resistor; the
DD
minimumvalueoftheresistorisdeterminedbythecurrent-sinking
capability of the driver.
BlockDiagram
The PI74VCX family is I/O Tolerant, allowing it to operate in
mixed 1.8V/3.6V systems.
1
1OE
48
1LE
C1
2
1Q1
47
1D1
1D
To Seven Other Channels
24
25
2OE
2LE
C1
1D
13
2Q1
36
2D1
To Seven Other Channels
PS8326C
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1
PI74VCX16373
16-BitTransparentD-TypeLatch
with3-StateOutputs
PinDescription
Truth Table(1)
Pin Name
OE
Description
Inputs
LE
H
Outputs
Output Enable Input (Active LOW)
LatchEnable(ActiveHIGH)
Data Inputs
OE
L
D
H
L
Q
H
LE
Dx
L
H
L
Qx
3-State Outputs
GND
VDD
Ground
L
L
X
X
Q0
Z
Power
H
X
Notes:
1. H = HighSignalLevel
L = LowSignalLevel
X = Don’t Care or Irrelevant
Z = HighImpedance
PinConfiguration
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1LE
1D1
1D2
GND
1D3
1D4
VDD
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
VDD
2D5
2D6
GND
2D7
2D8
2LE
1OE
1Q1
1Q2
GND
1Q3
1Q4
VDD
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
VDD
2Q5
2Q6
GND
2Q7
2Q8
2OE
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
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10/27/06
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PI74VCX16373
16-BitTransparentD-TypeLatch
with3-StateOutputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Supply Voltage Range, V
.............................................. –0.5V to 4.6V
DD
Input Voltage Range, V ....................................................... -0.5V to 4.6V
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reli-
ability.
I
Output Voltage Range, V (3-Stated) .......................... -0.5V to 4.6V
O
(1)
Output Voltage Range, V
(Active)............ –0.5V to V
+ 0.5V
DD
O
DC Input Diode Current (I ) V < 0V.................................... -50mA
IK
I
DC Output Diode Current (I
)
OK
V < 0V................................................................................ -50mA
O
V > V
O
......................................................................................... -50mA
DD
DC Output Source/Sink Current (I /I ) ............................ ±50mA
OH OL
DC V
or GND Current per Supply Pin (I or GND) .... ±100mA
CC
DD
Storage Temperature Range, T
............................ –65°C to150°C
STG
Notes:
1. Absolute maximum of I must be observed.
O
RecommendedOperatingConditions(1)
Parameters
Description
Conditions
Operating
Data Retention Only
Min.
1.8
Max.
3.6
Units
V
DD
Supply voltage
1.2
3.6
V
High-level input voltage
V
= 2.7V to 3.6V
= 2.7V to 3.6V
2.0
IH
DD
DD
V
V
Low-level input voltage
Input voltage
V
0.8
3.6
IL
V
-0.3
0
I
Active State
Off State
V
DD
V
Output voltage
O
0
3.6
V
DD
V
DD
V
DD
= 3.0V to 3.6V
= 2.3V to 2.7V
= 1.8V
±24
±18
±6
Output current in I /I
mA
OH OL
(2)
Input transistion rise or fall rate
0
10
85
ns/V
C
Δt/Δv
T
A
Operating free-air temperature
−40
Notes:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
2. As measured between 0.8V and 2.0V, V = 3.0V.
DD
PS8326C
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PI74VCX16373
16-BitTransparentD-TypeLatch
with3-StateOutputs
Electrical Characteristics over Recommended Operating Free-Air Temperature Range
(unless otherwise noted)
DC Characteristics (2.7V < V ≤ 3.6V)
DD
Parameters
Description
Conditions
V
DD
Min.
Typ.
Max.
Units
V
HIGH Level Input Voltage
LOW Level Input Voltage
2.0
IH
V
2.7 - 3.6
0.8
IL
I
OH
= −100 μA
V
DD
-0.2
I
= −12 mA
= −18 mA
= −24 mA
= 100 μA
= 12 mA
= 18 mA
= 24 mA
2.7
3.0
2.2
OH
HIGH Level Output
Voltage
V
OH
I
OH
2.4
2.2
V
I
OH
I
OL
2.7 - 3.6
2.7
0.2
0.4
I
OL
LOW Level Output
Voltage
V
OL
I
OL
0.4
3.0
I
OL
0.5
I
I
Input Leakage Current
V = 0.0V, V = 3.6V
3.6
±5.0
I
1
0 ≤ V ≤ 3.6V
O
I
3-STATE Output Leakage
2.7 - 3.6
±10
10
OZ
V = V or V
IL
I
IH
Power-OFF Leakage
Current
I
0 ≤ (V ,V ) ≤ 3.6V
0
OFF
I
O
μA
V = V to GND
20
I
DD
I
Quiescent Supply Current
DD
V
V
≤ (V ,V ) ≤ 3.6V
±20
DD
I
O
2.7 - 3.6
= V -0.6V,
IH
DD
ΔI
Increase in I per input
DD
750
DD
Other inputs at V or GND
DD
PS8326C
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06-0203
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PI74VCX16373
16-BitTransparentD-TypeLatch
with3-StateOutputs
DC Characteristics (2.3V ≤ VDD ≤ 2.7V)
Parameters
Description
Conditions
V
DD
Min.
Typ.
Max.
Units
V
HIGH Level Input Voltage
LOW Level Input Voltage
1.6
IH
V
2.3 - 2.7
0.7
IL
I
= -100μA
= -6mA
V
-0.2
OH
DD
I
OH
2.0
V
HIGH Level Output Voltage
LOW Level Output Voltage
OH
I
= -12mA
= -18mA
= 100μA
= 12mA
2.3
1.8
1.7
OH
V
I
OH
I
OL
2.3 - 2.7
2.3
0.2
0.4
I
OL
V
OL
I
OL
= 18mA
0.4
I
Input Leakage Current
V = 0.0V, V = 2.7V
2.7
2.3 - 2.7
0
±5.0
I
1
1
0 ≤ V ≤ 3.6V
O
I
3-STATE Output Leakage
±10
OZ
V = V or V
IL
I
IH
μA
I
Power-OFF Leakage Current 0 ≤ (V ,V ) ≤ 3.6V
10
20
OFF
I
O
V = V or GND
I
DD
I
DD
Quiescent Supply Current
2.3 - 2.7
V
DD
≤ (V ,V ) ≤ 3.6V
±20
I
O
DC Characteristics (1.8V ≤ V
≤ 2.3V)
DD
Parameters
Description
Conditions
V
DD
Min.
Typ.
Max.
Units
V
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Voltage
0.7 x V
DD
IH
1.8 - 2.3
V
0.2 x V
IL
DD
V
OH
I
= -100μA
= -6mA
= 100μA
= 6mA
V
DD
-0.2
OH
V
I
OH
1.4
V
OL
LOW Level Output Voltage
I
OL
0.2
0.3
1.8
I
OL
I
Input Leakage Current
= 0.0V, V = 1.8V
1 1
±5.0
±10
V
I
0 ≤ V ≤ 3.6V
O
I
3-STATE Output Leakage
OZ
V = V or V
IL
I
IH
μA
I
Power-OFF Leakage Current 0 ≤ (V ,V ) ≤ 3.6V
0
10
20
OFF
I
O
V = V or GND
1.8
1.8
I
DD
I
Quiescent Supply Current
DD
V
≤ (V ,V ) ≤ 3.6V
±20
DD
I
O
PS8326C
10/27/06
06-0203
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PI74VCX16373
16-BitTransparentD-TypeLatch
with3-StateOutputs
ACElectricalCharacteristics(1)
T = -40°C to +85°C, C = 30pF, R = 500Ω
A
L
L
V
DD
= 3.3V ± 0.3V
V
DD
= 2.5V ± 0.2V
V = 1.8V
DD
Symbol
Parameters
Prop Delay, DTOQ
Prop Delay, LE to Q
Output Enable Time
Output Disable Time
Output to Output Skew
Min.
0.8
Max.
3.0
Min.
1.0
Max.
3.4
Min.
1.5
Max. Units
t
t
6.0
6.0
PLH, PHL
t
t
0.8
3.0
1.0
3.9
1.5
PLH, PHL
t
, t
0.8
3.5
1.0
4.6
1.5
7.0
5.0
0.5
ns
PZH PZL
t
, t
0.8
3.5
1.0
3.8
1.5
PHZ PLZ
(2)
t
t
0.5
0.5
OSHL, OSLH
Notes:
1. For C = 50pF add approximatly 300ps to AC maximum specification.
L
2. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of
the same device. The specification applies to any outputs switching in the same direction, either HIGH or LOW (t )orLOW
OSHL
to HIGH (t
).
OSLH
AC Setup Requirements
T = -40ºC to +85ºC, C = 30pF, R = 500Ω
A
L
L
V
DD
=3.3V ± 0.3V
V
DD
=2.5V ± 0.2V
V
DD
=1.8V
Symbol
Parameters
Setup Time, D to LE
Hold Time, D to LE
LE Pulse Width, High
Min.
1.5
Typ.
Min.
1.5
Typ.
Min.
Typ.
Units
t
SU
2.5
1.0
3.0
t
H
1.0
1.0
ns
t
W
1.5
1.5
Dynamic Switching Characteristics
Symbol
Parameters
Conditions
V
DD
T = +25°C Typical
A
Units
1.8
2.5
3.3
0.25
0.6
0.8
V
OLP
V
OLP
V
OLP
Quiet Output Dynamic Peak V
C = 50pF, V = V , V = 0V
L IH DD IL
OL
1.8
2.5
3.3
-0.25
-0.6
-0.8
Quiet Output Dynamic Valley V
Quiet Output Dynamic Valley V
C = 50pF, V = V , V = 0V
V
OL
L
IH
DD IL
1.8
2.5
3.3
1.5
1.9
2.2
C = 50pF, V = V , V = 0V
OH
L
IH
DD IL
Capacitance
Symbol
Parameters
Conditions
= 1.8, 2.5V or 3.3V, V = 0V or V
DD
T = +25°C Typical
Units
A
C
Input Capacitance
V
DD
6
7
IN
I
C
Output Capacitance V = 0V or V , V = 1.8V, 2.5V or 3.3V
I DD DD
OUT
pF
Power Dissipation
Capacitance
V = 0V or V , F = 10 MHz
I
DD
C
20
PD
V
DD
= 1.8V, 2.5V or 3.3V
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PI74VCX16373
16-BitTransparentD-TypeLatch
with3-StateOutputs
Test Circuits and Switching Waveforms
Switch Position
Parameter Measurement Information (VDD = 1.8V - 3.6V)
Test
S1
t
Open
2 x V
GND
PD
2 x VDD
t
/t
PLZ PZL
DD
R1
t
/t
500Ω
PHZ PZH
From Output
Under Test
Open
GND
Pulse Width
RL
30pF
500Ω
C
L
V
V
DD
(See Note A)
Low-High-Low
Pulse
DD/2
0V
t
W
V
DD
High-Low-High
Pulse
V
DD/2
Setup, Hold, and Release Timing
0V
V
V
0V
DD
DD/2
Data
Input
Propagaton Delay
t
SU
tH
V
DD
V
V
0V
DD
DD/2
Timing
Input
V
DD/2
Input
0V
t
PHL
t
PLH
V
DD
Notes:
Output
V
DD/2
A. C includes probe and jig capacitance.
L
V
OL
B. Waveform 1 is for an output with internal conditions such that
the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that
the output is HIGH except when disabled by the output control.
t
PHL
tPLH
V
DD
Opposite Phase
Input Transition
V
DD/2
0V
•
All input pulses are supplied by generators having the
following characteristics: P ≤ 10 MHz, Z = 50Ω, t ≤ 2ns, t ≤ 2ns,
RR
O
R
F
measured from 10% to 90%, unless otherwise specified.
The outputs are measured one at a time with one transition per
measurement.
•
Enable Disable Timing
V
DD
Output
Control
V
DD/2
0V
(Active LOW)
t
PLZ
t
PZL
PZH
V
DD
V
DD
Output
Waveform 1
S1 at 2xVDD
(see Note B)
V
DD/2
+0.15V
-0.15V
V
OL
t
t
PHZ
V
OH
Output
Waveform 2
S1 at GND
(see Note B)
V
DD/2
0V
PS8326C
10/27/06
06-0203
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PI74VCX16373
16-BitTransparentD-TypeLatch
with3-StateOutputs
PackagingMechanical:48-pinTSSOP(A)
48
.236
.244
6.0
6.2
1
.488 12.4
.496 12.6
.047
1.20 Max
SEATING PLANE
0.09
0.20
.004
.008
0.45 .018
0.75 .030
.002
.006
0.05
0.15
.007
.010
.0197
BSC
.319
BSC
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
0.50
0.17
0.27
8.1
OrderingInformation
Ordering Code
PI74VCX16373A
PI74VCX16373AE
Notes:
Package Code
PackageType
A
A
48-pinTSSOP
Pb-free&Green,48-pinTSSOP
• Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
• E = Pb-free & Green
• Adding an X suffix = Tape/Reel
PericomSemiconductorCorporation • 1-800-435-2336 • www.pericom.com
PS8326C
10/27/06
06-0203
8
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