PI90LV9637 [PERICOM]
LVDS High-Speed Differential Line Receivers; LVDS高速差动线路接收器
| 型号： | PI90LV9637 |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | LVDS High-Speed Differential Line Receivers |
| 文件： | 总9页 (文件大小：266K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI90LV3486/PI90LVT3486
PI90LV9637/PI90LVT9637
LVDS High-Speed Differential
Line Receivers
Features
Description
• SignalingRates>400Mbps(200MHz)
• Single3.3VPowerSupplyDesign
ThePI90LV/LVT3486andPI90LV/LVT9637aredifferentialline
receivers that use low-voltage differential signaling (LVDS) to
support data rates in excess of 400 Mbps. These products are
designed for applications requiring high-speed, low-power con-
sumption and low noise generation.
• Accepts±350mV(typical)DifferentialSwing
• MaximumDifferentialSkewof 0.35ns
• Integrated110-OhmterminationonPI90LVTxxxx
• Maximum Propagation Delay of 4.7ns
• LowVoltageTTL(LVTTL)Outputs
• IndustrialTemperatureOperatingRange:-40°Cto85°C
• Open, Short, and Terminated Fail Safe
• MeetsorExceedsANSI/TIA/EIA-644LVDSStandard
Adifferentialinputsignal(350mV)istranslatedbythedeviceto3V
CMOS output level.
Applications
Applications include point-to-point and multidrop baseband data
transmission over controlled impedance media of approximately
100-ohms. The transmission media can be printed circuit board
traces, backplanes, or cables.
• Packaging(Pb-free&Greenavailable):
ThePI90LV/LVT3486andPI90LV/LVT9637,aswellascompanion
linedriversPI90LV/LVB3487andPI90LV/LVB9638providenew
alternatives to RS-232, PECL, and ECL devices for high-speed,
point-to-point interface applications.
-16-PinTSSOP(L)
-16-PinSOIC(W)
-8-PinSOIC(W)
-8-PinMSOP(U)
PI90LV/LVT3486
16-Pin
W, L
PI90LV/LVT9637
8-Pin
W,U
PS8667A
10/04/04
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PI90LV3486/PI90LVT3486
PI90LV9637/PI90LVT9637
LVDS High-Speed Differential Line Receivers
FunctionTables
Absolute Maximum Ratings (see Note 1, Page 4)
SupplyVoltage(V ) ....................................... –0.3Vto+4.0V
CC
PI90LV/LVT3486
Input Voltage (R , R ) ............................... –0.3Vto+3.9V
IN+ IN-
Enable
Differential Inputs
Output
EnableInputVoltage(EN)...................... –0.3Vto(V +0.3V)
CC
EN
H
R
IN+, RIN–
ROUT
Output Voltage (R
) .......................... –0.3Vto(V +0.3V)
CC
OUT
VID ≥ 100mV
H
?
S Package .................................................................... 750mW
Derate S Package ................................8.2mW/°Cabove+25°C
Storage Temperature Range .......................... –65°Cto+150°C
Lead Temperature Range Soldering (4s) ......................+260°C
MaximumJunctionTemperature ..................................+150°C
ESDRating ................................................................... ≥10kV
H
–100mV < VID < 100mV
H
VID ≤ –100mV
L
Z
H
L
X
H
Open
Note:
PI90LV/LVT9637
Stresses greater than those listed under Absolute Maximum Ratings may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
Differential Inputs
Output
R
IN+, RIN–
ROUT
H
VID ≥ 100mV
–100mV < VID < 100mV
VID ≤ –100mV
Open
?
L
RecommendedOperatingConditions
H
Min.
Typ.
Max. Units
Supply Voltage (VCC
)
+3.0
+3.3
+3.6
V
Receiver Input Voltage
GND
+3.0
PinDescriptions
Operating Free Air
Temperature (TA)
–40
+25
+85
°C
Name
Description
ROUT
RIN+
RIN–
GND
VCC
TTL/CMOS receiver output pins
Non-inverting receiver input pins
Inverting receiver input pins
Ground pin
Positive power supply pin, +3.3V ±10%
PS8667A
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PI90LV3486/PI90LVT3486
PI90LV9637/PI90LVT9637
LVDS High-Speed Differential Line Receivers
ElectricalCharacteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Note 2)
Symbol
Parameter
Conditions
Pin
Min.
Typ. Max. Units
V
Differential Input High
Threshold
TH
+20
–20
+100
mV
(12)
Vcm = +1.2V
V
Differential Input Low
Threshold
TL
–100
0.1
(5)
VCMR Common-Mode Voltage
Range
V
ID
= 200mV peak-to-peak
= +2.8V
R
,
IN+
IN-
2.6
V
R
I
IN
Input Current
V
IN
V
IN
V
IN
–10
–10
–20
2.7
2.7
2.7
±1
±1
+10
+10
+20
V
CC
= +3.6 or 0V
= 0V
µA
= +3.6V
V
CC
= 0V
V
OH
Output High Voltage
I
OH
= –0.4mA, V = +200mV
ID
3.0
3.0
3.0
0.1
–48
±1
I
OH
= –0.4mA, Input terminated
= –0.4mA, Input shorted
V
I
OH
R
OUT
V
OL
Output Low Voltage
I
OL
= 2mA, V = –200mV
0.25
–120
+10
ID
(10)
I
OS
Output Short Circuit Current Enabled, Vout = 0V
–15
–10
mA
µA
I
OZ
Output Three-State Current
Disabled, V
= 0V or V
OUT CC
V
Input High Voltage
Input Low Voltage
Input Current
2.0
GND
–20
V
CC
IH
V
V
0.8
IL
EN
I
V
= 0V or V , Other Input = V or GND
±1
–0.8
10
+20
µA
V
I
IN
CC
CC
V
CL
Input Clamp Voltage
I
CL
= –18mA
–1.5
I
CC
No Load Supply Current
Receivers Enabled
EN = V or GND, Inputs Open
15
15
10
CC
EN = 2.4V or 0.5V, Inputs Open
EN = GND, Inputs Open
10
7
V
CC
mA
I
No Load Supply Current
Receivers Disabled
CCZ
C
Input Capacitance
5
10
pF
W
R
TERM
Termination Impedance
PI90LVTxxxx
90
110
143
Ω
PS8667A
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PI90LV3486/PI90LVT3486
PI90LV9637/PI90LVT9637
LVDS High-Speed Differential Line Receivers
SwitchingCharacteristics
Over supply voltage and operating temperature ranges, unless otherwise specified. (Notes 3,4,7,8)
Symbol
tPHLD
tPLHD
tSKD1
tSKD2
tSKD3
tSKD4
tTLH
Parameter
Conditions
Min. Typ. Max. Units
Differential Propagation Delay High to Low (VCM = 1.23V)
1.8
1.8
0
4.7
4.7
0.5
0.5
1.0
1.5
1.2
1.2
12
Differential Propagation Delay Low to High (VCM = 1.23V)
(6)
Differential Pulse Skew | tPHLD - tPLHD
|
0.1
0.1
Differential Channel-to-Channel Skew-same device(7)
Differential Part-to-Part Skew(8)
Differential Part-to-Part Skew(9)
Rise Time
0
CL = 10pF
VID = 200mV
(Figures 1 & 2)
ns
0.35
0.35
8
tTHL
Fall Time
tPHZ
Disable Time High to Z
RL = 2kΩ
tPLZ
Disable Time Low to Z
6
12
CL = 10pF
(Figures 3 & 4)
tPZH
Enable Time Z to High
11
17
tPZL
Enable Time Z to Low
11
17
fMAX
Maximum Operating Frequency(13)
All channels switching
250
MHz
Notes:
1.
“Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply
that the devices should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.
Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless
otherwise specified.
2.
3.
4.
5.
All typicals are given for: VCC = +3.3V, TA = +25°C.
Generator waveform for all tests unless otherwise specified: f = 1 MHz, ZO = 50Ω, tR and tF (0% to 100%) ≤ 3ns for RIN
.
The VCMR range is reduced for larger VID. Example : if VID = 400mV, the VCMR is 0.2V to 2.2V. The fail-safe condition with inputs
shorted is valid over a common-mode range of 0V to 2.3V. A VID up tp VCC - 0V may be applied to the RIN+ / RIN- inputs with the
Common-Mode voltage set to VCC/2. Propagation delay and Differential Pulse skew decrease when VID is increased from 200mV to
400mV. Skew specifications apply for 200mV ≤ VID ≤ 800mV over the common mode range.
6.
7.
8.
9.
tskd1 is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the
samechannel.
t
SKD2, Channel-to-Channel Skew, is defined as the difference between the propagation delay of one channel and that of the others on the
same chip with any event on the inputs.
SKD3, Part-to-Part Skew, is the differential Channel-to-Channel skew of any event between devices. This specification applies to devices
at the same VCC,and within 5ºC of each other within the operating temperature range.
t
t
SKD4, Part-to-Part Skew, is the differential Channel-to-Channel skew of any event between devices. This specification applies
to devices over recommended operating temperature and voltage ranges, and across process distribution. tskd4 is defined as IMax - Mini
differential propagation delay.
10. Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at
a time, do not exceed maximum junction temperature specification.
11. CL includes probe and jig capacitance.
12.
VCC is always higher than RIN+ and RIN- voltage. RIN- and RIN+ are allowed to have a voltage range -0.2V to VCC- VID/2.
However, to be compliant with AC specifications, the common voltage range 0.1V to 2.3V.
13. fmax generator input conditions: tR = tF < 1ns, (0% to 100%), 50% duty cycle, differential (1.05V to1.35V peak to peak).
Output Criteria: duty cycle = 60%/40%, VOL (max 0.4V), VOH (min 2.7V), Load = 10pF (stray plus probes).
PS8667A
10/04/04
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PI90LV3486/PI90LVT3486
PI90LV9637/PI90LVT9637
LVDS High-Speed Differential Line Receivers
ParameterMeasurementInformation
R
R
IN+
R
R
OUT
Generator
IN–
C
L
50Ω
50Ω
Receiver Enabled
Figure1.ReceiverPropagationDelayandTransitionTimeTestCircuit
RIN-
+1.3V
+1.1V
VID 200mV
=
0V (Differential)
tPLHD
+1.2V
tPHLD
80%
RIN+
80%
1.5V
ROUT
1.5V
20%
20%
VOL
tTLH
tTHL
Figure2.ReceiverPropagationDelayandTransitionTimeWaveforms
VCC
CL includes load and test jig capacitance.
S1 = VCC for TPZL, and TPLZ measurements
S1= GND for tPZH and tPHZ measurements
S1
RL
Device
Under
Test
EN
RIN+
RIN–
ROUT
Generator
CL
50Ω
Figure3.ReceiverThree-StateDelayTestCircuit
PS8667A
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PI90LV3486/PI90LVT3486
PI90LV9637/PI90LVT9637
LVDS High-Speed Differential Line Receivers
EN When EN* = VCC
3V
1.5V
1.5V
0V
3V
1.5V
1.5V
tPLZ
0V
EN* When EN = GND
tPZL
VCC
VOL
50%
Output When
VID = -100mV
0.5V
0.5V
tPZH
tPHZ
Output When
VID = +100mV
VOH
50%
GND
Figure4.ReceiverThree-StateDelayWaveforms
Balanced System
Enable
1/4 PI90LV3486
+
Data
Input
Data
Output
RT 100Ω
–
ANY LVDS DRIVER
Figure5.Point-to-PointApplication
PS8667A
10/04/04
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PI90LV3486/PI90LVT3486
PI90LV9637/PI90LVT9637
LVDS High-Speed Differential Line Receivers
PackagingMechanical:16-PinMSOP(U)
.003
.012
15˚ Max.
0.07
0.30
.003
.012
0.07
0.30
Gauge
Plane
.010
0.25
.016
.028
0.40
0.70
0˚- 6˚
15˚ Max.
.037
0.95
REF
Detail A
.112
.120
2.85
3.05
Detail A
15 MAX
˚
.114
.122
2.90
3.10
15 MAX
˚
.114
.122
2.90
3.10
PackagingMechanical:8-PinSOIC(W)
8
.149
.157
3.78
3.99
0.25
0.50
.0099
.0196
x 45˚
0.19
0.25
.0075
.0098
1
0-8˚
.189
.196
4.80
5.00
0.40
.016
1.27
.050
.016
.026
0.406
0.660
.2284
1.35
1.75
.053
.068
.2440
5.80
6.20
SEATING PLANE
REF
.050
BSC
0.10
0.25
.0040
.0098
1.27
.013
.020
0.330
0.508
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
PS8667A
10/04/04
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PI90LV3486/PI90LVT3486
PI90LV9637/PI90LVT9637
LVDS High-Speed Differential Line Receivers
PackagingMechanical:16-PinTSSOP(L)
16
.169
.177
4.3
4.5
1
0.09
0.20
.193
.201
.004
.008
4.9
5.1
.047
0.45 .018
0.75 .030
max.
1.20
SEATING
PLANE
.252
BSC
6.4
.002
.006
0.05
0.15
.0256
BSC
.007
.012
X.XX DENOTES CONTROLLING
X.XX DIMENSIONS IN MILLIMETERS
0.65
0.19
0.30
PackagingMechanical:16-PinSOIC(W)
16
3.78
3.99
.149
.157
0.25
0.50
.0099
.0196
x 45˚
1
0.19
0.25
.0075
.0098
0-8˚
.386
.393
9.80
10.00
0.41
1.27
.016
.050
1.35
1.75
.053
.068
.0155
.0260
.2284
.2440
5.80
6.20
0.393
0.660
SEATING PLANE
REF
0.10
0.25
.0040
.0098
.050
.013
BSC
.020
1.27
0.330
0.508
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
PS8667A
10/04/04
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PI90LV3486/PI90LVT3486
PI90LV9637/PI90LVT9637
LVDS High-Speed Differential Line Receivers
OrderingInformation
Ordering Code
PI90LV3486L
Package Code
PackageType
L
L
W
W
L
16-pinTSSOP
PI90LV3486LE
PI90LV3486W
PI90LV3486WE
PI90LVT3486L
PI90LVT3486LE
PI90LVT3486W
PI90LVT3486WE
PI90LV9637U
Pb-free&Green,16-pinTSSOP
16-pinSOIC
Pb-free&Green,16-pinSOIC
16-pinTSSOP
Pb-free&Green,16-pinTSSOP
16-pinSOIC
Pb-free&Green,16-pinSOIC
8-pinMSOP
L
W
W
U
PI90LV9637UE
PI90LV9637W
PI90LV9637WE
PI90LVT9637U
PI90LVT9637UE
PI90LVT9637W
PI90LVT9637WE
U
Pb-free & Green,8-pinMSOP
8-pinSOIC
Pb-free&Green,8-pinSOIC
8-pinMSOP
Pb-free & Green,8-pinMSOP
8-pinSOIC
Pb-free&Green,8-pinSOIC
W
W
U
U
W
W
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
PericomSemiconductorCorporation•1-800-435-2336 • www.pericom.com
PS8667A
10/04/04
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