PS4066ESD [PERICOM]
Low-Cost, Quad, SPST, CMOS Analog Switches; 低成本，四路， SPST ， CMOS模拟开关
| 型号： | PS4066ESD |
| 厂家： | 
PERICOM SEMICONDUCTOR CORPORATION |
| 描述： | Low-Cost, Quad, SPST, CMOS Analog Switches |
| 文件： | 总9页 (文件大小：569K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Features
Description
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Low On-Resistance
The PS4066/PS4066A are improved SPST CMOS analog
switches ideal for low-distortion audio switching. These high pre-
cision, medium voltage switches were designed to operate with
single-supplies from +3V to 16V. They are fully specified with
+12V, +5V, and +3V supplies. The PS4066/PS4066A has four
normally open (NO) switches. Each switch conducts current
equally well in either direction when on. In the off state each
switch blocks voltages up to the power-supply rails.
On-Resistance Matching Between Channels, 0.2Ω typ
On-Resistance Flatness, <2Ω typ
o
Low Off-Channel Leakage, <100pA @ +25 C
TTL/CMOS Logic Compatible
GND-to-V+ Analog Signal Dynamic Range
Low Power Consumption (<12µW)
Low Crosstalk: -86dB @ 1MHz
Low Off-Isolation: -58dB @ 1 MHz
Wide Bandwidth: > 100 MHz
With +12V power supply, the PS4066/PS4066A guarantee <45Ω
on-resistance.On-resistancematchingbetweenchannelsiswithin
2Ω (PS4066). On-resistance flatness is less than 4Ω (PS4066A)
over the specified range. The PS4066A guarantees low leakage
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currents (<100pA @ 25 C, <6nA @ +85 C) and fast switching
speeds (t < 175ns). ESD sensitivity rating is >2,000V per
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Small QSOP-16 Package Saves Board Area
ON
MIL-STD 883, Method 3015.7
Applications
Both devices are available in PDIP-14, narrow-body SOIC-14,
and QSOP-16 packages. Available temperature ranges are: com-
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Instrumentation, ATE
Sample-and-Holds
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mercial (0 C to 70 C), and industrial (-40 C to +85 C).
Audio Switching and Routing
Telecommunication Systems
PBX, PABX
Foroperationbelow5V, thePI5A101/PI5A391/PI5A392arealso
recommended.
Battery-Powered Systems
Functional Diagrams, Pin Configurations, and Truth Table
Logic Switch
0
1
OFF
ON
Top View
N.C. = No Internal Connection
Switches shown for logic “0” input
Top View
PDIP/SO
QSOP
PS8184A
10/15/98
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PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Absolute Maximum Ratings
Thermal Information
Continuous Power Dissipation (TA= +70ºC)
Voltages Referenced to GND
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +17V
Plastic DIP (derate 10.5mW/ ºC above +70ºC) . . . . . . 800mW
SO and QSOP (derate 8.7mW/ ºC above +70ºC). . . . . 650mW
Storage Temperature . . . . . . . . . . . . . . . . . . . -65ºC to +150ºC
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . +300ºC
VIN, VCOM, VNC, VNO (Note 1) . . . . . . . . -2V to (V+) +2V
or 30mA, whichever occurs first
Current (any terminal) . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Peak Current, COM, NO, NC
(pulsed at 1ms, 10% duty cycle) . . . . . . . . . . . . . . . . 100mA
ESD per Method 3015.7 . . . . . . . . . . . . . . . . . . . . . . >2000V
Note
Signals on NC, NO, COM, or IN exceeding V+ or GND are
clamped by internal diodes. Limit forward diode current to 30mA.
Caution: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only
rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not
implied.
Electrical Specifications - Single +12V Supply
(V+ = 12V ±10%, GND = 0V, VINH = 4V, VINL = 0.8V)
Parameter
Symbol
Temp. (°C) Min(1) Typ(2) Max(1) Units
Conditions
Analog Switch
Analog Signal
Range(3)
VANALOG
Full
0
V+
V
25
12
45
55
V+ = 12V, ICOM = 2mA,
VNO = 10V
On Resistance
RON
Full
PS4066
PS4066A
0.5
0.5
4
2
V+ = 12V, ICOM = 2mA
VNO = 10V
25
On-Resistance Match
Between Channels(4)
Ω
∆RON
Full
25
6
4
6
2
V+ = 12V, ICOM = 2mA,
VNO = 10V, 5V, 1V
On-Resistance
Flatness(5)
RFLAT(ON)
Full
PS4066
PS4066A
-1
-0.1
1
0.1
INO(OFF)
25
Full
25
V+ = 12V, VCOM = 0V,
VNO = 10V
NO or NC Off
OR
Leakage Current(6)
INC(OFF)
-6
6
PS4066
PS4066A
-1
-0.1
1
0.1
V+ = 12V, VCOM = 0V,
VNO = 10V
COM Off Leakage
Current(6)
ICOM(OFF)
nA
Full
-6
6
PS4066
PS4066A
-2
-0.2
2
0.2
25
COM On Leakage
Current(6)
ICOM(ON)
V+ = 12V, VCOM = 10V,
VNO = 10V
Full
-12
12
PS8184A
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PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Electrical Specifications - Single +12V Supply (continued)
(V+ = 12V ±10%, GND = 0V, VINH = 4V, VINL = 0.8V)
Parameter
Logic Input
Symbol
Conditions
Temp (°C)
Min(1) Typ(2) Max(1) Units
Input Current with
Input Voltage High
IINH
IINL
IN =5V, all others = 0.8V
IN = 0.8V, all others =5V
-0.5 0.005
-0.5 0.005
0.5
0.5
µA
Full
Input Current with
Input Voltage Low
Dynamic
25
Full
25
45
17
100
150
75
Turn-On Time
tON
VCOM = 10V, Figure 2
ns
Turn-Off Time
tOFF
Full
100
On-Channel
Bandwidth
Signal = 0dbm
Figure 4, 50Ω in and out
BW
Q
100
2
MHz
pC
CL=1nF, VGEN = 0V, RGEN = 0Ω,
Charge Injection(3)
10
Figure 3
Off Isolation
Crosstalk(8)
OIRR
XTALK
C(OFF)
RL = 50Ω, CL= 5pF, f = 1 MHz, Figure 4
RL = 50Ω, CL= 5pF, f = 1 MHz, Figure 5
f =1 MHz, Figure 6
-58
-86
9
dB
pF
25
NO Capacitance
COM Off
Capacitance
f =1 MHz, Figure 6
f =1MHz, Figure 7
9
COM On
Capacitance
CCOM(ON)
22
Supply
Positive Supply
Current
VIN = 0V or V+,
all channels on or off
I+
-1
0.001
0.03
1
µA
Full
Total Harmonic
Distortion
THD
%
Notes:
1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in
this data sheet.
2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design
4. ∆RΟΝ = ∆RΟΝ max - ∆RΟΝ min
5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7. Off Isolation = 20log10 [ VCOM / (VNO or VNO) ], VCOM = 0utput, VNC /VNO = input to off switch
8. Between any two switches.
PS8184A
10/15/98
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PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Electrical Specifications - Single +5V Supply
(V+ = +5V ±10%, GND = 0V, VINH = 2.4V, VINL = 0.8V)
Parameter
Analog Switch
Symbol
Conditions
Temp (°C) Min(1) Typ(2) Max(1) Units
Analog Signal Range(3)
VANALOG
RON
Full
25
0
V+
75
100
4
V
22
0.3
4
V+ = 4.5V, ICOM = -1mA,
VNO = 3.5V
On-Resistance
Full
25
On-Resistance
MatchBetween Channels(4)
V+ =5V, ICOM = -1mA,
VNO = 3V
∆RON
Ω
Full
25
12
6
V+ = 5V, ICOM = -1mA,
VNO = 1V, 3V
On-Resistance Flatness(3,5)
RFLAT(ON)
Full
8
PS4066
PS4066A
-1
-0.1
1
0.1
25
Full
25
NO Off Leakage
Current(9)
V+ = 5.5V, VCOM = 0V,
VNO = 4.5V
INO(OFF)
ICOM(OFF)
ICOM(ON)
-6
6
PS4066
PS4066A
-1
-0.1
1
0.1
COM Off Leakage
Curren(9)
V+ = 5.5V, VCOM = 0V,
VNO = 4.5V
nA
Full
25
-6
6
PS4066
PS4066A
-2
-0.2
2
0.2
COM On Leakage
Current(6)
V+ = 5.5V, VCOM = 5V
VNO = 4.5V
Full
-12
12
Dynamic
25
Full
25
65
30
125
175
75
Turn-On Time
tON
VNO= 3V
ns
Turn-Off Time
tOFF
Full
125
Signal = 0dBm, 50Ω in and out
On-Channel Bandwidth
BW
Q
25
25
100
1
MHz
pC
Figure 4
CL = 1nF, VGEN = 0V,
RGEN = 0V, Figure 3
Charge Injection(3)
10
1
Supply
V+ = 5.5V, VIN = 0V or V+,
all channels on or off
Positive Supply Current
I+
Full
-1
µA
PS8184A
10/15/98
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PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Electrical Specifications - Single +3V Supply
(V+ = +2.7V to 3.3V, GND = 0V, VINH = 2.4V, VINL = 0.8V)
Parameter
Analog Switch
Symbol
Conditions
Temp°C Min.(1) Typ(2) Max.(1) Units
Analog Signal Range(3)
VANALOG
0
V+
V
25
170
225
V+ = 3V, ICOM = -1mA,
VNO = 1.5V
Channel On-Resistance
RON
Ω
Full
Dynamic
25
Full
25
80
40
185
230
150
200
Turn-On-Time(3)
tON
V+ =3V, VNO = 1.5V
V+ =3V, VNO = 1.5V
ns
Turn-Off-Time(3)
t(OFF)
Q
Full
CL = 1nF, VGEN = 0V,
RGEN = 0V
Charge Injection(3)
Supply
25
2
10
pC
V+ = 3.3V, VIN = 0V or V+,
all channels on or off
Positive Supply Current
I+
Full
-1
0.001
1
µA
Notes:
1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in
this data sheet.
2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
3. Guaranteed by design
4. ∆RΟΝ = ∆RΟΝ max - ∆RΟΝ min
5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured.
6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25ºC.
7. Off Isolation = 20log10 [ VCOM / (VNO or VNO) ], VCOM = 0utput, VNC /VNO = input to off switch
8. Between any two switches.
PS8184A
10/15/98
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PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Typical Operating Characteristics (TA = +25°C, unless otherwise noted)
RON vs. VCOM & Supply Voltages
RON vs. VCOM & Temperature
Leakage Currents vs. VCOM
Charge Injection vs. Analog Voltage
PS8184A
10/15/98
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PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Typical Operating Characteristics (TA = +25°C, unless otherwise noted)
Input Switching Threshold
vs. Supply Voltage
Leakage Current vs. Temperature
V + (V)
Temperature (°C)
Switching Current vs. Switching Frequency
Supply Current vs. VIN
VIN (V)
V + (V)
Supply Currents vs. Switching Frequency
Switching Times vs. Temperature
Frequency (MHz)
Temperature (°C)
PS8184A
10/15/98
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PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Pin Description
Applications Information
Overvoltage Protection
Proper power-supply sequencing is recommended for all CMOS
devices. Do not exceed the absolute maximum ratings, because
stresses beyond the listed ratings may cause permanent damage to
the devices. Always sequence V+ on first, and then the logic
inputs. If power-supply sequencing is not possible, add a small
signal diode or current limiting resistor in series with the supply
pin for overvoltage protection (Figure 1). Adding a diode reduces
theanalogsignalrange, butlowswitchresistanceandlowleakage
characteristics are unaffected.
Figure 1. Overvoltage protection is accomplished using an exter-
nal blocking diode or a current limiting resistor .
Test Circuits/Timing Diagrams
Figure 2. Switching Times
Figure 3. Charge Injection
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PS8184A
10/15/98
PS4066/PS4066A
Low-Cost, Quad, SPST, CMOS Analog Switches
Test Circuits/Timing Diagrams (continued)
Figure 5. Crosstalk
Figure 4. Off Isolation, BW
+12V
10nF
V+
COM
IN
Capacitance
Meter
0V
NO
GND
f = 1kHz
Figure 6. Channel-Off Capacitance
Ordering Information
Figure 7. Channel-On Capacitance
Part Number
PS4066CPD
PS4066CSD
PS4066CEE
PS4066EPD
PS4066ESD
PS4066ACPD
PS4066ACSD
PS4066ACEE
PS4066AEPD
PS4066AESD
PS4066AEEE
Temperature - Range
0ºC to + 70ºC
Package
14 Plastic DIP
14 Narrow SO
16 QSOP
0ºC to + 70ºC
0ºC to + 70ºC
-40ºC to + 85ºC
-40ºC to + 85ºC
0ºC to + 70ºC
14 Plastic DIP
14 Narrow SO
14 Plastic DIP
14 Narrow SO
16 QSOP
0ºC to + 70ºC
0ºC to + 70ºC
-40ºC to + 85ºC
-40ºC to + 85ºC
-40ºC to + 85ºC
14 Plastic DIP
14 Narrow SO
16 QSOP
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
PS8184A
10/15/98
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