STA09FC-100.0000(T) [PERICOM]

ACMOS Output Clock Oscillator, 100MHz Nom, PLASTIC, J-LEADED, SMD, 4 PIN;
STA09FC-100.0000(T)
型号: STA09FC-100.0000(T)
厂家: PERICOM SEMICONDUCTOR CORPORATION    PERICOM SEMICONDUCTOR CORPORATION
描述:

ACMOS Output Clock Oscillator, 100MHz Nom, PLASTIC, J-LEADED, SMD, 4 PIN

文件: 总2页 (文件大小:77K)
中文:  中文翻译
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SaRonix  
Crystal Clock Oscillator  
5V, ACMOS, TTL, Tri-State, SMD  
STA / STT Series, Type F  
Technical Data  
Frequency Range:  
32 MHz to 110 MHz  
Frequency Stability:  
50 or 100 ꢀꢀm over all conꢁitionsꢂ caliꢃration tolerance,  
oꢀerating temꢀerature, inꢀut voltage change, loaꢁ change,  
aging, shock anꢁ viꢃration.  
Temperature Range:  
Oꢀeratingꢂ  
Storageꢂ  
0 to +70°C or -40 to +85°C  
-55 to +125°C  
Supply Voltage:  
Supply Current:  
Oꢀeratingꢂ  
+5V 10ꢄ  
50mA tyꢀ, 70mA max  
Output Specifications:  
ACTUAL SIZE  
ACMOS/TTL  
Symmetryꢂ  
Rise & Fall Timesꢂ  
See Part Numꢃering Guiꢁe  
2ns max, 20ꢄ to 80ꢄ VDD (ACMOS)  
1ns max, 0.5 to 2.5V (TTL)  
10ꢄ VDD max  
90ꢄ VDD min  
50ACMOS or 10TTL  
Description  
A crystal controlleꢁ, low-current  
oscillator ꢀroviꢁing ꢀrecise rise anꢁ fall  
times to ꢁrive TTL comꢀatiꢃle or  
HCMOS/ACMOS loaꢁs. The tri-state  
function enaꢃles the outꢀut to go high  
imꢀeꢁance. The surface mountaꢃle J-  
leaꢁeꢁ ꢀlastic ꢀackage is iꢁeal for auto-  
mateꢁ assemꢃly.  
Logic 0ꢂ  
Logic 1ꢂ  
Loaꢁꢂ  
Jitterꢂ  
8ꢀs max RMS ꢀerioꢁ jitter, 1ꢀs max 1σ cycle-to-cycle jitter  
Mechanical:  
Shockꢂ  
Solꢁeraꢃilityꢂ  
Terminal Strengthꢂ  
Viꢃrationꢂ  
MIL-STD-883, Methoꢁ 2002, Conꢁition B  
MIL-STD-883, Methoꢁ 2003  
MIL-STD-202, Methoꢁ 211, Conꢁitions A & C  
MIL-STD-883, Methoꢁ 2007, Conꢁition A  
MIL-STD-202, Methoꢁ 215  
Applications & Features  
Solvent Resistanceꢂ  
Resistance to Solꢁering Heatꢂ  
MIL-STD-202, Methoꢁ 210, Conꢁition I or J  
• Iꢁeally suiteꢁ for high sꢀeeꢁ graꢀhics,  
CISCanRISCrocessors, ancustom  
ASICs  
• Comꢀact surface mountaꢃle ꢀackage  
• MatchesEIAstanꢁarSO-J-20footꢀrint  
• High frequencies uꢀ to 110 MHz  
incluꢁing106.25MHzforFiꢃerChannel  
• ACMOS, HCMOS anꢁ TTL comꢀat-  
iꢃle  
Environmental:  
Thermal Shockꢂ  
Moisture Resistanceꢂ  
MIL-STD-883, Methoꢁ 1011, Conꢁition A  
MIL-STD-883, Methoꢁ 1004  
Solder Reflow Guide  
• Tri-state outꢀut  
• Outꢀut is short-circuit ꢀrotecteꢁ  
• Availaꢃle on taꢀe & reel; 24mm taꢀe,  
500ꢀcs ꢀer reel  
Reflow 240°C max  
4°C/sec max  
250  
200  
150  
Preheat 183 10°C  
Cooling  
Output Waveform  
4°C/sec max  
Time  
ACMOS  
TTL  
Tr  
Tf  
Tr  
Tf  
VDD  
1 – 2 minutes  
10 sec max  
LOGIC 1  
80% VDD  
50% VDD  
2.5 VDC  
1.5 VDC  
0.5 VDC  
20% VDD  
LOGIC 0  
GND  
SYMMETRY  
SYMMETRY  
DS-102  
REV K  
SaRonix 141 Jefferson Drive • Menlo Park, CA 94303 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894  
www.saronix.com  
SaRonix  
Crystal Clock Oscillator  
5V, ACMOS, TTL, Tri-State, SMD  
STA / STT Series, Type F  
Technical Data  
Tri-State Logic Table  
Part Numbering Guide  
Pin 1 Input  
Logic 1 or NC  
Logic 0 or GND  
Pin 3 Output  
Oscillation  
STA  
0
9
F
C
– 100.0000 (T)  
(T) = Tape & Reel  
full reel increments only  
Series  
STA = ACMOS  
HighImpedance  
Frequency  
STT = TTL-compatible  
Required Input Levels on Pin 1:  
Logic 1 = 2.5V min  
Logic 0 = 0.5V max  
Stability  
B = 50 ppm  
C = 100 ppm  
Symmetry  
0 = 40/60% max, 0 to 70°C  
A = 45/55% max, 0 to 70°C,  
STT to 60 MHz max only  
Package Details  
Package  
Style  
4
1
3
2
2 = 40/60% max, -40 to 85°C  
DENOTES  
PIN 1  
Rise/Fall Times  
F = J - Lead  
3 = 0.5ns typ, 1.0ns max for TTL  
9 = 1.0ns typ, 2.0ns max for ACMOS  
7.4 9.6  
.290 .376  
max  
Examꢀle P/Nꢂ STA09FC - 80.0000  
Test Circuits  
13.2  
.520  
TEST  
POINT  
ACMOS  
50 LOAD  
4.3  
.170  
4.65  
.183  
mA  
M
0.6  
.022  
Pin 4  
Pin 1  
Pin 3  
Pin 2  
50Ω  
5.1  
.200  
0.51  
x45° CHAM  
VDD  
OUT  
.28  
.011  
.020  
OSCILLATOR  
GND  
POWER  
SUPPLY  
V M  
0.01MFD  
2.0  
.079  
0.9  
.035  
7.62  
.300  
Pin Function:  
Pin 1: Tri-State Control  
Pin 2: GND  
Pin 3: Output  
Pin 4: V  
TRI-STATEINPUT  
(currentlimitedonfixture)  
DD  
Marking Format  
SARONIX  
*
NOTE: A. CL includes probe and fixture capacitance  
Date  
Code  
FIGURE 1 - ACMOS TEST FIXTURE  
Frequency  
Part  
Number  
TEST  
POINT  
R
L = 390  
Recommended Land Pattern  
mA  
M
1.78  
.070  
**  
Pin 4  
Pin 1  
Pin 3  
Pin 2  
V
OUT  
CC  
MMBD7000  
OSCILLATOR  
GND  
POWER  
SUPPLY  
orequivalent  
V M  
C
= 15pF  
L
(NoteA)  
4
1
3
7.62  
.300  
2
TRI-STATEINPUT  
(currentlimitedonfixture)  
2.82  
.111  
5.08  
.200  
NOTE: A. CL includes probe and fixture capacitance  
FIGURE 2 - TTL TEST FIXTURE  
*
Exact location of items may vary  
**Externalhighfrequencypowersupply  
decoupling recommended.  
mm  
Scale: None (Dimensions in  
)
inches  
DS-102  
REV K  
SaRonix 141 Jefferson Drive • Menlo Park, CA 94303 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894  
www.saronix.com  

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