74ABT16273DGG [NXP]
16-bit D-type flip-flop; 16位D型触发器
| 型号： | 74ABT16273DGG |
| 厂家： | 
NXP |
| 描述： | 16-bit D-type flip-flop |
| 文件： | 总10页 (文件大小：89K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ABT16273
74ABTH16273
16-bit D-type flip-flop
Product specification
1998 Feb 27
Supersedes data of 1995 Sep 28
IC23 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
FEATURES
DESCRIPTION
The 74ABT16273 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
• 16-bit D-type edge triggered flip-flops
• Output capability: +64mA/–32mA
• TTL input and output switching levels
• Live insertion/extraction permitted
• Power-up reset
This part is a 16-bit edge triggered D-type flip-flop with non-inverting
high drive outputs. This device can be used as two 8-bit flip-flops or
one 16-bit flip-flop. When the clock (CP) goes High, the data on the
D inputs is stored and the Q outputs display the stored data.
• 74ABTH16273 incorporates bus-hold data inputs which eliminate
This device also features a master reset (MR) that resets all
flip-flops to the Low state when MR is set to the Low state.
the need for external pull-up resistors to hold unused inputs
• Latch-up protection exceeds 500mA per JEDEC Std 17
Two options are available, 74ABT16273 which does not have the
bus-hold feature and 74ABTH16273 which incorporates the
bus-hold feature.
• ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
Propagation delay
An to Bn or Bn to An
Input capacitance
C = 50pF;
2.5
2.0
PLH
PHL
L
ns
V
CC
= 5.0V
C
V = 0V or V
I CC
4
200
8
pF
µA
mA
IN
I
Outputs High; V = 5.5V
CC
CCH
Quiescent supply current
I
Outputs low; V = 5.5V
CCL
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
SOT370-1
48-Pin Plastic SSOP Type III
48-Pin Plastic TSSOP Type II
48-Pin Plastic SSOP Type III
48-Pin Plastic TSSOP Type II
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74ABT16273 DL
74ABT16273 DGG
74ABTH16273 DL
74ABTH16273 DGG
BT16273 DL
BT16273 DGG
BH16273 DL
SOT362-1
SOT370-1
BH16273 DGG
SOT362-1
LOGIC SYMBOL
PIN DESCRIPTION
NAME AND
FUNCTION
PIN NUMBER
SYMBOL
47 46 44 43 41 40 38 37
Master reset input
(active-Low)
1, 24
1MR, 2MR
1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7
CP
2, 3, 5, 6, 8, 9, 11, 12,13,
14, 16, 17, 19, 20, 22, 23
1Q0-1Q7
2Q0-2Q7
48
1
Data outputs
Data inputs
MR
1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
47, 46, 44, 43, 41, 40, 38, 37,
36, 35, 33, 32, 30, 29, 27, 26
1D0-1D7
2D0-2D7
Clock pulse input
(active rising edge)
25, 48
1CP, 2CP
GND
2
3
5
6
8
9
11 12
4, 10, 15, 21, 28, 34, 39, 45
7, 18, 31, 42
Ground (0V)
36 35 33 32 30 29 27 26
Positive supply
voltage
V
CC
2D0 2D21 2D2 2D3 2D4 2D5 2D6 2D7
25
24
CP
MR
2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7
13 14 16 17 19 20 22 23
SH00052
2
1998 Feb 27
853-1793 19027
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
LOGIC SYMBOL (IEEE/IEC)
PIN CONFIGURATION
1
2
48
1MR
1Q0
!Q1
CP
1
1MR
CP
R1
C1
R2
C2
48
24
25
47 1D0
46 1D1
3
2MR
2CP
GND
1Q2
1Q3
GND
1D2
4
45
44
5
47
46
44
43
41
40
38
37
36
2
3
1D
1
1D0
1D1
1D2
1D3
1D4
1D5
1D6
1D7
2D0
1Q0
!Q1
6
43 1D3
7
42
41
40
39
38
37
36
35
34
33
V
V
CC
CC
5
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
8
1Q4
1Q5
1D4
1D5
6
9
8
GND
GND
10
11
12
13
14
15
16
9
1Q6
1Q7
2Q0
2Q1
GND
1D6
1D7
2D0
2D1
GND
11
12
13
2
2D
35
33
32
30
29
27
26
14
16
17
19
20
22
23
2D1
2D2
2D3
2D4
2D5
2D6
2D7
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
2Q2
2D2
2Q3 17
32 2D3
18
19
31
30
V
V
CC
2Q4
CC
2D4
2Q5 20
29 2D5
21
22
23
24
28
27
26
25
GND
2Q6
GND
2D6
SH00053
2Q7
2D7
2CP
2MR
FUNCTION TABLE
SH00054
Inputs
Output
operating
mode
nMR
L
nCP
nDX
nQ0-nQ7
X
↑
X
h
I
L
H
L
Reset (clear)
Load “1”
H
H
↑
Load “0”
H
L
X
Q
Retain state
0
H = High voltage level
h
=
high voltage level one set-up time prior to the Low-to-High
clock transition
L
I
=
=
Low voltage level
Low voltage level one set-up time prior to the Low-to-High
clock transition
Don’t care
Low-to-High clock transition
X
↑
=
=
Q0 = Output as it was
3
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
LOGIC DIAGRAM
nD0
nD1
nD2
nD3
nD4
nD5
nD6
nD7
nCP
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
R
R
R
R
R
R
R
R
D
D
D
D
D
D
D
D
nMR
nQ0
nQ1
nQ2
nQ3
nQ4
nQ5
nQ6
nQ7
n = 1 or 2
SH00055
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
V
CC
I
IK
DC supply voltage
–0.5 to –7.0
–18
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
OUT
DC output voltage
Output in Off or High state
Output in Low state
–0.5 to +5.5
128
I
DC output current
mA
OUT
Output in High state
–64
T
stg
Storage temperature range
–65 to +150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
4.5
0
MAX
V
DC supply voltage
Input voltage
5.5
V
V
CC
V
V
CC
I
V
High-level input voltage
Input voltage
2.0
V
IH
V
0.8
–32
64
V
IL
I
High-level output current
Low-level output current
mA
mA
ns/V
°C
OH
I
OL
∆t/∆v
Input transition rise or fall rate; Outputs enabled
Operating free-air temperature range
0
10
T
amb
–40
+85
4
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
DC ELECTRICAL CHARACTERISTICS
LIMITS
Temp = -40°C
to +85°C
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = +25°C
MIN TYP MAX
UNIT
MIN
MAX
V
Input clamp voltage
V
V
V
V
V
= 4.5V; I = –18mA
0.9
2.9
–1.2
–1.2
V
V
IK
CC
CC
CC
CC
CC
IK
= 4.5V; I = –3mA; V = V or V
2.5
3.0
2.0
2.5
3.0
2.0
OH
I
IL
IH
IH
= 5.0V; I = –3mA; V = V or V
3.4
V
OH
High-level output voltage
OH
I
IL
= 4.5V; I = –32mA; V or V
IH
2.4
OH
IL
V
OL
Low-level output voltage
Power-up output
= 4.5V; I = 64mA; V = V or V
0.42
0.55
0.55
0.55
0.55
OL
I
IL
IH
V
RST
V
CC
V
CC
V
CC
= 5.5V; I = 1mA; V = GND or V
0.13
±0.1
V
O
I
CC
3
voltage
Input leakage current
74ABT16273
I
= 5.5V; V = V or GND
±1
±1
±1
±1
µA
µA
I
I
I
CC
Control
pins
= 5.5V; V = V or GND
±0.01
I
CC
Input leakage current
74ABTH16273
I
V
CC
V
CC
V
CC
= 5.5V; V = V
0.01
–2
1
1
µA
µA
I
CC
Data pins
= 5.5V; V = 0
–3
–5
I
= 4.5V; V = 0.8V
35
35
I
4
Bus Hold current inputs
74ABTH16273
I
µA
V
V
= 4.5V; V = 2.0V
–75
–75
HOLD
CC
I
= 5.5V; V = 0 to 5.5V
±800
CC
I
Power-off leakage
current
I
V
V
V
= 0.0V; V or V t 4.5V
±5.0 ±100
±100
–180
50
µA
mA
µA
OFF
CC
CC
CC
O
I
1
I
O
output current
= 5.5V; V = 2.5V
–50
–70
5.0
–180
50
–50
O
Output High leakage
current
I
= 5.5V; V = 5.5V; V = GND or V
O I CC
CEX
CCH
I
V
V
= 5.5V; Outputs High, V = GND or V
0.2
8
1
1
CC
I
CC
Quiescent supply current
Additional supply current
mA
I
= 5.5V; Outputs Low, V = GND or V
19
19
CCL
CC
I
CC
V
CC
= 5.5V; One input at 3.4V.
2
per input pin
∆I
∆I
5
100
1
100
1
µA
CC
Other inputs at V or GND
CC
74ABT16273
Additional supply current
V
CC
= 5.5V; One input at 3.4V.
2
per input pin
0.2
mA
CC
Other inputs at V or GND
CC
74ABTH16273
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500Ω;
R
F
L
L
LIMITS
MAX
T
V
= +25°C
= +5.0V
T
V
= –40 to +85 °C
= +5.0V ±0.5V
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
MIN
TYP
MIN
MAX
t
t
Propagation delay
nCP to nQx
1.5
1.2
2.5
2.0
3.4
2.7
1.5
1.2
4.0
3.0
PLH
PHL
1
ns
Propagation delay
nMR to nQx
t
2
1
1.9
3.7
4.3
1.9
5.3
ns
PHL
f
Maximum clock frequency
150
240
150
MHz
MAX
5
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
AC SETUP REQUIREMENTS
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500Ω
R
F
L
L
LIMITS
T
V
= +25°C
= +5.0V
T
V
= –40 to +85 °C
UNIT
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
= +5.0V ±0.5V
MIN
TYP
MIN
t (H)
t (L)
S
Setup time, High or Low
nDx to nCP
2.0
2.0
1.0
1.0
2.0
2.0
S
3
3
ns
ns
ns
t (H)
Hold time, High or Low
nDx to nCP
0
0
–0.6
–0.6
0
0
h
t (L)
h
t (H)
Clock pulse width
High or Low
3.3
3.3
1.2
1.0
3.3
3.3
W
1
2
2
t (L)
W
t (L)
W
Master Reset pulse width, Low
3.3
1.1
3.3
ns
ns
Recovery time
nMR + nCP
t
2.0
0.0
2.0
REC
AC WAVEFORMS
V
M
= 1.5V, V = GND to 2.7V
IN
V
V
M
V
V
M
nDx
nCP
M
M
M
1/f
MAX
0V
0V
t (H)
s
t (L)
s
t (H)
h
t (L)
h
nCP
V
V
V
M
M
t
M
t
0V
(H)
(L)
W
V
V
M
W
t
t
PLH
PHL
V
OH
NOTE: The shaded areas indicate when the input is
permitted to change for predictable output performance.
nQx
V
V
M
M
V
OL
SH00058
SH00056
Waveform 3. Data Setup and Hold Times
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
V
V
M
nMR
M
0V
0V
t
w
(L)
t
REC
V
nCP
nQx
M
t
PHL
V
OH
V
M
V
OL
SH00057
Waveform 2. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
6
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
TEST CIRCUIT AND WAVEFORM
t
W
AMP (V)
90%
90%
V
CC
NEGATIVE
PULSE
V
V
M
10%
M
10%
0V
(t
V
V
OUT
IN
t
t
(t
(t
)
t
t
)
PULSE
D.U.T.
THL
F
TLH
R
GENERATOR
)
(t )
F
AMP (V)
TLH
R
THL
R
T
C
R
L
L
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
Test Circuit for Outputs
t
W
0V
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
R = Load resistor; see AC CHARACTERISTICS for value.
L
INPUT PULSE REQUIREMENTS
FAMILY
C = Load capacitance includes jig and probe capacitance;
L
Amplitude
3.0V
Rep. Rate
1MHz
t
t
t
F
W
R
see AC CHARACTERISTICS for value.
R = Termination resistance should be equal to Z
T
of
OUT
500ns 2.5ns
2.5ns
74ABT16
pulse generators.
SH00059
7
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
8
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
16-bit D-type flip-flop
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm
SOT362-1
9
1998 Feb 27
Philips Semiconductors
Product specification
74ABT16273
74ABTH16273
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
Production
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-03489
Document order number:
Philips
Semiconductors
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