74ALVC244 [NXP]
Octal buffer/line driver; 3-state; 八路缓冲器/线路驱动器;三态型号: | 74ALVC244 |
厂家: | NXP |
描述: | Octal buffer/line driver; 3-state |
文件: | 总15页 (文件大小:91K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74ALVC244
Octal buffer/line driver; 3-state
Product specification
2003 Sep 08
Supersedes data of 2003 Aug 11
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
FEATURES
DESCRIPTION
• Wide supply voltage range from 1.65 to 3.6 V
• 3.6 V tolerant inputs/outputs
The 74ALVC244 is a high-performance, low-power,
low-voltage, Si-gate CMOS device and superior to most
advanced CMOS compatible TTL families.
• CMOS low power consumption
The 74ALVC244 is an octal non-inverting buffer/line driver
with 3-state outputs. The 3-state outputs are controlled by
the output enable inputs 1OE and 2OE. A HIGH on nOE
causes the outputs to assume a high-impedance
• Direct interface with TTL levels (2.7 to 3.6 V)
• Power-down mode
• Latch-up performance exceeds 250 mA
OFF-state. Schmitt-trigger action at all inputs makes the
circuit highly tolerant for slower input rise and fall times.
• Complies with JEDEC standard:
JESD8-7 (1.65 to 1.95 V)
JESD8-5 (2.3 to 2.7 V)
JESD8B/JESD36 (2.7 to 3.6 V)
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
t
PHL/tPLH
propagation delay nAn to nYn
VCC = 1.8 V; CL = 30 pF; RL = 1 kΩ 2.7
ns
ns
ns
ns
VCC = 2.5 V; CL = 30 pF; RL = 500 Ω 2.0
VCC = 2.7 V; CL = 50 pF; RL = 500 Ω 2.3
VCC = 3.3 V; CL = 50 pF; RL = 500 Ω 2.2
3.5
CI
input capacitance
pF
pF
CPD
power dissipation capacitance per buffer VCC = 3.3 V; notes 1 and 2
20
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
.
2003 Sep 08
2
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
FUNCTION TABLE
See note 1.
INPUT
OUTPUT
nOE
nAn
nYn
L
L
L
H
X
L
H
Z
H
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
ORDERING INFORMATION
PACKAGE
PACKAGE
TYPE NUMBER
TEMPERATURE
PINS
MATERIAL
CODE
RANGE
74ALVC244D
74ALVC244PW
74ALVC244BQ
−40 to +85 °C
−40 to +85 °C
−40 to +85 °C
20
20
20
SO20
plastic
plastic
plastic
SOT163-1
SOT360-1
SOT764-1
TSSOP20
DHVQFN20
PINNING
PIN SYMBOL
DESCRIPTION
PIN SYMBOL
DESCRIPTION
11 2A3
12 1Y3
13 2A2
14 1Y2
15 2A1
16 1Y1
17 2A0
18 1Y0
19 2OE
20 VCC
data input
bus output
data input
bus output
data input
bus output
data input
bus output
1
2
3
4
5
6
7
8
9
1OE
1A0
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
output enable input (active LOW)
data input
bus output
data input
bus output
data input
bus output
data input
output enable input (active LOW)
supply voltage
bus output
10 GND
ground (0 V)
2003 Sep 08
3
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
V
handbook, halfpage
1OE
1
CC
20
1A0
2
3
4
5
6
7
8
9
19 2OE
18 1Y0
17 2A0
16 1Y1
15 2A1
14 1Y2
13 2A2
12 1Y3
handbook, halfpage
V
1OE
1A0
2Y0
1
2
20
19
18
17
16
15
14
13
12
11
CC
2Y0
1A1
2Y1
1A2
2Y2
1A3
2Y3
2OE
1Y0
2A0
1Y1
2A1
1Y2
2A2
1Y3
2A3
3
1A1
2Y1
1A2
2Y2
1A3
2Y3
GND
4
(1)
5
GND
244
6
7
8
9
10
10
11
MNA162
GND 2A3
MNA981
Top view
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
1
EN
1Y0
2Y0
1A0
2A0
2
18
3
handbook, halfpage
18
2
17
16
14
12
4
6
8
1A1
2A1
1Y1
2Y1
4
16
5
15
1Y2
2Y2
1A2
2A2
6
14
7
13
19
11
EN
1Y3
2Y3
1A3
2A3
8
12
9
9
11
7
5
3
13
15
17
1OE
2OE
1
19
MNA168
MNA169
Fig.3 Logic symbol.
Fig.4 IEE/IEC logic symbol.
2003 Sep 08
4
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
handbook, halfpage
2
1Y0
1Y1
1Y2
1Y3
1A0
1A1
1A2
18
16
14
12
4
6
1A3
8
1
1OE
2Y0
2Y1
2Y2
2Y3
2A0
2A1
2A2
17
15
13
3
5
7
9
2A3
11
19
2OE
MNA170
Fig.5 Logic diagram.
2003 Sep 08
5
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
supply voltage
CONDITIONS
MIN.
1.65
MAX.
UNIT
3.6
3.6
V
V
V
V
V
VI
input voltage
0
VO
output voltage
VCC = 1.65 to 3.6 V; enable mode 0
VCC
3.6
3.6
+85
20
V
CC = 1.65 to 3.6 V; disable mode 0
V
CC = 0 V; Power-down mode
0
Tamb
tr, tf
operating ambient temperature
input rise and fall times
−40
0
°C
VCC = 1.65 to 2.7 V
VCC = 2.7 to 3.6 V
ns/V
ns/V
0
10
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage −0.5 +4.6
V
IIK
input diode current
input voltage
VI < 0
−
−50
mA
V
VI
−0.5
−
+4.6
±50
IOK
VO
output diode current
output voltage
VO > VCC or VO < 0
enable mode; notes 1 and 2
disable mode
mA
V
−0.5
−0.5
−0.5
−
VCC + 0.5
+4.6
+4.6
±50
V
Power-down mode; note 2
VO = 0 to VCC
V
IO
output source or sink current
VCC or GND current
storage temperature
power dissipation
mA
mA
°C
mW
IGND, ICC
−
±100
+150
500
Tstg
Ptot
−65
−
Tamb = −40 to +85 °C; note 3
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation.
3. For SO20 packages: above 70 °C derate linearly with 8 mW/K.
For TSSOP20 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 °C derate linearly with 4.5 mW/K.
2003 Sep 08
6
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.(1)
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 to +85 °C
VIH HIGH-level input
1.65 to 1.95 0.65 × VCC
−
−
−
−
−
−
−
−
−
V
V
V
V
V
V
voltage
2.3 to 2.7
2.7 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
1.7
2
VIL
LOW-level input
voltage
−
0.35 × VCC
0.7
−
−
0.8
VOL
LOW-level output
voltage
VI = VIH or VIL
IO = 100 µA
IO = 6 mA
1.65 to 3.6
1.65
2.3
−
−
−
−
−
−
−
−
−
−
−
−
−
−
0.2
0.3
0.4
0.6
0.4
0.4
0.55
V
V
V
V
V
V
V
IO = 12 mA
IO = 18 mA
2.3
IO = 12 mA
2.7
IO = 18 mA
3.0
IO = 24 mA
3.0
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −100 µA
IO = −6 mA
1.65 to 3.6
1.65
2.3
V
CC − 0.2
−
−
V
1.25
1.8
1.7
2.2
2.4
2.2
−
−
−
V
IO = −12 mA
IO = −18 mA
IO = −12 mA
IO = −18 mA
IO = −24 mA
VI = 3.6 V or GND
−
−
V
2.3
−
−
V
2.7
−
−
V
3.0
−
−
V
3.0
−
−
V
ILI
input leakage
current
3.6
±0.1
±5
µA
IOZ
Ioff
ICC
∆ICC
3-state output
OFF-state current
VI = VIH or VIL;
VO = 3.6 V or GND; note 2
3.6
−
−
−
−
0.1
±0.1
0.2
5
±10
±10
20
µA
µA
µA
µA
power OFF leakage VI or VO = 3.6 V
current
0.0
quiescent supply
current
VI = VCC or GND; IO = 0
3.6
additional
VI = VCC − 0.6 V; IO = 0
3.0 to 3.6
750
quiescent supply
current per input
pin
Notes
1. All typical values are measured at Tamb = 25 °C.
2. For transceivers, the parameters IOZ includes the input leakage current.
2003 Sep 08
7
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
AC CHARACTERISTICS
TEST CONDITIONS
WAVEFORMS VCC (V)
SYMBOL
PARAMETER
MIN.
TYP.(1)
MAX.
UNIT
Tamb = −40 to +85 °C
tPHL/tPLH propagation delay nAn to nYn see Figs 6 and 8 1.65 to 1.95 1.0
2.7
4.4
ns
2.3 to 2.7
2.7
1.0
1.0
1.0
2.0
2.3
2.2
3.4
2.6
3.2
2.5
3.8
2.2
3.0
2.9
3.1
3.1
2.8
6.9
5.4
5.3
4.5
5.9
4.1
4.4
4.2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3.0 to 3.6
tPZH/tPZL
3-state output enable time
nOE to nYn
see Figs 7 and 8 1.65 to 1.95 1.0
2.3 to 2.7
2.7
1.0
1.0
1.0
3.0 to 3.6
tPHZ/tPLZ
3-state output disable time
nOE to nYn
see Figs 7 and 8 1.65 to 1.95 1.0
2.3 to 2.7
2.7
1.0
1.0
1.0
3.0 to 3.6
Note
1. All typical values are measured at Tamb = 25 °C.
AC WAVEFORMS
V
handbook, halfpage
nAn input
I
V
V
M
M
GND
t
t
PLH
PHL
V
OH
V
V
M
nYn output
M
V
OL
MNA171
INPUT
tr = tf
VCC
VM
VI
1.65 to 1.95 V
2.3 to 2.7 V
2.7 V
0.5 × VCC VCC
0.5 × VCC VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
1.5 V
1.5 V
2.7 V
2.7 V
3.0 to 3.6 V
Fig.6 Input nAn to output nYn propagation delay times.
8
2003 Sep 08
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
V
I
V
nOE input
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
V
x
OL
t
t
PHZ
PZH
V
OH
V
y
output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
MNA654
INPUT
VCC
VM
VI
tr = tf
VX = VOL + 0.3 V at VCC ≥ 2.7 V;
VX = VOL + 0.15 V at VCC < 2.7 V;
Y = VOH − 0.3 V at VCC ≥ 2.7 V;
VY = VOH − 0.15 V at VCC < 2.7 V.
1.65 to 1.95 V 0.5 × VCC
VCC
≤ 2.0 ns
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
2.3 to 2.7 V
2.7 V
0.5 × VCC
1.5 V
VCC
V
2.7 V
2.7 V
3.0 to 3.6 V
1.5 V
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 3-state enable and disable times.
2003 Sep 08
9
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
V
EXT
V
CC
R
L
V
V
O
I
PULSE
GENERATOR
D.U.T.
C
R
R
L
L
T
MNA616
VEXT
VCC
VI
VCC
CL
RL
tPLH/tPHL
tPZH/tPHZ
tPZL/tPLZ
1.65 to 1.95 V
2.3 to 2.7 V
2.7 V
30 pF
30 pF
50 pF
50 pF
1 kΩ
open
open
open
open
GND
GND
GND
GND
2 × VCC
2 × VCC
6 V
VCC
500 Ω
500 Ω
500 Ω
2.7 V
2.7 V
3.0 to 3.6 V
6 V
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.8 Load circuitry for switching times.
2003 Sep 08
10
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
PACKAGE OUTLINES
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25 0.25
0.01
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT163-1
075E04
MS-013
2003 Sep 08
11
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
D
E
A
X
c
H
v
M
A
y
E
Z
11
20
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.5
0.2
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT360-1
MO-153
2003 Sep 08
12
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm
SOT764-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
9
L
1
10
E
h
e
20
11
19
12
D
h
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
1
h
h
max.
0.05 0.30
0.00 0.18
4.6
4.4
3.15
2.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
3.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT764-1
- - -
MO-241
- - -
2003 Sep 08
13
Philips Semiconductors
Product specification
Octal buffer/line driver; 3-state
74ALVC244
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Sep 08
14
Philips Semiconductors – a worldwide company
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© Koninklijke Philips Electronics N.V. 2003
SCA75
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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
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Printed in The Netherlands
R20/03/pp15
Date of release: 2003 Sep 08
Document order number: 9397 750 12018
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