935273778115 [NXP]
IC HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, QCC16, SOT-763, 16 PIN, Decoder/Driver;
| 型号： | 935273778115 |
| 厂家： | 
NXP |
| 描述： | IC HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, QCC16, SOT-763, 16 PIN, Decoder/Driver 驱动 输出元件 逻辑集成电路 |
| 文件： | 总11页 (文件大小：176K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT138
3-to-8 line decoder/demultiplexer;
inverting
September 1993
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74HC/HCT138
The 74HC/HCT138 decoders accept three binary
FEATURES
weighted address inputs (A0, A1, A2) and when enabled,
provide 8 mutually exclusive active LOW outputs (Y0 to
Y7).
• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Active LOW mutually exclusive outputs
• Output capability: standard
• ICC category: MSI
The “138” features three enable inputs: two active LOW
(E1 and E2) and one active HIGH (E3). Every output will be
HIGH unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel
expansion of the “138” to a 1-of-32 (5 lines to 32 lines)
decoder with just four “138” ICs and one inverter.
The ”138” can be used as an eight output demultiplexer by
using one of the active LOW enable inputs as the data
input and the remaining enable inputs as strobes. Unused
enable inputs must be permanently tied to their
appropriate active HIGH or LOW state.
GENERAL DESCRIPTION
The 74HC/HCT138 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The ”138” is identical to the “238” but has inverting outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
propagation delay
CONDITIONS
UNIT
HC
HCT
CL = 15 pF; VCC = 5 V
t
PHL/ tPLH
An to Yn
12
14
17
19
ns
ns
tPHL/ tPLH
E3 to Yn
En to Yn
CI
input capacitance
3.5
67
3.5
67
pF
pF
CPD
power dissipation capacitance per package notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
September 1993
2
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74HC/HCT138
PIN DESCRIPTION
PIN NO.
SYMBOL
A0 to A2
E1, E2
E3
NAME AND FUNCTION
1, 2, 3
address inputs
4, 5
enable inputs (active LOW)
enable input (active HIGH)
ground (0 V)
6
8
GND
15, 14, 13, 12, 11, 10, 9, 7
16
Y0 to Y7
VCC
outputs (active LOW)
positive supply voltage
handbook, halfpage
1
A
Y
Y
Y
Y
Y
Y
Y
Y
15
14
13
12
11
10
9
0
1
2
0
1
2
3
4
5
6
7
2
3
A
A
E
E
E
1
2
3
4
5
6
7
MLB312
Fig.1 Pin configuration.
Fig.2 Logic symbol.
(a)
(b)
Fig.3 IEC logic symbol.
Fig.4 Functional diagram.
September 1993
3
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74HC/HCT138
FUNCTION TABLE
INPUTS
OUTPUTS
E1
E2
E3
A0
A1
A2
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
H
X
X
X
H
X
X
X
L
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
L
L
H
H
L
L
L
L
L
H
H
H
H
L
H
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
L
H
H
Notes
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Fig.5 Logic diagram.
September 1993
4
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74HC/HCT138
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85
−40 to +125
min. typ. max. min. max. min. max.
41
15
12
150
30
26
190
38
33
225
45
38
2.0
4.5
6.0
propagation delay
An to Yn
tPHL/ tPLH
ns
Fig.6
47
17
14
150
30
26
190
38
33
225
45
38
2.0
4.5
6.0
propagation delay
E3 to Yn
t
t
t
PHL/ tPLH
PHL/ tPLH
THL/ tTLH
ns
ns
ns
Fig.6
47
17
14
150
30
26
190
38
33
225
45
38
2.0
4.5
6.0
propagation delay
En to Yn
Fig.7
19
7
6
75
15
13
95
19
16
110
22
19
2.0
4.5
6.0
output transition
time
Figs 6 and 7
September 1993
5
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74HC/HCT138
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications. To
determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
An
En
E3
1.50
1.25
1.00
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85
−40 to +125
min. typ. max. min. max. min. max.
propagation delay
An to Yn
tPHL/ tPLH
20
18
19
7
35
40
40
15
44
50
50
19
53
60
60
22
ns
4.5
4.5
4.5
4.5
Fig.6
propagation delay
E3 to Yn
t
t
PHL/ tPLH
PHL/ tPLH
ns
ns
ns
Fig.6
propagation delay
En to Yn
Fig.7
output transition
time
tTHL/ tTLH
Figs 6 and 7
September 1993
6
Philips Semiconductors
Product specification
3-to-8 line decoder/demultiplexer; inverting
74HC/HCT138
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6 Waveforms showing the address input (An) and enable input (E3) to output (Yn) propagation delays and
the output transition times.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the enable input (En) to output (Yn) propagation delays and the output transition
times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
September 1993
7
Information as of 2004-04-09
74HC/HCT138; 3-to-8 line
decoder/demultiplexer;
inverting
Stay
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Block diagram
Products & packages
mixed-signal
devices
•
General description
Audio
•
•
Bus devices
Clocks &
Watches
The 74HC/HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC standard no. 7A.
•
•
Data
The 74HC/HCT138 decoders accept three binary weighted address inputs (A , A , A ) and when enabled, provide 8
0
1
2
Communications
Discrete modules
Discretes
mutually exclusive active LOW outputs (Y to Y ).
0
7
•
•
•
The '138' features three enable inputs: two active LOW (E and E ) and one active HIGH (E ). Every output will be HIGH
1
2
3
Display drivers
Identification &
Security
unless E and E are LOW and E is HIGH.
1
2
3
•
This multiple enable function allows easy parallel expansion of the '138' to a 1-of-32 (5 lines to 32 lines) decoder with just
four '138' ICs and one inverter.
Logic
•
•
•
•
Microcontrollers
Peripherals
Video
The '138' can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and
the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or
LOW state.
Wired
Communications
Wireless
•
•
The '138' is identical to the '238' but has inverting outputs.
Features
Communications
●
●
●
●
●
●
Demultiplexing capability
Multiple input enable for easy expansion
Ideal for memory chip select decoding
Active LOW mutually exclusive outputs
Output capability: standard
I
category: MSI
CC
Datasheet
Datasheet title
Publication release Datasheet status
date
Page
count
File
size
(kB)
Datasheet
74HC/HCT138; 3-to-8 line
01-Sep-93
Product specification 7
47
Download
decoder/demultiplexer; inverting
Additional datasheet info
To complete the device datasheet with package and family information, also download the following PDF files. The
"Logic Package Information" document is required to determine in which package(s) this device is available.
Document
Description
1
2
3
HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family
Specifications
HCT_PACKAGE_INFO
HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package
Information
HCT_PACKAGE_OUTLINES
HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic Package
Outlines
Parametrics
Type number Package Description
Propagation Voltage No. Power
Delay(ns) of Dissipation
Pins Considerations Levels
Low Power or
16 Battery
Logic
Switching Drive
Output
Capability
3-to-8 Line
2.0-6.0
V
74HC138BQ SOT763
SOT109-1
Decoder/Demultiplexer; 12@5V
Inverting
CMOS
CMOS
CMOS
CMOS
CMOS
TTL
+/- 5.2 mA
Applications
3-to-8 Line
Low Power or
16 Battery
2.0-6.0
V
74HC138D
Decoder/Demultiplexer; 12@5V
Inverting
+/- 5.2 mA
+/- 5.2 mA
+/- 5.2 mA
+/- 5.2 mA
+/- 4 mA
(SO16)
Applications
3-to-8 Line
Decoder/Demultiplexer; 12@5V
Inverting
Low Power or
16 Battery
SOT338-1
(SSOP16)
2.0-6.0
V
74HC138DB
74HC138N
Applications
3-to-8 Line
Decoder/Demultiplexer; 12@5V
Inverting
Low Power or
16 Battery
SOT38-4
(DIP16)
2.0-6.0
V
Applications
3-to-8 Line
Decoder/Demultiplexer; 12@5V
Inverting
Low Power or
16 Battery
SOT403-1
(TSSOP16)
2.0-6.0
V
74HC138PW
74HCT138D
74HCT138DB
74HCT138N
74HCT138PW
Applications
SOT109-1
(SO16)
3-to-8 Line
Decoder/Demultiplexer; 17
Inverting; TTL Enabled
4.5-5.5
V
16 Low Power
3-to-8 Line
Decoder/Demultiplexer; 17
Inverting; TTL Enabled
SOT338-1
(SSOP16)
4.5-
5.5V
16 Low Power
16 Low Power
16 Low Power
TTL
+/- 4 mA
3-to-8 Line
Decoder/Demultiplexer; 17
Inverting; TTL Enabled
SOT38-4
(DIP16)
4.5-
5.5V
TTL
+/- 4 mA
3-to-8 Line
Decoder/Demultiplexer; 17
Inverting; TTL Enabled
SOT403-1
(TSSOP16)
4.5-
5.5V
TTL
+/- 4 mA
Products, packages, availability and ordering
Type number North
Ordering code Marking/Packing Package
Product status Buy online
IC packing info
American type (12NC)
number
Standard Marking
SOT763
74HC138BQ
74HC138D
9352 737 78115 * Reel Pack, SMD,
7"
Full production
Full production
-
SOT109-1
(SO16)
Standard Marking
9337 134 00652
74HC138D
* Tube, CECC
SOT109-1
(SO16)
Standard Marking
9337 134 00653 * Reel Pack, SMD,
13", CECC
74HC138D-T
Full production
SOT338-1
(SSOP16)
Standard Marking
9351 744 10112
74HC138DB 74HC138DB
Full production
Full production
* Tube
Standard Marking
74HC138DB-T 9351 744 10118 * Reel Pack, SMD,
13"
SOT338-1
(SSOP16)
SOT38-4
(DIP16)
Standard Marking
* Tube, CECC
74HC138N
74HC138N
9336 692 90652
9351 743 80112
Full production
Full production
SOT403-1
(TSSOP16)
Standard Marking
* Tube
74HC138PW 74HC138PW
Standard Marking
74HC138PW-T 9351 743 80118 * Reel Pack, SMD,
13"
SOT403-1
(TSSOP16)
Full production
Full production
Standard Marking
9352 744 71115 * Reel Pack, SMD,
7"
SOT763
74HCT138BQ
-
SOT109-1
(SO16)
Standard Marking
* Tube, CECC
74HCT138D 74HCT138D
9337 134 10652
Full production
Full production
SOT109-1
(SO16)
Standard Marking
74HCT138D-T 9337 134 10653 * Reel Pack, SMD,
13", CECC
SOT338-1
(SSOP16)
Standard Marking
* Tube
74HCT138DB 74HCT138DB
9351 744 20112
Full production
Full production
Standard Marking
9351 744 20118 * Reel Pack, SMD,
13"
SOT338-1
(SSOP16)
74HCT138DB-
T
SOT38-4
(DIP16)
Standard Marking
9336 699 20652
74HCT138N 74HCT138N
Full production
Full production
* Tube, CECC
SOT403-1
(TSSOP16)
Standard Marking
74HCT138PW 74HCT138PW 9351 873 20112
74HCT138PW-
* Tube
Standard Marking
SOT403-1
(TSSOP16)
9351 873 20118 * Reel Pack, SMD,
13"
Full production
T
Similar products
74HC/HCT138 links to the similar products page containing an overview of products that are similar in function or
related to the type number(s) as listed on this page. The similar products page includes products from the same catalog
tree(s), relevant selection guides and products from the same functional category.
Support & tools
HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications(date 1998-03-01)
HC/T User Guide(date 1997-11-01)
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