Single 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps with input buffer; CMOS or LVDS DDR digital outputs一个12位ADC ; 65 MSPS, 80 MSPS, 105 Msps的或125 MSPS与输入缓冲器; CMOS或DDR LVDS数字输出