BGA7351,515中文资料_数据手册_规格书

BGA7351

ꢁ

ꢀ

1

)

4

9

+

50 MHz to 500 MHz high linearity Si variable gain amplifier;

28 dB gain range

Rev. 3 — 11 June 2014

Product data sheet

1. Product profile

1.1 General description

The BGA7351 MMIC is a dual independently digitally controlled IF Variable Gain

Amplifier (VGA) operating from 50 MHz to 500 MHz. Each IF VGA amplifies with a gain

range of 28 dB and at its maximum gain setting delivers 16.5 dBm output power at 1 dB

gain compression and a superior linear performance.

The BGA7351 Dual IF VGA is optimized for a differential gain error of less than 0.1 dB

for accurate gain control and has a total integrated gain error of less than 0.3 dB.

Moreover it meets the demanding phase error requirements for GSM. BGA7351 has less

than 3.0 phase error over the full gain range of 28 dB.

The gain controls of each amplifier are separate digital gain-control word, which is

provided externally through two sets of 5 bits.

The BGA7351 is housed in a 32 pins 5 mm  5 mm leadless HVQFN32 package.

1.2 Features and benefits

 Dual independent digitally controlled 28 dB gain range VGAs, with 5-bit control

interface

 50 MHz to 500 MHz frequency operating range

 Gain step size: 1 dB  0.1 dB

 22 dB power gain

 Fast gain stage switching capability

 16.5 dBm output power at 1 dB gain compression

 46 dBm third order intercept point

 Constant third order intercept point over output power

 85 dBc second harmonic level

 Excellent noise figure of 6 dB

 5 V single supply operation with power-down control

 Logic-level shutdown control pin reduces supply current

 Excellent ESD protection at all pins

 Moisture sensitivity level 1

 Unconditionally stable

 Excellent differential integrated gain and phase error

 Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances

(RoHS)

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

1.3 Applications

 Compatible with GSM / W-CDMA / WiMAX / LTE base-station infrastructure / multi

carrier systems

 Multi channel receivers

 General use for ADC driver applications

1.4 Quick reference data

Table 1.

Quick reference data

A_EN = "1"; B_EN = "1" (VGA enabled). Typical values at V_CC= 5 V; I_CC= 280 mA;

Tuned for f_IF= 172 MHz; B = 60 MHz; T_case= 25 C; Differential input resistance matched to 150 ;

Differential output resistance matched to 200 ; unless otherwise specified; see Section 11

“Application information”.

Symbol Parameter

Conditions

Min Typ Max Unit

4.75 5 5.25 V

V_CC

I_CC

supply voltage

supply current

V_CC(A)+ V_CC(B)

I_CC(A)+ I_CC(B)

A_EN = "0"; B_EN = "0"

A_EN = "1"; B_EN = "1"

maximum gain

-

3

5

mA

-

280 300 mA

[1]

[2]

G_p

power gain

21

7

22

23

dB



minimum gain

6

5

R_i(dif)

R_o(dif)

NF

differential input

resistance

120 150 180

differential output

resistance

140 180 220



[1]

noise figure

maximum gain

-

6

7

1

-

dB

increased rate per gain step

gain step 14

0.8

46

dB

[3][4]

[1][5]

[4][6]

IP3_O

output third-order

intercept point

dBm

P_L(1dB)

output power at 1 dB

gain compression

upper 5 gain steps

gain step 14

-

16.5

-

dBm

_2H

second harmonic level

differential gain error

differential phase error

-

85

-

dBc

dB

E_G(dif)

E_(dif)

 0.1 -

upper 12 dB gain range

1.0

0.5

-

deg

per gain step (for all

consecutive gain steps)

[1] Maximum gain; gain code = 00000.

[2] Minimum gain; gain code = 11100.

[3] P_L= 2 dBm per tone; spacing = 2 MHz (f₁= 171 MHz; f₂= 173 MHz)

[4] Gain code = 01110.

[5] Gain code = 00000, 00001, 00010, 00011, 00100.

[6] P_L= 2 dBm one tone (f = 86 MHz; f_meas= 172 MHz)

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

2 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

2. Pinning information

2.1 Pinning

terminal 1

index area

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

A_D2

A_D3

A_D4

n.c.

A_OUT_P

A_OUT_N

A_EN

GNDA

BGA7351

n.c.

GNDB

B_D4

B_D3

B_D2

B_EN

B_OUT_N

B_OUT_P

aaa-001979

Transparent top view

Fig 1. Pin configuration SOT617-1

2.2 Pin description

Table 2.

Symbol

Pin description

Description

A_D2

1

MSB  2 for gain control interface of channel A

MSB  1 for gain control interface of channel A

MSB for gain control interface of channel A

not connected ^[1]

A_D3

2

A_D4

3

n.c.

4

n.c.

5

not connected ^[1]

B_D4

6

MSB for gain control interface of channel B

MSB  1 for gain control interface of channel B

MSB  2 for gain control interface of channel B

LSB + 1 for gain control interface of channel B

LSB for gain control interface of channel B

channel B positive input ^[2]

B_D3

7

B_D2

8

B_D1

9

B_D0

10

B_IN_P

B_IN_N

GNDB

V_CCB

11

12

channel B negative input ^[2]

13, 20

14

ground for channel B

supply voltage for channel B

B_OUT_P

B_OUT_N

B_EN

GNDA

15, 17

16, 18

19

channel B positive output ^[2]

channel B negative output ^[2]

power enable pin for channel B

ground for channel A

21, 28

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

3 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

Table 2.

Pin description …continued

Symbol

A_EN

22

Description

power enable pin for channel A

channel A negative output ^[2]

channel A positive output ^[2]

supply voltage for channel A

channel A negative input ^[2]

A_OUT_N

A_OUT_P

V_CCA

23, 25

24, 26

27

A_IN_N

A_IN_P

A_D0

29

30

channel A positive input ^[2]

31

LSB for gain control interface of channel A

A_D1

32

LSB + 1 for gain control interface of channel A

GND

GND paddle RF ground and DC ground ^[3]

[1] Pin to be left open.

[2] Each channel should be independently enabled with logic HIGH and disabled with logic LOW.

[3] The center metal base of the SOT617-1 also functions as heatsink for the VGA.

3. Ordering information

Table 3.

Ordering information

Type number Package

Name

Description

Version

BGA7351

HVQFN32 plastic thermal enhanced very thin quad flat package;

SOT617-1

no leads; 32 terminals; body 5  5  0.85 mm

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

4 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

4. Functional diagram

$B'ꢃ

$B'ꢄ

$B'ꢅ

*$,1ꢀ

&21752/

,1ꢇ

$B9&20

$B287B3

$B287B1

287ꢇ

&0

,1ꢆ

9

287ꢆ

&&

$B(1

9

''

((

5(*8/$725

9

((

*1'$

*1'%

%*$ꢂꢀꢃꢄ

9

&&

%B(1

5(*8/$725

,1ꢆ

&0

,1ꢇ

9

((

%B9&20

%B287B1

%B287B3

287ꢆ

287ꢇ

%B'ꢅ

%B'ꢄ

%B'ꢃ

9

((

*$,1ꢀ

&21752/

DDDꢀꢁꢁꢂꢃꢄꢁ

Fig 2. Functional diagram

5. Enable control

Table 4.

Enable / disable control settings

Function description Mode description Enable

A_EN B_EN Min Max Min Max

Mode

V_EN(V)

I_EN(A)

A_EN, B_EN VGA function off

disable

"0"

"1"

"0"

"1"

0

0.8

-

1

A_EN, B_EN VGA in operating mode enable

1.6 5.25 -

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

5 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

6. Limiting values

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter

supply voltage (A)

Conditions

Min Max Unit

[1]

V_CC(A)

V_CC(B)

V_AEN

V_BEN

V_AD0

V_AD1

V_AD2

V_AD3

V_AD4

V_BD0

V_BD1

V_BD2

V_BD3

V_BD4

V_AIN

-

6

V

supply voltage (B)

voltage on pin A_EN

voltage on pin B_EN

voltage on pin A_D0

voltage on pin A_D1

voltage on pin A_D2

voltage on pin A_D3

voltage on pin A_D4

voltage on pin B_D0

voltage on pin B_D1

voltage on pin B_D2

voltage on pin B_D3

voltage on pin B_D4

voltage on pin A_IN

voltage on pin B_IN

RF input power

V

0.6 +6

V

V_BIN

V

P_i(RF)

T_case

T_j

-

20

dBm

case temperature

40 +85 C

junction temperature

-

150 C

V_ESD

electrostatic discharge

voltage

Human Body Model (HBM);

According JEDEC standard 22-A114E

4000 V

Charged Device Model (CDM);

According JEDEC standard 22-C101B

-

2000 V

Machine Model (MM);

400

V

According JEDEC standard 22-A115

[1] Caution: All digital pins may not exceed V_CCas the internal ESD circuit can be damaged. To prevent this it

is recommended that V_AENand V_BENare limited to a maximum of 5 mA.

7. Thermal characteristics

Table 6.

Thermal characteristics

Symbol Parameter

Conditions

Typ Unit

K/W

R_th(j-case)thermal resistance from junction to case

T_case= 85 C; V_CC= 5 V;

7

I_CC= 280 mA

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

6 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

8. Static characteristics

Table 7.

Characteristics

A_EN = "1"; B_EN = "1" (both channels enabled). Typical values at V_CC= 5 V; T_case= 25 C;

unless otherwise specified.

Symbol Parameter

Conditions

Min

Typ

Max Unit

V_CC

I_CC

supply voltage

supply current

V_CC(A)+ V_CC(B)

4.75

5

5.25

V

I_CC(A)+ I_CC(B)

A_EN = "0"; B_EN = "0"

A_EN = "1"; B_EN = "1"

-

3

5

mA

V

-

280

300

5.25

0.8

1.6

[1]

V_IH

V_IL

P

HIGH-level input voltage

LOW-level input voltage

power dissipation

1.6

-

V

1.4

W

[1] Voltage on the control pins.

9. Dynamic characteristics

Table 8.

Characteristics

A_EN = "1"; B_EN = "1" (VGA enabled). Typical values at V_CC= 5 V; I_CC= 280 mA;

Tuned for f_IF= 172 MHz; B = 60 MHz; T_case= 25 C; Differential input resistance matched to 150 ;

Differential output resistance matched to 200 ; unless otherwise specified; see Section 11

“Application information”.

Symbol Parameter

Conditions

Min Typ

Max Unit

[1]

G_p

power gain

maximum gain

f = 50 MHz; B = 30 MHz

f = 172 MHz; B = 60 MHz

f = 250 MHz; B = 60 MHz

f = 450 MHz; B = 100 MHz

minimum gain

-

22.5

-

dB

21 22

23

-

21.5

-

[2]

f = 50 MHz; B = 30 MHz

f = 172 MHz; B = 60 MHz

f = 250 MHz; B = 60 MHz

f = 450 MHz; B = 100 MHz

-

5.5

-

dB

7 6

5

-

6.5

8

-

[1]

G_adj

G_step

G_flat

gain adjustment range

gain step

28

-

1

-

gain flatness

 0.5

 0.1

 0.2

 0.3

1.0

-

dB

E_G(dif)

E_G(itg)

differential gain error

integrated gain error

-

dB

upper 12 dB gain range

full gain range

-

dB

-

dB

E_(dif)

differential phase error upper 12 dB gain range

-

deg

per gain step (for all

0.5

-

consecutive gain steps)

full gain range

gain step settling time per 1.5 dB of steady state

per 0.1 dB of steady state

-

3.0

5

-

deg

ns

t_s(step)G

15

40

20

ns

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

7 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

Table 8.

Characteristics …continued

A_EN = "1"; B_EN = "1" (VGA enabled). Typical values at V_CC= 5 V; I_CC= 280 mA;

Tuned for f_IF= 172 MHz; B = 60 MHz; T_case= 25 C; Differential input resistance matched to 150 ;

Differential output resistance matched to 200 ; unless otherwise specified; see Section 11

“Application information”.

Symbol Parameter

Conditions

Min Typ

Max Unit

t_d(grp)

group delay time

variation

B = 30 MHz

-

86

-

ps

t_pu

power-up time

-

1

s

R_i(dif)

differential input

resistance

120 150

140 180

180



R_o(dif)

differential output

resistance

220



_isol(ch-ch)isolation between

f  250 MHz

50

47

45

40

-

dB

channels

250 MHz < f < 400 MHz

400 MHz  f  500 MHz

CMRR

IP3_O

common-mode

rejection ratio

[3]

[4]

[5]

[6]

[7]

[8]

[4]

[5]

[6]

[7]

[8]

[9]

[10]

[11]

[8]

output third-order

intercept point

gain step 14

f = 50 MHz

-

47

46

41

34

-

dBm

f = 172 MHz

f = 250 MHz

f = 450 MHz

upper 5 gain steps

f = 50 MHz

-

48

44

41

33

-

dBm

f = 172 MHz

f = 250 MHz

f = 450 MHz

upper 5 gain steps

f = 50 MHz

IP2_O

output second-order

intercept point

-

78

73

65

-

dBm

f = 172 MHz

f = 250 MHz

upper 5 gain steps

f = 50 MHz

P_L(1dB)

output power at 1 dB

gain compression

-

16.8

16.5

15.8

15.1

-

dBm

f = 172 MHz

f = 250 MHz

f = 450 MHz

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

8 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

Table 8.

Characteristics …continued

A_EN = "1"; B_EN = "1" (VGA enabled). Typical values at V_CC= 5 V; I_CC= 280 mA;

Tuned for f_IF= 172 MHz; B = 60 MHz; T_case= 25 C; Differential input resistance matched to 150 ;

Differential output resistance matched to 200 ; unless otherwise specified; see Section 11

“Application information”.

Symbol Parameter

Conditions

second harmonic level gain step 14

P_L= 2 dBm, f = 172 MHz

Min Typ

Max Unit

[3]

[12]

[13]

[14]

[15]

[8]

_2H

-

85

82

67

64

-

dBc

P_L= 5 dBm, f = 172 MHz

P_L= 2 dBm, f = 450 MHz

P_L= 5 dBm, f = 450 MHz

upper 5 gain steps

[12]

[13]

[14]

[15]

[1]

P_L= 2 dBm, f = 172 MHz

P_L= 5 dBm, f = 172 MHz

P_L= 2 dBm, f = 450 MHz

P_L= 5 dBm, f = 450 MHz

maximum gain

-

83

80

59

54

6

-

dBc

dB

-

NF

noise figure

7

1

increase rate per gain step

0.8

dB

[1] Maximum gain; gain code = 00000.

[2] Minimum gain; gain code = 11100.

[3] Gain code = 01110.

[4] P_L= 2 dBm per tone; spacing = 2 MHz (f₁= 49 MHz; f₂= 51 MHz)

[5] P_L= 2 dBm per tone; spacing = 2 MHz (f₁= 171 MHz; f₂= 173 MHz)

[6] P_L= 2 dBm per tone; spacing = 2 MHz (f₁= 249 MHz; f₂= 251 MHz)

[7] P_L= 2 dBm per tone; spacing = 2 MHz (f₁= 449 MHz; f₂= 451 MHz)

[8] Gain code = 00000, 00001, 00010, 00011, 00100.

[9] P_L= 2 dBm per tone (f₁= 24 MHz; f₂= 74 MHz; f_meas= 50 MHz)

[10] P_L= 2 dBm per tone (f₁= 82 MHz; f₂= 90 MHz; f_meas= 172 MHz)

[11] P_L= 2 dBm per tone (f₁= 120 MHz; f₂= 130 MHz; f_meas= 250 MHz)

[12] P_L= 2 dBm one tone (f = 86 MHz; f_meas= 172 MHz)

[13] P_L= 5 dBm one tone (f = 86 MHz; f_meas= 172 MHz)

[14] P_L= 2 dBm one tone (f = 225 MHz; f_meas= 450 MHz)

[15] P_L= 5 dBm one tone (f = 225 MHz; f_meas= 450 MHz)

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

9 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

Table 9.

Gain control

input to either A_D0 to A_D4 pins

or B_D0 to B_D4 pins

gain step

nominal power gain (dB)

0

00000

00001

00010

00011

00100

00101

00110

00111

01000

01001

01010

01011

01100

01101

01110

01111

10000

10001

10010

10011

10100

10101

10110

10111

11000

11001

11010

11011

11100

> 11100

22

21

20

19

18

17

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

-

8

7

6

5

4

3

2

1

0

1

2

3

4

5

6

10. Moisture sensitivity

Table 10. Moisture sensitivity level

Test methodology

Class

JESD-22-A113

1

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

10 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

11. Application information

aaa-001981

aaa-001982

0.5

2.0

0.5

2.0

(2)

(1)

(2)

(1)

V

(V)

V

en

(V)

o

(V)

en

o

(V)

0.3

1.6

0.3

1.6

0.1

-0.1

-0.3

-0.5

1.2

0.8

0.4

0

0.1

-0.1

-0.3

-0.5

1.2

0.8

0.4

0

40

80

120

0

40

80

120

t (ns)

(1) V_O

(2) V_en

(1) V_O

(2) V_en

Fig 3. Enable time response

Fig 4. Gain step response from min. to max. gain

aaa-001986

aaa-001987

0

11

150

phase S

(deg)

0

11

150

phase S

(deg)

mag S

(dB)

mag S

(dB)

11

-10

-20

-30

-40

-50

-60

120

90

60

30

0

-10

-20

-30

-40

-50

-60

120

90

60

30

0

phase S

11

mag S

11

phase S

11

mag S

11

-30

20

40

60

80

100

120

140

160

180

200

220

240

f (MHz)

Tuned for f_IF= 50 MHz; measured at gain step 0

(maximum gain).

Tuned for f_IF= 172 MHz; measured at gain step 0

(maximum gain).

Fig 5. S₁₁as a function of frequency

Fig 6. S₁₁as a function of frequency

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

11 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

aaa-001983

aaa-001984

25

G

p

(1)

p

(1)

(dB)

20

(dB)

20

15

10

5

15

10

5

0

-5

(29)

-10

20

40

60

80

100

120

140

160

180

200

220

240

f (MHz)

Tuned for f_IF= 50 MHz; P_L= 5 dBm; step size 1 dB.

(1) gain step 0 (maximum gain)

Tuned for f_IF= 172 MHz; P_L= 5 dBm; step size 1 dB.

(1) gain step 0 (maximum gain)

(29) gain step 28 (minimum gain)

Fig 7. Power gain as a function of frequency

Fig 8. Power gain as a function of frequency

aaa-001985

DDDꢀꢁꢂꢅꢆꢃꢇ

25

ꢃꢊ

G

p

ꢋꢂꢌ

*

S

(1)

(dB)

20

ꢋG%ꢌ

ꢂꢊ

ꢊ

15

10

5

0

ꢆꢊ

-5

ꢋꢃꢍꢌ

(29)

-10

ꢆꢂꢊ

ꢅꢁꢁ

180

200

220

240

260

280

300

320

ꢅꢃꢁ

ꢅꢅꢁ

ꢅꢈꢁ

ꢅꢉꢁ

ꢊꢁꢁ

Iꢀꢋ0+]ꢌ

f (MHz)

Tuned for f_IF= 250 MHz; P_L= 5 dBm; step size 1 dB.

(1) gain step 0 (maximum gain)

Tuned for f_IF= 450 MHz; P_L= 5 dBm; step size 1 dB.

(1) gain step 0 (maximum gain)

(29) gain step 28 (minimum gain)

Fig 9. Power gain as a function of frequency

Fig 10. Power gain as a function of frequency

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

12 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

aaa-001990

DDDꢀꢁꢂꢅꢆꢃꢈ

0

150

ꢁ

ꢂꢂ

ꢃꢁꢁ

SKDVHꢀ6

ꢋGHJꢌ

mag S

11

phase S

(deg)

PPDDJJꢀꢀ66

ꢋG%ꢌ

11

ꢂꢂ

(dB)

-10

120

90

60

30

0

ꢆꢂꢃ

ꢆꢃꢅ

ꢆꢄꢈ

ꢆꢅꢉ

ꢆꢈꢁ

ꢂꢄꢁ

ꢈꢁ

PPDDJJꢀꢀ66

ꢂꢂ

mag S

11

-20

-30

-40

-50

-60

SKDVHꢀ6

ꢂꢂ

ꢆꢂꢁ

ꢆꢉꢁ

ꢆꢂꢊꢁ

phase S

11

-30

180

200

220

240

260

280

300

320

ꢃꢁꢁ

ꢃꢊꢁ

ꢄꢁꢁ

ꢄꢊꢁ

ꢅꢁꢁ

ꢅꢊꢁ

ꢊꢁꢁ

ꢊꢊꢁ

Iꢀꢋ0+]ꢌ

f (MHz)

Tuned for f_IF= 250 MHz; measured at gain step 0

(maximum gain).

Tuned for f_IF= 450 MHz; measured at gain step 0

(maximum gain).

Fig 11. S₁₁as a function of frequency

Fig 12. S₁₁as a function of frequency

aaa-001991

aaa-001992

0

mag S

(dB)

mag S

(dB)

12

-10

-20

-30

-40

-50

-60

-10

-20

-30

-40

-50

-60

20

40

60

80

100

120

140

160

180

200

220

240

f (MHz)

Tuned for f_IF= 50 MHz; measured at gain step 0

(maximum gain).

Tuned for f_IF= 172 MHz; measured at gain step 0

(maximum gain).

Fig 13. S₁₂as a function of frequency

Fig 14. S₁₂as a function of frequency

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

13 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

aaa-001993

DDDꢀꢁꢂꢅꢆꢃꢄ

0

ꢁ

mag S

(dB)

PDJꢀ6

ꢋG%ꢌ

12

ꢂꢃ

-10

-20

-30

-40

-50

-60

ꢆꢂꢁ

ꢆꢃꢁ

ꢆꢄꢁ

ꢆꢅꢁ

ꢆꢊꢁ

ꢆꢈꢁ

180

200

220

240

260

280

300

320

ꢃꢁꢁ

ꢃꢊꢁ

ꢄꢁꢁ

ꢄꢊꢁ

ꢅꢁꢁ

ꢅꢊꢁ

ꢊꢁꢁ

ꢊꢊꢁ

Iꢀꢋ0+]ꢌ

f (MHz)

Tuned for f_IF= 250 MHz; measured at gain step 0

(maximum gain).

Tuned for f_IF= 450 MHz; measured at gain step 0

(maximum gain).

Fig 15. S₁₂as a function of frequency

Fig 16. S₁₂as a function of frequency

aaa-001995

aaa-001996

0.5

E

G(dif)

E

G(dif)

(dB)

0.3

(1)

(2)

(3)

0.1

-0.1

-0.3

-0.5

0.1

-0.1

-0.3

-0.5

0

10

20

30

0

10

20

30

G

step

G

step

Tuned for f_IF= 50 MHz.

Tuned for f_IF= 172 MHz.

(1) T_amb= 40 C

(2) T_amb= +25 C

(3) T_amb= +85 C

Fig 17. Differential gain error as a function of

gain step

Fig 18. Differential gain error as a function of

gain step

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

14 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

aaa-001997

DDDꢀꢁꢂꢅꢆꢃꢃ

0.5

ꢁꢎꢊ

*ꢋGLIꢌ

ꢋG%ꢌ

(

E

G(dif)

(dB)

0.3

ꢁꢎꢄ

ꢁꢎꢂ

0.1

-0.1

-0.3

-0.5

ꢆꢁꢎꢂ

ꢆꢁꢎꢄ

ꢆꢁꢎꢊ

0

10

20

30

ꢁ

ꢊ

ꢂꢁ

ꢂꢊ

ꢃꢁ

ꢃꢊ

VWHS

ꢄꢁ

*

G

step

Tuned for f_IF= 250 MHz.

Tuned for f_IF= 450 MHz.

Fig 19. Differential gain error as a function of

gain step

Fig 20. Differential gain error as a function of

gain step

aaa-001998

aaa-001999

20

P

L(1dB)

(dBm)

L(1dB)

(dBm)

19

18

17

16

15

18

17

16

15

(1) (2) (3)

0

1

2

3

4

5

0

1

2

3

4

5

G

(dB)

G

(dB)

step

Tuned for f_IF= 50 MHz.

Tuned for f_IF= 172 MHz.

(1) T_amb= 40 C

(2) _amb= +25 C

(3) T_amb= +85 C

T

Fig 21. output power at 1 dB gain compression as a

function of gain step

Fig 22. output power at 1 dB gain compression as a

function of gain step

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

15 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

aaa-002000

DDDꢀꢁꢂꢅꢉꢁꢁ

20

ꢃꢁ

/ꢋꢂG%ꢌ

ꢋG%Pꢌ

3

P

L(1dB)

(dBm)

19

ꢂꢍ

18

17

16

15

ꢂꢉ

ꢂꢏ

ꢂꢈ

ꢂꢊ

0

1

2

3

4

5

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢊ

*

G

(dB)

VWHS

step

Tuned for f_IF= 250 MHz.

Tuned for f_IF= 450 MHz.

Fig 23. output power at 1 dB gain compression as a

function of gain step

Fig 24. output power at 1 dB gain compression as a

function of gain step

aaa-002001

55

IP3

o

(dBm)

50

(1)

(2)

(3)

45

40

35

-2

-1

0

1

2

3

P

(dBm) per tone

L

Tuned for f_IF= 172 MHz; measured at gain step 0 (maximum gain).

(1) T_amb= 40 C

(2) _amb= +25 C

T

(3) T_amb= +85 C

Fig 25. Output third order intercept point as a function of output power per tone

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

16 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

aaa-002002

aaa-002003

55

IP3

o

(1)

(2)

(dBm)

(2)

(1)

45

35

25

15

35

25

15

-4

-2

0

2

4

6

-4

-2

0

2

4

6

P

L

(dBm) per tone

P (dBm) per tone

L

Tuned for f_IF= 50 MHz.

Tuned for f_IF= 172 MHz.

(1) gain step 0

(2) gain step 14

(1) gain step 0

(2) gain step 14

Fig 26. Output third order intercept point as a function

of output power per tone

Fig 27. Output third order intercept point as a function

of output power per tone

aaa-002004

DDDꢀꢁꢂꢅꢉꢁꢂ

55

ꢊꢊ

,3ꢄ

R

IP3

o

ꢋG%Pꢌ

(dBm)

45

ꢅꢊ

(2)

(1)

ꢋꢃꢌ

ꢋꢂꢌ

35

25

15

ꢄꢊ

ꢃꢊ

ꢂꢊ

-4

-2

0

2

4

6

ꢆꢅ

ꢆꢃ

ꢁ

ꢃ

ꢅ

ꢈ

3 ꢀSHUꢀWRQHꢀꢋG%Pꢌ

P

L

(dBm) per tone

/

Tuned for f_IF= 250 MHz.

Tuned for f_IF= 450 MHz.

(1) gain step 0

(2) gain step 14

(1) gain step 0

(2) gain step 14

Fig 28. Output third order intercept point as a function

of output power per tone

Fig 29. Output third order intercept point as a function

of output power per tone

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

17 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

aaa-002005

DDDꢀꢁꢂꢅꢉꢁꢊ

-40

ꢆꢅꢁ

Į

ꢃ+

α

2H

(dBc)

ꢋG%Fꢌ

-50

ꢆꢊꢁ

-60

-70

-80

-90

ꢆꢈꢁ

ꢆꢏꢁ

ꢆꢉꢁ

ꢆꢍꢁ

ꢋꢃꢌ

ꢋꢂꢌ

(2)

(1)

0

10

20

30

ꢁ

ꢊ

ꢂꢁ

ꢂꢊ

ꢃꢁ

ꢃꢊ

VWHS

ꢄꢁ

*

G

step

Tuned for f_IF= 86 MHz; f_2H= 172 MHz; f_3H= 258 MHz.

Tuned for f_IF= 225 MHz; f_2H= 450 MHz; f_3H= 675 MHz.

(1) P_L= 2 dBm

(2) P_L= 5 dBm

(1) P_L= 2 dBm

(2) P_L= 5 dBm

Fig 30. Second harmonic level as a function of

gain step

Fig 31. Second harmonic level as a function of

gain step

aaa-002006

aaa-002007

-70

α

3H

2H

3H

2H

(dBc)

(1)

(3)

(2)

-80

(1)

(2)

α

2H

(2)

(3)

(1)

α

2H

(3)

-90

-100

-110

-90

-100

-110

-90

(3)

α

3H

(1)

(2)

-100

-110

-100

-110

-4

-2

0

2

4

6

-4

-2

0

2

4

6

P

(dBm)

P

(dBm)

L

Tuned for f_IF= 50 MHz; f_2H= 100 MHz; f_3H= 150 MHz;

Tuned for f_IF= 86 MHz; f_2H= 172 MHz; f_3H= 258 MHz;

T_amb= 25 C.

(1) gain step 0

(2) gain step 14

(3) gain step 24

(1) gain step 0

(2) gain step 14

(3) gain step 24

Fig 32. Second harmonic level and third harmonic

level as a function of output power

Fig 33. Second harmonic level and third harmonic

level as a function of output power

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

18 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

aaa-002008

aaa-002009

-70

α

-50

2H

(dBc)

-60

-50

α

(1)

(3)

(2)

3H

α

(dBc)

2H

(dBc)

3H

(dBc)

-60

(1)

(3)

(2)

-80

α

2H

α

2H

-70

-80

-70

-90

-100

-110

-90

-80

(1)

(3)

(2)

α

3H

-90

α

3H

(2)

(3)

(1)

-100

-110

-100

-110

-100

-110

-4

-2

0

2

4

6

-4

-2

0

2

4

6

P

(dBm)

P

(dBm)

L

Tuned for f_IF= 172 MHz; f_2H= 358 MHz; f_3H= 530 MHz;

_amb= 25 C.

Tuned for f_IF= 250 MHz; f_2H= 500 MHz; f_3H= 750 MHz;

T_amb= 25 C.

T

(1) gain step 0

(2) gain step 14

(3) gain step 24

(1) gain step 0

(2) gain step 14

(3) gain step 24

Fig 34. Second harmonic level and third harmonic

level as a function of output power

Fig 35. Second harmonic level and third harmonic

level as a function of output power

DDDꢀꢁꢂꢅꢉꢁꢅ

DDDꢀꢁꢂꢅꢉꢁꢆ

ꢆꢄꢁ

LVROꢋFKꢆFKꢌ

ꢋG%ꢌ

ꢂꢁ

Į

1)

ꢋG%ꢌ

ꢋꢊꢌ

ꢆꢅꢁ

ꢋꢅꢌ

ꢋꢄꢌ

ꢍ

ꢉ

ꢏ

ꢈ

ꢋꢂꢌ

ꢆꢊꢁ

ꢆꢈꢁ

ꢆꢏꢁ

ꢆꢉꢁ

ꢋꢃꢌ

ꢋꢂꢌ

ꢅꢁꢁ

ꢅꢃꢁ

ꢅꢅꢁ

ꢅꢈꢁ

ꢅꢉꢁ

ꢊꢁꢁ

Iꢀꢋ0+]ꢌ

ꢊꢃꢁ

ꢅꢁꢁ

ꢅꢃꢁ

ꢅꢅꢁ

ꢅꢈꢁ

ꢅꢉꢁ

ꢊꢁꢁ

Iꢀꢋ0+]ꢌ

Tuned for f_IF= 450 MHz

(1) channel A at gain step 0 (maximum gain);

channel B at gain step 28 (minimum gain)

(1) gain step 0

(2) gain step 1

(3) gain step 2

(4) gain step 3

(5) gain step 4

(2) channel A at gain step 0 (maximum gain);

channel B at gain step 0 (maximum gain)

Fig 36. Isolation between channels as a function of

frequency

Fig 37. Noise figure as a function of frequency

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

19 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

GND

JP13

LSB

R15

R1

VCM IN A

GND

JP5

JP15 GND

R2

R3

R4

X5

A OUT

VCCA

1

2 3

R13

MSB

S1

JP10

C2

C1

A VDD25ext

GND

VCC

GND

I1

C10

JP7

S3

JP11

B VDD25ext

C3

C4

C9

MSB

VCC I2C

B OUT

R10

JPA

JP16 GND

R5

R6

R7

R8

R9

C19

1

2 3

VCCBGND

VCM IN B

GND

LSB

S2

GND

JP12

X2

GND

aaa-001258

For a list of components see Table 11.

Fig 39. Components top side

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

21 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

C17

C20

C15

C23

C22

C16

C21

C18

aaa-001259

For a list of components see Table 11.

Fig 40. Components bottom side

Table 11. List of components

See Figure 38, Figure 39 and Figure 40.

Component

Description

capacitor

BGA7351

jumper

Conditions

Value

Size Remarks

0603

C1, C3, C6, C8, C9

100 pF

C2, C4

10 nF

0603

C5, C7

1 nF

0603

C10, C15, C16, C17, C18

100 nF

0603

C11

-

0603 not mounted

0603

C12

-

C13

-

C14

-

C19, C20, C21, C22, C23

1 F

I1

-

JP1

JP2

JP3

JP4

JP5

JP6

JP7

JP8

JP5 AG

jumper

JP5 BG

jumper

JP2 EN

jumper

JP2 VCCB

JP2 VCCA

JP2 VCCdig

JP2 VCM

JP2 VCMinA

jumper

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

22 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

Table 11. List of components

See Figure 38, Figure 39 and Figure 40.

Component

JP9

Description

jumper

Conditions

Value

Size Remarks

JP2 VCMinB

JP2 VCMA

JP2 VCMB

JP2 GND

-

JP10

jumper

JP11

jumper

JP12

jumper

JP13

jumper

JP2 GND

JP15

jumper

JP3 VoutA

JP3 VoutB

JP16

jumper

L1, L2, L3, L4

inductor

f_IF= 50 MHz 1200 nH 0603 dependent on PCB layout

f_IF= 172 MHz 150 nH

f_IF= 250 MHz 56 nH

f_IF= 450 MHz 27 nH

10 k

0603 dependent on PCB layout

0402

R1, R2, R3, R4, R5, R6, R7, R8, R9, R11, resistor

R14, R15, R16, R17

R10, R13

resistor

10 

1206

R12, R18, R19, R20, R21, R22, R24, R25 resistor

0 

0402

R23, R26

S1, S2

S3

resistor

-

0402 not mounted

CTS-219-05

DIP-switch

CTS-219-02

TR1

TR2

TR3

TR4

X1

1:3 transformer

1:4 transformer

1:3 transformer

1:4 transformer

-

Mini Circuits ADT3-1T+

Mini Circuits ADT4-1T+

Mini Circuits ADT3-1T+

not mounted

BOUT_P

X2

SMA-connector

X3

BIN_P

X4

AIN_P

X5

AOUT_P

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

23 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

12. Package outline

+94)1ꢀꢁꢊꢅSODVWLFꢅWKHUPDOꢅHQKDQFHGꢅYHU\ꢅWKLQꢅTXDGꢅIODWꢅSDFNDJHꢋꢅQRꢅOHDGVꢋꢅ

ꢀꢁꢅWHUPLQDOVꢋꢅERG\ꢅꢃꢅ[ꢅꢃꢅ[ꢅꢌꢍꢎꢃꢅPPꢅ

627ꢈꢄꢂꢉꢄꢅ

%ꢀ $ꢀ

'ꢀ

WHUPLQDOꢀꢂꢀ

LQGH[ꢀDUHDꢀ

$ꢀ

$

ꢂꢀ

(ꢀ

Fꢀ

GHWDLOꢀ;ꢀ

&ꢀ

H

ꢂꢀ

\ꢀ

\

Hꢀ

ꢂꢐꢃꢀHꢀ

Eꢀ

Yꢀ 0ꢀ

Zꢀ 0ꢀ

&ꢀ $ꢀ %ꢀ

&ꢀ

ꢂꢀ

ꢏꢅ

ꢄꢈꢅ

/ꢀ

ꢄꢂꢅ

ꢎꢅ

Hꢀ

H

(

ꢃꢀ

Kꢀ

ꢂꢐꢃꢀHꢀ

ꢄꢅ

ꢁꢐꢅ

WHUPLQDOꢀꢂꢀ

LQGH[ꢀDUHDꢀ

ꢀꢁꢅ

ꢁꢃꢅ

;ꢀ

'

Kꢀ

ꢁꢀ

ꢃꢎꢊꢀ

ꢊꢀPPꢀ

VFDOHꢀ

',0(16,216ꢅꢆPPꢅDUHꢅWKHꢅRULJLQDOꢅGLPHQVLRQVꢇꢅ

ꢆꢄꢇ

$

ꢅ

ꢆꢄꢇꢅ

81,7ꢅ

$

Fꢅ

Hꢅ

ꢁꢎꢊꢀ

\ꢅ

\

Eꢅ

(

Kꢅ

H

ꢁꢅ

/ꢅ

Yꢅ

Zꢅ

'ꢅ

'

(ꢅ

ꢄꢅ

Kꢅ

ꢄꢅ

PD[ꢍꢅ

ꢁꢎꢁꢊꢀ ꢁꢎꢄꢁꢀ

ꢁꢎꢁꢁꢀ ꢁꢎꢂꢉꢀ

ꢊꢎꢂꢀ ꢄꢎꢃꢊꢀ ꢊꢎꢂꢀ ꢄꢎꢃꢊꢀ

ꢅꢎꢍꢀ ꢃꢎꢍꢊꢀ ꢅꢎꢍꢀ ꢃꢎꢍꢊꢀ

ꢁꢎꢊꢀ

ꢁꢎꢄꢀ

PPꢀ

ꢁꢎꢁꢊꢀ ꢁꢎꢂꢀ

ꢂꢀ

ꢁꢎꢃꢀ

ꢄꢎꢊꢀ

ꢁꢎꢂꢀ ꢁꢎꢁꢊꢀ

1RWHꢅ

ꢂꢎꢀ3ODVWLFꢀRUꢀPHWDOꢀSURWUXVLRQVꢀRIꢀꢁꢎꢁꢏꢊꢀPPꢀPD[LPXPꢀSHUꢀVLGHꢀDUHꢀQRWꢀLQFOXGHGꢎꢀꢀ

ꢅ5()(5(1&(6ꢅ

287/,1(ꢅ

9(56,21ꢅ

(8523($1ꢅ

352-(&7,21ꢅ

,668(ꢅ'$7(ꢅ

ꢅ,(&ꢅ

ꢅ-('(&ꢅ

02ꢆꢃꢃꢁꢀ

ꢅ-(,7$ꢅ

ꢁꢂꢆꢁꢉꢆꢁꢉꢀ

ꢁꢃꢆꢂꢁꢆꢂꢉꢀ

ꢀ627ꢈꢂꢏꢆꢂꢀ

ꢆꢀꢆꢀꢆꢀ

Fig 41. Package outline SOT617-1 (HVQFN32)

BGA7351

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Product data sheet

Rev. 3 — 11 June 2014

24 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

13. Abbreviations

Table 12. Abbreviations

Acronym

ADC

Description

Analog-to-Digital Converter

Dual In-line Package

DIP

EMI

ElectroMagnetic Interference

ElectroStatic Discharge

ESD

GSM

HTOL

HVQFN

IF

Global System for Mobile Communications

High Temperature Operating Life

Heatsink Very-thin Quad Flat-pack No-leads

Intermediate Frequency

LSB

Least Significant Bit

LTE

Long Term Evolution

MMIC

MSB

Monolithic Microwave Integrated Circuit

Most Significant Bit

PCB

Printed-Circuit Board

SMA

SubMiniature version A

WiMAX

W-CDMA

Worldwide Interoperability for Microwave Access

Wideband Code Division Multiple Access

14. Revision history

Table 13. Revision history

Document ID

BGA7351 v.3

Modifications:

Release date

20140611

Data sheet status

Change notice

Supersedes

Product data sheet

-

BGA7351 v.2

• Table 8 on page 7: some changes have been made

• Section 11 on page 11: some graphs have been added.

• Table 11 on page 22: the condition f = 450 MHz has been added for the row containing

the inductors

BGA7351 v.2

BGA7351 v.1

20121219

20111228

Product data sheet

-

BGA7351 v.1

-

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

25 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

15. Legal information

15.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

Suitability for use — NXP Semiconductors products are not designed,

15.2 Definitions

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer’s own

risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

15.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

26 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

product for such automotive applications, use and specifications, and (b)

whenever customer uses the product for automotive applications beyond

NXP Semiconductors’ specifications such use shall be solely at customer’s

own risk, and (c) customer fully indemnifies NXP Semiconductors for any

liability, damages or failed product claims resulting from customer design and

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

use of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It is neither qualified nor tested

in accordance with automotive testing or application requirements. NXP

Semiconductors accepts no liability for inclusion and/or use of

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

non-automotive qualified products in automotive equipment or applications.

15.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

In the event that customer uses the product for design-in and use in

automotive applications to automotive specifications and standards, customer

(a) shall use the product without NXP Semiconductors’ warranty of the

16. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

BGA7351

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 11 June 2014

27 of 28

BGA7351

NXP Semiconductors

50 MHz to 500 MHz high linearity Si variable gain amplifier

17. Contents

1

Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1

General description . . . . . . . . . . . . . . . . . . . . . 1

Features and benefits. . . . . . . . . . . . . . . . . . . . 1

Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Quick reference data . . . . . . . . . . . . . . . . . . . . 2

1.1

1.2

1.3

1.4

2

2.1

2.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3

3

Ordering information. . . . . . . . . . . . . . . . . . . . . 4

Functional diagram . . . . . . . . . . . . . . . . . . . . . . 5

Enable control . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6

Thermal characteristics . . . . . . . . . . . . . . . . . . 6

Static characteristics. . . . . . . . . . . . . . . . . . . . . 7

Dynamic characteristics . . . . . . . . . . . . . . . . . . 7

Moisture sensitivity . . . . . . . . . . . . . . . . . . . . . 10

Application information. . . . . . . . . . . . . . . . . . 11

Application PCB . . . . . . . . . . . . . . . . . . . . . . . 20

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 24

Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 25

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 25

4

5

6

7

8

9

10

11

11.1

12

13

14

15

Legal information. . . . . . . . . . . . . . . . . . . . . . . 26

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 26

Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 27

15.1

15.2

15.3

15.4

16

17

Contact information. . . . . . . . . . . . . . . . . . . . . 27

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 11 June 2014

Document identifier: BGA7351

Source Url Status Check Date：	2013-06-14 00:00:00	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	HVQCCN,	针数：	32
Reach Compliance Code：	unknown	风险等级：	5.64
Is Samacsys：	N	JESD-30 代码：	S-PQCC-N32
长度：	5 mm	功能数量：	1
端子数量：	32	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	HVQCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	座面最大高度：	1 mm
标称供电电压：	5 V	表面贴装：	YES
电信集成电路类型：	RF AND BASEBAND CIRCUIT	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	5 mm
Base Number Matches：	1

型号	制造商	描述	价格	文档
BGA735N16	INFINEON	High Linearity Tri-Band LTE/UMTS LNA (2600/2300/2100, 1900/1800, 900/800/700 MHz)	获取价格
BGA735N16E6327XTSA1	INFINEON	Telecom Circuit, 1-Func, 2.30 X 2.30 MM, 0.39 MM HEIGHT, ROHS COMPLIANT, TSNP-16	获取价格
BGA736L16	INFINEON	Tri-Band HSDPA LNA (2100, 1900/2100, 800/900 MHz)	获取价格
BGA748N16	INFINEON	High Linearity Quad-Band UMTS LNA (2100, 1900, 900, 800 MHz)	获取价格
BGA751L7	INFINEON	Low Power Single-Band UMTS LNA (800, 900 MHz)	获取价格
BGA751L7E6327XTSA1	INFINEON	Narrow Band Low Power Amplifier, 875MHz Min, 885MHz Max, 2 X 1.30 MM, 0.39 MM HEIGHT, GREEN, LEADLESS, TSLP-7	获取价格
BGA751N7	INFINEON	Telecom Circuit, 1-Func, Bipolar, PDSO6, 2 X 1.30 MM, 0.39 MM HEIGHT, GREEN, TSNP-7/6	获取价格
BGA751N7E6327XTSA1	INFINEON	Telecom Circuit, 1-Func, Bipolar, PDSO6, 2 X 1.30 MM, 0.39 MM HEIGHT, GREEN, TSNP-7/6	获取价格
BGA758L7	INFINEON	5-6 GHz LNA for WLAN	获取价格
BGA771N16	INFINEON	High Linearity Dual-Band UMTS LNA (1900/1800/2100, 800/900MHz)	获取价格

BGA7351,515

BGA7351,515 概述

BGA7351,515 规格参数

BGA7351,515 数据手册

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