HEC4040BT,118 [NXP]

IC 4000/14000/40000 SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16, PLASTIC, SOT-109, SO-16, Counter;
HEC4040BT,118
型号: HEC4040BT,118
厂家: NXP    NXP
描述:

IC 4000/14000/40000 SERIES, ASYN NEGATIVE EDGE TRIGGERED 12-BIT UP BINARY COUNTER, PDSO16, PLASTIC, SOT-109, SO-16, Counter

光电二极管 逻辑集成电路 触发器
文件: 总13页 (文件大小:729K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
HEF4040B  
12-stage binary ripple counter  
Rev. 9 — 23 March 2016  
Product data sheet  
1. General description  
The HEF4040B is a 12-stage binary ripple counter with a clock input (CP), an overriding  
asynchronous master reset input (MR) and twelve fully buffered outputs (Q0 to Q11). The  
counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter  
stages and forces all outputs LOW, independent of CP. Each counter stage is a static  
toggle flip-flop. The clock input is highly tolerant of slow rise and fall times due to its  
Schmitt trigger action.  
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS  
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.  
2. Features and benefits  
Tolerant of slow clock rise and fall time  
Fully static operation  
5 V, 10 V, and 15 V parametric ratings  
Standardized symmetrical output characteristics  
Specified from 40 C to +85 C  
Complies with JEDEC standard JESD 13-B  
3. Applications  
Frequency dividing circuits  
Time delay circuits  
Control counters  
4. Ordering information  
Table 1.  
Ordering information  
All types operate from 40 C to +85 C.  
Type number  
Package  
Name  
Description  
Version  
HEF4040BT  
SO16  
plastic small outline package; 16 leads; body width 3.9 mm  
SOT109-1  
 
 
 
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
5. Functional diagram  
ꢀꢅ  
&3  
7
ꢀꢁꢂ67$*(ꢃ&2817(5  
ꢀꢀ  
05  
&
'
ꢀꢉ ꢀꢁ ꢀꢊ ꢀꢈ  
4ꢅ 4ꢀ 4ꢁ 4ꢉ 4ꢊ 4ꢈ 4ꢇ 4ꢆ 4ꢋ 4ꢄ 4ꢀꢅ 4ꢀꢀ  
ꢀꢀꢁDDGꢂꢃꢄ  
Fig 1. Functional diagram  
))ꢃꢀ  
))ꢃꢁ  
))ꢃꢀꢁ  
4
4
4
&3  
7
7
7
4
4
4
&'  
&'  
&'  
05  
4ꢅ  
4ꢀ  
4ꢀꢀ  
ꢀꢀꢁDDHꢅꢁꢂ  
Fig 2. Logic diagram  
ꢀꢇ  
ꢉꢁ  
ꢇꢊ ꢀꢁꢋ ꢁꢈꢇ ꢈꢀꢁ ꢀꢅꢁꢊ ꢁꢅꢊꢋ ꢊꢅꢄꢇ  
&3ꢃLQSXW  
05ꢃLQSXW  
4ꢅ  
4ꢀ  
4ꢁ  
4ꢉ  
4ꢊ  
4ꢈ  
4ꢇ  
4ꢆ  
4ꢋ  
4ꢄ  
4ꢀꢅ  
4ꢀꢀ  
ꢀꢀꢁDDGꢂꢃꢆ  
Fig 3. Timing diagram  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
2 of 13  
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
6. Pinning information  
6.1 Pinning  
+()ꢀꢁꢀꢁ%  
ꢀꢇ  
ꢀꢈ  
ꢀꢊ  
ꢀꢉ  
ꢀꢁ  
ꢀꢀ  
ꢀꢅ  
4ꢀꢀ  
4ꢈ  
4ꢊ  
4ꢇ  
4ꢉ  
4ꢁ  
4ꢀ  
9
''  
4ꢀꢅ  
4ꢄ  
4ꢆ  
4ꢋ  
05  
&3  
4ꢅ  
9
66  
ꢀꢀꢁDDHꢅꢁꢇ  
Fig 4. Pin configuration  
6.2 Pin description  
Table 2.  
Symbol  
VSS  
Pin description  
Pin  
Description  
8
ground supply voltage  
parallel output  
Q0 to Q11  
CP  
9, 7, 6, 5, 3, 2, 4, 13, 12, 14, 15, 1  
10  
11  
16  
clock input (HIGH-to-LOW edge-triggered)  
master reset input (active HIGH)  
supply voltage  
MR  
VDD  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
3 of 13  
 
 
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
7. Limiting values  
Table 3.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDD  
IIK  
Parameter  
Conditions  
Min  
Max  
+18  
Unit  
V
supply voltage  
0.5  
input clamping current  
input voltage  
VI < 0.5 V or VI > VDD + 0.5 V  
VO < 0.5 V or VO > VDD + 0.5 V  
-
10  
mA  
V
VI  
0.5  
VDD + 0.5  
10  
IOK  
output clamping current  
input/output current  
supply current  
-
mA  
mA  
mA  
C  
II/O  
-
10  
IDD  
-
65  
40  
-
50  
Tstg  
Tamb  
Ptot  
P
storage temperature  
ambient temperature  
total power dissipation  
power dissipation  
+150  
+85  
C  
[1]  
SO16 package  
per output  
500  
mW  
mW  
-
100  
[1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.  
8. Recommended operating conditions  
Table 4.  
Symbol  
VDD  
Recommended operating conditions  
Parameter  
Conditions  
Min  
Typ  
Max  
15  
Unit  
supply voltage  
3
-
-
-
-
-
-
V
VI  
input voltage  
0
VDD  
+85  
3.75  
0.5  
V
Tamb  
ambient temperature  
input transition rise and fall rate  
in free air  
40  
C  
t/V  
VDD = 5 V  
VDD = 10 V  
VDD = 15 V  
-
-
-
ms/V  
ms/V  
ms/V  
0.08  
9. Static characteristics  
Table 5.  
Static characteristics  
VSS = 0 V; VI = VSS or VDD; unless otherwise specified.  
Symbol Parameter  
Conditions  
VDD  
Tamb = 40 C  
Tamb = 25 C  
Tamb = 85 C Unit  
Min  
3.5  
7.0  
11.0  
-
Max  
Min  
3.5  
7.0  
11.0  
-
Max  
Min  
3.5  
7.0  
11.0  
-
Max  
VIH  
HIGH-level input voltage  
LOW-level input voltage  
IO< 1 A  
5 V  
-
-
-
V
V
V
V
V
V
V
V
V
10 V  
15 V  
5 V  
-
-
-
-
-
-
VIL  
IO< 1 A  
1.5  
3.0  
4.0  
-
1.5  
3.0  
4.0  
-
1.5  
3.0  
4.0  
-
10 V  
15 V  
5 V  
-
-
-
-
-
-
VOH  
HIGH-level output voltage IO< 1 A  
4.95  
9.95  
14.95  
4.95  
9.95  
14.95  
4.95  
9.95  
14.95  
10 V  
15 V  
-
-
-
-
-
-
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
4 of 13  
 
 
 
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
Table 5.  
Static characteristics …continued  
VSS = 0 V; VI = VSS or VDD; unless otherwise specified.  
Symbol Parameter  
Conditions  
VDD  
Tamb = 40 C  
Tamb = 25 C  
Tamb = 85 C Unit  
Min  
Max  
0.05  
0.05  
0.05  
1.7  
0.52  
1.3  
3.6  
-
Min  
Max  
0.05  
0.05  
0.05  
1.4  
0.44  
1.1  
3.0  
-
Min  
Max  
0.05  
0.05  
0.05  
VOL  
LOW-level output voltage IO< 1 A  
5 V  
-
-
-
V
V
V
10 V  
15 V  
5 V  
-
-
-
-
-
-
IOH  
HIGH-level output current VO = 2.5 V  
VO = 4.6 V  
-
-
-
1.1 mA  
0.36 mA  
0.9 mA  
2.4 mA  
5 V  
-
-
-
VO = 9.5 V  
10 V  
15 V  
5 V  
-
-
-
VO = 13.5 V  
-
-
-
IOL  
LOW-level output current VO = 0.4 V  
VO = 0.5 V  
0.52  
0.44  
0.36  
-
-
-
mA  
mA  
mA  
10 V  
15 V  
15 V  
5 V  
1.3  
-
1.1  
-
0.9  
VO = 1.5 V  
3.6  
-
3.0  
-
2.4  
ILI  
input leakage current  
-
-
-
-
-
0.3  
20  
-
-
-
-
-
0.3  
20  
-
-
-
-
-
1.0 A  
150 A  
300 A  
600 A  
IDD  
supply current  
IO = 0 A  
10 V  
15 V  
-
40  
40  
80  
80  
CI  
input capacitance  
-
7.5  
-
pF  
10. Dynamic characteristics  
Table 6.  
Dynamic characteristics  
VSS = 0 V; Tamb = 25 C; unless otherwise specified; for test circuit see Figure 6.  
Symbol Parameter  
Conditions  
VDD  
5 V  
Extrapolation formula[1]  
78 ns + (0.55 ns/pF)CL  
34 ns + (0.23 ns/pF)CL  
27 ns + (0.16 ns/pF)CL  
(0.55 ns/pF)CL  
Min  
Typ  
105  
45  
35  
35  
15  
10  
90  
40  
30  
85  
40  
30  
35  
15  
10  
60  
30  
20  
Max Unit  
tPHL  
HIGH to LOW  
CP Q0  
see Figure 5  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
210 ns  
propagation delay  
10 V  
15 V  
5 V  
90  
70  
70  
30  
20  
ns  
ns  
ns  
ns  
ns  
[2]  
[2]  
[2]  
Qn Qn + 1  
10 V  
15 V  
5 V  
(0.23 ns/pF)CL  
(0.16 ns/pF)CL  
MR Qn  
see Figure 5  
63 ns + (0.55 ns/pF)CL  
29 ns + (0.23 ns/pF)CL  
22 ns + (0.16 ns/pF)CL  
58 ns + (0.55 ns/pF)CL  
29 ns + (0.23 ns/pF)CL  
22 ns + (0.16 ns/pF)CL  
(0.55 ns/pF)CL  
180 ns  
10 V  
15 V  
5 V  
80  
60  
ns  
ns  
tPLH  
LOW to HIGH  
CP Q0  
see Figure 5  
170 ns  
propagation delay  
10 V  
15 V  
5 V  
80  
60  
70  
30  
20  
ns  
ns  
ns  
ns  
ns  
[2]  
[2]  
[2]  
[3]  
Qn Qn + 1  
10 V  
15 V  
5 V  
(0.23 ns/pF)CL  
(0.16 ns/pF)CL  
tt  
transition time  
see Figure 5  
10 ns + (1.00 ns/pF)CL  
9 ns + (0.42 ns/pF)CL  
6 ns + (0.28 ns/pF)CL  
120 ns  
10 V  
15 V  
60  
40  
ns  
ns  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
5 of 13  
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
Table 6.  
Dynamic characteristics …continued  
VSS = 0 V; Tamb = 25 C; unless otherwise specified; for test circuit see Figure 6.  
Symbol Parameter  
Conditions  
VDD  
5 V  
Extrapolation formula[1]  
Min  
50  
30  
20  
40  
30  
20  
40  
30  
20  
10  
15  
25  
Typ  
25  
15  
10  
20  
15  
10  
20  
15  
10  
20  
30  
50  
Max Unit  
tW  
pulse width  
CP input HIGH;  
minimum width;  
see Figure 5  
-
-
-
-
-
-
-
-
-
-
-
-
ns  
10 V  
15 V  
5 V  
ns  
ns  
MR input HIGH;  
minimum width;  
see Figure 5  
ns  
10 V  
15 V  
5 V  
ns  
ns  
trec  
recovery time  
MR input;  
see Figure 5  
ns  
10 V  
15 V  
5 V  
ns  
ns  
fmax  
maximum  
frequency  
CP input;  
see Figure 5  
MHz  
MHz  
MHz  
10 V  
15 V  
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).  
[2] For loads other than 50 pF at the nth output, use the slope given.  
[3] tt is the same as tTHL and tTLH  
.
Table 7.  
Dynamic power dissipation PD  
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.  
Symbol  
Parameter  
VDD  
5 V  
Typical formula for PD (W)  
PD = 400 fi + (fo CL) VDD  
where:  
2
PD  
dynamic power  
dissipation  
fi = input frequency in MHz,  
fo = output frequency in MHz,  
CL = output load capacitance in pF,  
VDD = supply voltage in V,  
(fo CL) = sum of the outputs.  
2
2
10 V  
15 V  
PD = 2000 fi + (fo CL) VDD  
PD = 5200 fi + (fo CL) VDD  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
6 of 13  
HEF4040B  
Nexperia  
12-stage binary ripple counter  
11. Waveforms  
9
,
9
05ꢃLQSXW  
&3ꢃLQSXW  
0
9
66  
W
ꢀꢍI  
PD[  
:
W
UHF  
9
,
9
0
9
66  
W
:
W
W
W
3+/  
3+/  
2+  
3/+  
9
4ꢅꢃRUꢃ4Qꢃ  
RXWSXW  
9
0
9
2/  
W
W
7+/  
7/+  
W
W
3+/  
3/+  
9
2+  
9
4QꢃꢌꢃꢀꢃRXWSXW  
0
9
2/  
ꢀꢀꢁDDMꢆꢅꢈ  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Transition times: transition time (tt) = HIGH LOW (tTHL) or LOW HIGH (tTLH) transition times.  
Measurement points are given in Table 8, test circuit in Figure 6 and test data in Table 9  
Fig 5.  
Waveforms showing propagation delays for MR to Qn and CP to Q0, minimum MR and CP pulse widths  
Table 8.  
Measurement points  
Supply voltage  
VDD  
Input  
Output  
VM  
VI  
VM  
5 V to 15 V  
VDD or VSS  
0.5VDD  
0.5VDD  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
7 of 13  
 
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
W
:
9
,
ꢄꢅꢃꢎ  
ꢄꢅꢃꢎ  
QHJDWLYHꢃ  
SXOVH  
9
9
9
0
0
0
ꢀꢅꢃꢎ  
ꢀꢅꢃꢎ  
ꢅꢃ9  
W
W
U
I
W
W
I
U
9
,
ꢄꢅꢃꢎ  
ꢄꢅꢃꢎ  
SRVLWLYHꢃ  
SXOVH  
9
0
ꢀꢅꢃꢎ  
ꢀꢅꢃꢎ  
ꢅꢃ9  
W
:
ꢀꢀꢁDDMꢆꢃꢁ  
a. Input waveforms  
9
''  
9
9
2
,
*
'87  
&
/
5
7
ꢀꢀꢁDDJꢁꢃꢉ  
b. Test circuit  
Test data is given in Table 9.  
Definitions test circuit:  
DUT = Device Under Test;  
CL = load capacitance, including the jig and probe capacitance;  
RL = load resistance, which should be equal to the output impedance of the pulse generator.  
Fig 6. Test circuit for measuring switching times  
Table 9.  
Test data  
Supply voltage  
VDD  
Input  
Load  
CL  
VI  
tr, tf  
5 V to 15 V  
VSS or VDD  
20 ns  
50 pF  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
8 of 13  
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
12. Package outline  
62ꢄꢉꢊꢂSODVWLFꢂVPDOOꢂRXWOLQHꢂSDFNDJHꢋꢂꢄꢉꢂOHDGVꢋꢂERG\ꢂZLGWKꢂꢆꢃꢌꢂPPꢂ  
627ꢄꢁꢌꢍꢄꢂ  
'ꢃ  
(ꢃ  
$ꢃ  
;ꢃ  
Fꢃ  
\ꢃ  
+ꢃ  
(ꢃ  
Yꢃ 0ꢃ  
$ꢃ  
=ꢃ  
ꢀꢇꢃ  
ꢄꢃ  
4ꢃ  
$ꢃ  
ꢁꢃ  
$ꢃ  
ꢏ$ꢃꢃꢐꢃ  
ꢉꢃ  
$ꢃ  
ꢀꢃ  
SLQꢃꢀꢃLQGH[ꢃ  
șꢃ  
/ꢃ  
Sꢃ  
/ꢃ  
ꢀꢃ  
ꢋꢃ  
Hꢃ  
Zꢃ 0ꢃ  
GHWDLOꢃ;ꢃ  
Eꢃ  
Sꢃ  
ꢅꢃ  
ꢁꢑꢈꢃ  
VFDOHꢃ  
ꢈꢃPPꢃ  
',0(16,216ꢂꢇLQFKꢂGLPHQVLRQVꢂDUHꢂGHULYHGꢂIURPꢂWKHꢂRULJLQDOꢂPPꢂGLPHQVLRQVꢈꢂ  
$ꢂ  
ꢇꢄꢈꢂ  
ꢇꢄꢈꢂ  
ꢇꢄꢈꢂ  
81,7ꢂ  
PPꢃ  
$ꢂ  
$ꢂ  
$ꢂ  
Eꢂ  
Fꢂ  
'ꢂ  
(ꢂ  
Hꢂ  
+ꢂ  
/ꢂ  
/ꢂ  
Sꢂ  
4ꢂ  
Yꢂ  
Zꢂ  
\ꢂ  
ꢅꢑꢀꢃ  
=ꢂ  
șꢃ  
ꢄꢂ  
ꢅꢂ  
ꢆꢂ  
Sꢂ  
(ꢂ  
PD[ꢃꢂ  
ꢅꢑꢁꢈꢃ ꢀꢑꢊꢈꢃ  
ꢅꢑꢀꢅꢃ ꢀꢑꢁꢈꢃ  
ꢅꢑꢊꢄꢃ ꢅꢑꢁꢈꢃ ꢀꢅꢑꢅꢃ  
ꢅꢑꢉꢇꢃ ꢅꢑꢀꢄꢃ ꢄꢑꢋꢃ  
ꢊꢑꢅꢃ  
ꢉꢑꢋꢃ  
ꢇꢑꢁꢃ  
ꢈꢑꢋꢃ  
ꢀꢑꢅꢃ  
ꢅꢑꢊꢃ  
ꢅꢑꢆꢃ  
ꢅꢑꢇꢃ  
ꢅꢑꢆꢃ  
ꢅꢑꢉꢃ  
ꢀꢑꢁꢆꢃ  
ꢅꢑꢅꢈꢃ  
ꢀꢑꢅꢈꢃ  
ꢀꢑꢆꢈꢃ  
ꢅꢑꢈꢃ ꢅꢑꢁꢈꢃ  
ꢅꢑꢁꢈꢃ  
ꢅꢑꢅꢀꢃ  
Rꢃ  
ꢋꢃ  
Rꢃ  
ꢅꢃ  
ꢅꢑꢅꢀꢅꢅꢃ  
ꢅꢑꢅꢅꢆꢈꢃ  
ꢅꢑꢅꢀꢅꢃ ꢅꢑꢅꢈꢆꢃ  
ꢅꢑꢅꢅꢊꢃ ꢅꢑꢅꢊꢄꢃ  
ꢅꢑꢅꢀꢄꢃ  
ꢅꢑꢅꢀꢊꢃ  
ꢅꢑꢉꢄꢃ ꢅꢑꢀꢇꢃ  
ꢅꢑꢉꢋꢃ ꢅꢑꢀꢈꢃ  
ꢅꢑꢁꢊꢊꢃ  
ꢅꢑꢁꢁꢋꢃ  
ꢅꢑꢅꢉꢄꢃ ꢅꢑꢅꢁꢋꢃ  
ꢅꢑꢅꢀꢇꢃ ꢅꢑꢅꢁꢅꢃ  
ꢅꢑꢅꢁꢋꢃ  
ꢅꢑꢅꢀꢁꢃ  
LQFKHVꢃ  
ꢅꢑꢅꢊꢀꢃ  
ꢅꢑꢅꢇꢄꢃ  
ꢅꢑꢅꢀꢃ ꢅꢑꢅꢀꢃ ꢅꢑꢅꢅꢊꢃ  
1RWHꢂ  
ꢀꢑꢃ3ODVWLFꢃRUꢃPHWDOꢃSURWUXVLRQVꢃRIꢃꢅꢑꢀꢈꢃPPꢃꢏꢅꢑꢅꢅꢇꢃLQFKꢐꢃPD[LPXPꢃSHUꢃVLGHꢃDUHꢃQRWꢃLQFOXGHGꢑꢃꢃ  
ꢂ5()(5(1&(6ꢂ  
ꢂ-('(&ꢂ ꢂ-(,7$ꢂ  
ꢃ06ꢂꢅꢀꢁꢃ  
287/,1(ꢂ  
9(56,21ꢂ  
(8523($1ꢂ  
352-(&7,21ꢂ  
,668(ꢂ'$7(ꢂ  
ꢂ,(&ꢂ  
ꢄꢄꢂꢀꢁꢂꢁꢆꢃ  
ꢅꢉꢂꢅꢁꢂꢀꢄꢃ  
ꢃ627ꢀꢅꢄꢂꢀꢃ  
ꢃꢅꢆꢇ(ꢅꢆꢃ  
Fig 7. Package outline SOT109-1 (SO16)  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
9 of 13  
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
13. Revision history  
Table 10. Revision history  
Document ID  
HEF4040B v.9  
Modifications:  
HEF4040B v.8  
Modifications:  
Release date  
20160323  
Data sheet status  
Change notice  
Supersedes  
Product data sheet  
-
HEF4040B v.8  
Type number HEF4040BP (SOT38-4) removed.  
20111117 Product data sheet  
Legal pages updated.  
Changes in “General description” and “Features and benefits”.  
-
HEF4040B v.7  
HEF4040B v.7  
20111010  
20091125  
20090709  
20090304  
19950101  
19950101  
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
Product specification  
Product specification  
-
-
-
-
-
-
HEF4040B v.6  
HEF4040B v.5  
HEF4040B v.4  
HEF4040B_CNV v.3  
HEF4040B_CNV v.2  
-
HEF4040B v.6  
HEF4040B v.5  
HEF4040B v.4  
HEF4040B_CNV v.3  
HEF4040B_CNV v.2  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
10 of 13  
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
14. Legal information  
14.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nexperia.com.  
Suitability for use — Nexperia products are not designed,  
14.2 Definitions  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of a Nexperia product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. Nexperia and its suppliers accept no liability for  
inclusion and/or use of Nexperia products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. Nexperia does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local Nexperia sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. Nexperia makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using Nexperia products, and Nexperia  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the Nexperia  
product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
Nexperia and its customer, unless Nexperia and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the Nexperia product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
Nexperia does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using Nexperia  
products in order to avoid a default of the applications and  
14.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, Nexperia does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. Nexperia takes no  
responsibility for the content in this document if provided by an information  
source outside of Nexperia.  
the products or of the application or use by customer’s third party  
customer(s). Nexperia does not accept any liability in this respect.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall Nexperia be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — Nexperia  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. Nexperia hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of Nexperia products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, Nexperia’s aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of Nexperia.  
Right to make changes — Nexperia reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
11 of 13  
 
 
 
 
 
 
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Nexperia’s specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies Nexperia for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond Nexperia’s  
standard warranty and Nexperia’s product specifications.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific Nexperia product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. Nexperia  
accepts no liability for inclusion and/or use of  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
non-automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without Nexperia’s warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
14.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
15. Contact information  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
HEF4040B  
All information provided in this document is subject to legal disclaimers.  
©
Nexperia B.V. 2017. All rights reserved  
Product data sheet  
Rev. 9 — 23 March 2016  
12 of 13  
 
 
HEF4040B  
Nexperia  
12-stage binary ripple counter  
16. Contents  
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 1  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
7
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 4  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10  
8
9
10  
11  
12  
13  
14  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
14.1  
14.2  
14.3  
14.4  
15  
16  
Contact information. . . . . . . . . . . . . . . . . . . . . 12  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
© Nexperia B.V. 2017. All rights reserved  
For more information, please visit: http://www.nexperia.com  
For sales office addresses, please send an email to: salesaddresses@nexperia.com  
Date of release: 23 March 2016  
 

相关型号:

HEC4042BD

IC 4000/14000/40000 SERIES, HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, CDIP16, CERAMIC, DIP-16, FF/Latch
NXP

HEC4042BDB

IC 4000/14000/40000 SERIES, HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, CDIP16, CERAMIC, DIP-16, FF/Latch
NXP

HEC4047BD

IC 4000/14000/40000 SERIES, MONOSTABLE MULTIVIBRATOR, CDIP14, Prescaler/Multivibrator
NXP

HEC4047BDB

IC 4000/14000/40000 SERIES, MONOSTABLE MULTIVIBRATOR, CDIP14, Prescaler/Multivibrator
NXP

HEC4049

buffers HEX inverting buffers
NXP

HEC4049B

buffers HEX inverting buffers
NXP

HEC4049BD

IC 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP16, Gate
NXP

HEC4049BDB

IC 4000/14000/40000 SERIES, HEX 1-INPUT INVERT GATE, CDIP16, Gate
NXP

HEC4050BDB

4000/14000/40000 SERIES, HEX 1-INPUT NON-INVERT GATE, CDIP16
NXP

HEC4051B

8-channel analogue multiplexer/demultiplexer
NXP

HEC4051BD

IC 8-CHANNEL, SGL ENDED MULTIPLEXER, CDIP16, CERDIP-16, Multiplexer or Switch
NXP

HEC4051BDB

IC 8-CHANNEL, SGL ENDED MULTIPLEXER, CDIP16, Multiplexer or Switch
NXP