MB2652 [NXP]

Dual octal transceiver/registers, non-inverting 3-State; 双八进制收发器/寄存器,非反相三态
MB2652
型号: MB2652
厂家: NXP    NXP
描述:

Dual octal transceiver/registers, non-inverting 3-State
双八进制收发器/寄存器,非反相三态

文件: 总15页 (文件大小:166K)
中文:  中文翻译
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Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
power dissipation with high speed and high  
output drive.  
FEATURES  
Latch-up protection exceeds 500mA per  
Jedec JC40.2 Std 17  
Independent registers for A and B buses  
The MB2652 transceiver/register consists of  
two sets of bus transceiver circuits with  
3-State outputs, D-type flip-flops, and control  
circuitry arranged for multiplexed  
transmission of data directly from the input  
bus or the internal registers. Data on the A or  
B bus will be clocked into the registers as the  
appropriate clock pin goes High. Output  
Enable (nOEAB, (nOEBA) and Select (nSAB,  
nSBA) pins are provided for bus  
ESD protection exceeds 2000V per MIL  
STD 883 Method 3015 and 200V per  
Machine Model  
Multiple V  
and GND pins minimize  
switching noise  
CC  
Live insertion/extraction permitted  
Power-up 3-State  
Power-up reset  
DESCRIPTION  
Multiplexed real-time and stored data  
Output capability: +64mA/–32mA  
The MB2652 high-performance BiCMOS  
device combines low static and dynamic  
management.  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
PLH  
PHL  
Propagation delay nAx to nBx  
C = 50pF; V = 5V  
3.3  
ns  
L
CC  
C
Input capacitance  
I/O capacitance  
V = 0V or V  
CC  
4
7
pF  
pF  
µA  
IN  
I
C
V = 0V or V ; 3-State  
O CC  
I/O  
I
Total supply current  
Outputs disabled; V = 5.5V  
120  
CCZ  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE  
ORDER CODE  
DRAWING NUMBER  
52-pin plastic Quad Flat Pack (QFP)  
–40°C to +85°C  
MB2652BB  
1418B  
PIN CONFIGURATION  
LOGIC SYMBOL  
50 51  
1
2
3
5
6
7
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7  
1CPAB  
52 51 50 49 48 47 46 45 44 43 42 41 40  
48  
49  
44  
45  
1SAB  
1SBA  
1CPBA  
1OEAB  
1OEBA  
47  
46  
1A2  
1A3  
1A4  
GND  
1A5  
1A6  
1A7  
2A0  
2A1  
2A2  
2A3  
2A4  
2A5  
1
1B2  
1B3  
1B4  
1B5  
1B6  
1B7  
2B0  
2B1  
2B2  
GND  
2B3  
2B4  
2B5  
39  
38  
37  
36  
2
3
4
1B0 1B1 1B2 1B3 1B4 1B5 1B6 1B7  
5
6
7
8
35  
34  
33  
42 41 39 38 37 36 35 34  
MB2652  
52–pin PQFP  
8
9
10 11 12 13 15 16  
32  
9
10  
11  
12  
31  
30  
29  
28  
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7  
2CPAB  
19  
18  
23  
22  
2SAB  
2SBA  
2CPBA  
2OEAB  
2OEBA  
20  
21  
13  
27  
14 15 16 17 18 19 20 21 22 23 24 25 26  
2B0 2B1 2B2 2B3 2B4 2B5 2B6 2B7  
33 32 31 29 28 27 25 24  
1
August 23, 1993  
853-1713 10585  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
LOGIC SYMBOL (IEEE/IEC)  
46  
47  
45  
44  
48  
49  
21  
20  
22  
23  
19  
18  
EN1(BA)  
EN2(AB)  
C4  
EN1(BA)  
EN2(AB)  
C4  
G5  
G5  
C6  
C6  
G7  
G7  
42  
33  
1  
5
4D  
1  
5
4D  
50  
8
1
5 1  
1
5 1  
6D  
7
1  
6D  
7
1  
1 7  
2
1 7  
2
41  
39  
38  
37  
36  
35  
34  
32  
31  
29  
28  
27  
25  
24  
51  
1
9
10  
11  
12  
13  
15  
16  
2
3
5
6
7
2
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
LOGIC DIAGRAM  
nOEBA  
nOEAB  
nCPBA  
nSBA  
nCPAB  
nSAB  
1of 8 Channels  
1D  
C1  
Q
nA0  
nB0  
1D  
C1  
Q
nA1  
nA2  
nA3  
nA4  
nA5  
nA6  
nA7  
nB1  
nB2  
nB3  
nB4  
nB5  
nB6  
nB7  
DETAIL A X 7  
FUNCTION TABLE  
INPUTS  
nCPAB  
DATA I/O  
OPERATING MODE  
nOEAB  
nOEBA  
nCPBA nSAB nSBA  
nAx  
nBx  
L
L
H
H
H or L  
H or L  
X
X
X
X
Isolation  
Store A and B data  
Input  
Input  
X
H
H
H
H or L  
X
**  
X
X
Unspecified  
output*  
Store A, Hold B  
Store A in both registers  
Input  
L
L
X
L
H or L  
X
X
X
**  
Unspecified  
output*  
Hold A, Store B  
Store B in both registers  
Input  
Input  
L
L
L
L
X
X
X
X
X
L
H
Real time B data to A bus  
Stored B data to A bus  
Output  
Input  
H or L  
H
H
H
H
X
X
X
L
H
X
X
Real time A data to B bus  
Store A data to B bus  
Output  
Output  
H or L  
Stored A data to B bus  
Stored B data to A bus  
H
L
H or L  
H or L  
H
H
Output  
H = High voltage level  
L
X
*
=
=
=
Low voltage level  
Don’t care  
Low-to-High clock transition  
The data output function may be enabled or disabled by various signals at the nOEBA and nOEAB inputs. Data input functions are  
always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.  
If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must  
be staggered in order to load both registers.  
**  
3
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
The following examples demonstrate the four  
fundamental bus-management functions that  
can be performed with the MB2652.The  
select pins determine whether data is stored  
or transferred through the device in real  
time.The output enable pins determine the  
direction of the data flow.  
REAL TIME BUS TRANSFER  
BUS B TO BUS A  
REAL TIME BUS TRANSFER  
BUS A TO BUS B  
STORAGE FROM  
A, B, OR A AND B  
A
B
A
B
A
B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA  
nOEAB nOEBA nCPAB nCPBA nSAB nSBA  
nOEAB nOEBA nCPAB nCPBA nSAB nSBA  
L
L
X
X
X
L
H
H
X
X
L
X
X
L
L
H
X
H
X
X
X
X
X
X
X
X
TRANSFER STORED DATA  
TO A OR B  
A
B
nOEAB nOEBA nCPAB nCPBA nSAB nSBA  
H | L H | L  
H
L
H
H
4
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
–0.5 to +7.0  
–18  
UNIT  
V
V
CC  
I
IK  
DC input diode current  
V < 0  
I
mA  
V
3
V
I
DC input voltage  
–1.2 to +7.0  
–50  
I
DC output diode current  
V
O
< 0  
mA  
V
OK  
3
V
DC output voltage  
output in Off or High state  
output in Low state  
–0.5 to +5.5  
128  
OUT  
OUT  
I
DC output current  
mA  
°C  
T
stg  
Storage temperature range  
–65 to 150  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
PARAMETER  
LIMITS  
UNIT  
MIN  
4.5  
0
MAX  
V
DC supply voltage  
5.5  
V
V
CC  
V
Input voltage  
V
CC  
I
V
High-level input voltage  
Low-level Input voltage  
High-level output current  
Low-level output current  
Input transition rise or fall rate  
2.0  
V
IH  
V
0.8  
–32  
64  
V
IL  
I
mA  
mA  
ns/V  
°C  
OH  
I
OL  
t/v  
0
10  
T
amb  
Operating free-air temperature range  
–40  
+85  
5
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
DC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
= –40°C  
to +85°C  
amb  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
T
amb  
= +25°C  
UNIT  
MIN  
TYP  
MAX  
MIN  
MAX  
V
Input clamp voltage  
V
V
V
V
V
= 4.5V; I = –18mA  
–0.9  
2.9  
–1.2  
–1.2  
V
V
V
V
V
IK  
CC  
CC  
CC  
CC  
CC  
IK  
= 4.5V; I = –3mA; V = V or V  
2.5  
3.0  
2.0  
2.5  
3.0  
2.0  
OH  
I
IL  
IH  
V
OH  
High–level output voltage  
= 5.0V; I = –3mA; V = V or V  
4.0  
OH  
I
IL  
IH  
= 4.5V; I = –32mA; V = V or V  
2.4  
OH  
I
IL  
IH  
V
OL  
Low–level output voltage  
Power-up output low  
= 4.5V; I = 64mA; V = V or V  
IH  
0.42  
0.55  
0.55  
0.55  
0.55  
OL  
I
IL  
V
RST  
V
CC  
= 5.5V; I = 1mA; V = GND or V  
0.13  
V
OL  
I
CC  
3
voltage  
I
I
Input leakage Control pins  
V
V
= 5.5V; V = GND or 5.5V  
±0.01  
±5  
±1.0  
±1.0  
µA  
µA  
CC  
I
current  
Data pins  
= 5.5V; V = GND or 5.5V  
±100  
±100  
CC  
I
I
Power-off leakage current  
Power-up/down 3-State  
V
= 0V; V or V 4.5V  
±5.0  
±5.0  
±100  
±50  
±100  
±50  
µA  
µA  
OFF  
CC  
O
I
V
CC  
V
OE  
= 2.0V; V = 0.5V; V = GND or V  
;
O
I
CC  
I
PU/PD  
4
output current  
= V = Don’t care  
OE  
I
+ I  
+ I  
3–State output High current  
3–State output Low current  
Output High leakage current  
V
V
V
V
V
V
V
= 5.5V; V = 2.7V; V = V or V  
5.0  
–5.0  
5.0  
50  
–50  
50  
50  
–50  
50  
µA  
µA  
µA  
mA  
µA  
mA  
IH  
OZH  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
O
I
IL  
IH  
I
= 5.5V; V = 0.5V; V = V or V  
O I IL  
IL  
OZL  
IH  
I
= 5.5V; V = 5.5V; V = GND or V  
O I cc  
CEX  
1
I
O
Output current  
= 5.5V; V = 2.5V  
–50  
–80  
120  
38  
–180  
250  
60  
–50  
–180  
250  
60  
O
I
= 5.5V; Outputs High, V = GND or V  
CCH  
I
CC  
I
Quiescent supply current  
= 5.5V; Outputs Low, V = GND or V  
CCL  
I
CC  
= 5.5V; Outputs 3–State;  
I
120  
0.5  
250  
1.5  
250  
1.5  
µA  
CCZ  
V = GND or V  
I
CC  
Additional supply current per  
V
CC  
= 5.5V; one input at 3.4V,  
I  
CC  
mA  
2
input pin  
other inputs at V or GND  
CC  
NOTES:  
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
2. This is the increase in supply current for each input at 3.4V.  
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.  
4. This parameter is valid for any V between 0V and 2.1V with a transition time of up to 10msec. From V = 2.1V to V = 5V ± 10% a  
CC  
CC  
CC  
transition time of up to 100µsec is permitted.  
6
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
AC CHARACTERISTICS  
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω  
R
F
L
L
LIMITS  
MAX  
T
= -40 to  
+85 C  
= +5.0V ±0.5V  
amb  
o
T
V
= +25 C  
amb  
CC  
o
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V  
V
CC  
MIN  
TYP  
MIN  
MAX  
f
Maximum clock frequency  
1
1
130  
190  
130  
MHz  
ns  
MAX  
t
t
Propagation delay  
nCPAB to nBx or nCPBA to nAx  
2.1  
2.7  
3.9  
4.4  
5.3  
5.7  
2.1  
2.7  
5.8  
6.3  
PLH  
PHL  
t
t
Propagation delay  
nAx to nBx or nBx to nAx  
1.4  
1.4  
3.2  
3.3  
4.3  
4.7  
1.4  
1.4  
4.8  
5.3  
PLH  
PHL  
2
3
ns  
ns  
ns  
ns  
ns  
ns  
t
t
Propagation delay  
nSAB to nBx or nSBA to nAx  
1.3  
2.1  
3.6  
3.8  
5.0  
5.3  
1.3  
2.1  
5.6  
5.8  
PLH  
PHL  
t
Output enable time  
nOEBA to nAx  
5
6
1.0  
1.8  
2.9  
3.6  
4.1  
4.8  
1.0  
1.8  
4.8  
5.5  
PZH  
t
PZL  
t
Output disable time  
nOEBA to nAx  
5
6
1.0  
1.6  
3.8  
3.2  
5.0  
4.5  
1.0  
1.6  
5.5  
5.1  
PHZ  
t
PLZ  
t
Output enable time  
nOEAB to nBx  
5
6
1.2  
2.7  
3.7  
4.5  
5.0  
5.8  
1.2  
2.7  
5.6  
6.3  
PZH  
t
PZL  
t
Output disable time  
nOEAB to nBx  
5
6
1.0  
1.2  
3.4  
3.1  
4.7  
4.2  
1.0  
1.2  
5.3  
4.9  
PHZ  
t
PLZ  
AC SETUP REQUIREMENTS  
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω  
R
F
L
L
LIMITS  
o
o
T
V
= +25 C  
T
V
= -40 to +85 C  
amb  
CC  
amb  
CC  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V  
= +5.0V ±0.5V  
MIN  
TYP  
MIN  
t (H)  
t (L)  
s
Setup time  
nAx to nCPBA, nBx to nCPAB  
2.0  
1.5  
0.8  
-0.1  
2.0  
1.5  
s
4
4
1
ns  
ns  
ns  
t (H)  
Hold time  
nAx to nCPBA, nBx to nCPAB  
1.5  
1.0  
0.1  
-0.7  
1.5  
1.0  
h
t (L)  
h
t (H)  
Pulse width, High or Low  
nCPAB or nCPBA  
4.5  
3.0  
2.5  
2.0  
4.5  
3.0  
w
t (L)  
w
7
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
AC WAVEFORMS  
V
M
= 1.5V, V = GND to 3.0V  
IN  
1/f  
MAX  
nAx or nBx  
nBx or nAx  
V
V
M
M
t
nCPBA or  
nCPAB  
V
V
V
t
M
M
M
t
PLH  
PHL  
t
(H)  
t (L)  
w
w
t
PHL  
PLH  
V
V
M
M
nAx or nBx  
V
V
M
M
Waveform 2. Propagation Delay, nAx to  
nBx or nBx to nAx  
Waveform 1. Propagation Delay, Clock Input to Output,  
Clock Pulse Width, and Maximum Clock Frequency  
nSBA or  
nSAB  
nAx or nBx  
V
V
V
V
M
M
M
M
V
V
M
M
t (H)  
t (L)  
s
t
(H)  
t (L)  
h
s
t
t
h
PHL  
PLH  
nAx or nBx  
nCPBA or  
nCPAB  
V
V
M
M
V
V
M
M
t
(L)  
w
Waveform 3. Propagation Delay, SBA to  
nAx or SAB to nBx  
Waveform 4. Data Setup and Hold Times  
nOEBA  
nOEAB  
nOEBA  
V
V
V
V
M
M
t
M
M
t
nOEAB  
t
t
PLZ  
PZH  
PHZ  
PZL  
V
–0.3V  
0V  
OH  
nAx or nBx  
V
V
M
M
nAx or nBx  
V
+0.3V  
0V  
OL  
Waveform 5. 3-State Output Enable Time to High Level  
and Output Disable Time from High Level  
Waveform 6. 3-State Output Enable Time to Low Level  
and Output Disable Time from Low Level  
NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance.  
PIN DESCRIPTION  
PIN NUMBER  
SYMBOL  
NAME AND FUNCTION  
Clock input A to B / Clock input B to A  
Select input A to B / Select input B to A  
48, 45, 19, 22  
49, 44, 18, 23  
1CPAB, 1CPBA, 2CPAB, 2CPBA  
1SAB, 1SBA, 2SAB, 2SBA  
50, 51, 1, 2, 3, 5, 6, 7, 8, 9,  
10, 11, 12, 13, 15, 16  
1A0 – 1A7,  
2A0 – 2A7  
Data inputs/outputs (A side)  
Data inputs/outputs (B side)  
Output enable inputs  
42, 41, 39, 38, 37, 36, 35, 34,  
33, 32, 31, 29, 28, 27, 25, 24  
1B0 – 1B7,  
2B0 – 2B7  
1OEAB, 1OEBA,  
2OEAB, 2OEBA  
47, 46, 20, 21  
4, 17, 30, 43  
14, 26, 40, 52  
GND  
Ground (0V)  
V
CC  
Positive supply voltage  
8
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
TEST CIRCUIT AND WAVEFORMS  
V
t
W
AMP (V)  
90%  
CC  
90%  
7.0V  
NEGATIVE  
PULSE  
V
V
M
M
10%  
10%  
90%  
R
R
L
L
0V  
V
V
OUT  
IN  
PULSE  
GENERATOR  
D.U.T  
t
t
(t  
(t  
)
t
t
(t )  
R
THL  
F
TLH  
)
(t )  
F
R
C
TLH  
R
THL  
T
L
AMP (V)  
90%  
M
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
t
W
0V  
SWITCH POSITION  
V
= 1.5V  
M
TEST  
SWITCH  
closed  
closed  
open  
Input Pulse Definition  
t
t
PLZ  
PZL  
All other  
INPUT PULSE REQUIREMENTS  
DEFINITIONS  
R = Load resistor; see AC CHARACTERISTICS for value.  
L
FAMILY  
Amplitude  
Rep. Rate  
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;  
L
MB  
3.0V  
1MHz  
500ns 2.5ns 2.5ns  
see AC CHARACTERISTICS for value.  
R = Termination resistance should be equal to Z  
T
of  
OUT  
pulse generators.  
9
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
t
vs Temperature (T  
amb  
)
Adjustment of t for  
PLH  
PLH  
= 50pF, 1 Output Switching  
Load Capacitance and # of Outputs Switching  
C
L
nCPAB to nBx or nCPBA to nAx  
nCPAB to nBx or nCPBA to nAx  
7
6
5
4
3
2
1
5
4
MAX  
16 switching  
8 switching  
3
2
1 switching  
4.5V  
CC  
CC  
5.5V  
1
MIN  
0
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
o
C
t
vs Temperature (T  
= 50pF, 1 Output Switching  
)
Adjustment of t  
PHL  
for  
PHL  
amb  
C
Load Capacitance and # of Outputs Switching  
nCPAB to nBx or nCPBA to nAx  
L
nCPAB to nBx or nCPBA to nAx  
7
6
5
4
3
2
1
5
4
MAX  
16 switching  
8 switching  
3
4.5V  
CC  
CC  
1 switching  
2
5.5V  
1
MIN  
0
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
t
vs Temperature (T  
= 50pF, 1 Output Switching  
nAx to nBx or nBx to nAx  
)
Adjustment of t  
PLH  
for  
PLH  
amb  
C
Load Capacitance and # of Outputs Switching  
L
nAx to nBx or nBx to nAx  
6
5
4
3
2
1
0
5
4
3
MAX  
4.5V  
16 switching  
8 switching  
1 switching  
2
CC  
5.5V  
CC  
1
MIN  
0
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
10  
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
t
vs Temperature (T  
amb  
)
Adjustment of t for  
PHL  
PHL  
= 50pF, 1 Output Switching  
Load Capacitance and # of Outputs Switching  
nAx to nBx or nBx to nAx  
C
L
nAx to nBx or nBx to nAx  
6
5
4
3
2
1
0
5
MAX  
4
3
16 switching  
8 switching  
1 switching  
2
4.5V  
CC  
CC  
5.5V  
1
0
MIN  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
t
vs Temperature (T  
= 50pF, 1 Output Switching  
)
Adjustment of t for  
PLH  
PLH  
amb  
Load Capacitance and # of Outputs Switching  
C
L
nSAB to nBx or nSBA to nAx  
nSAB to nBx or nSBA to nAx  
7
6
5
4
3
2
1
0
4
3
2
1
0
16 switching  
8 switching  
MAX  
1 switching  
4.5V  
CC  
CC  
5.5V  
MIN  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
t
vs Temperature (T  
= 50pF, 1 Output Switching  
)
Adjustment of t for  
PHL  
PHL  
amb  
Load Capacitance and # of Outputs Switching  
C
L
nSAB to nBx or nSBA to nAx  
nSAB to nBx or nSBA to nAx  
7
6
5
4
3
2
1
5
4
3
16 switching  
8 switching  
MAX  
1 switching  
2
4.5V  
CC  
CC  
1
5.5V  
0
MIN  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
11  
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
t
vs Temperature (T  
amb  
= 50pF, 1 Output Switching  
nOEBA to nAx  
)
Adjustment of t for  
PZH  
PZH  
Load Capacitance and # of Outputs Switching  
C
L
nOEBA to nAx  
6
5
4
3
2
1
0
5
4
3
2
1
0
16 switching  
8 switching  
MAX  
1 switching  
4.5V  
CC  
CC  
5.5V  
MIN  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
t
vs Temperature (T  
= 50pF, 1 Output Switching  
nOEBA to nAx  
)
Adjustment of t for  
PZL  
PZL  
amb  
Load Capacitance and # of Outputs Switching  
C
L
nOEBA to nAx  
7
6
5
4
3
2
1
5
4
3
2
1
0
16 switching  
8 switching  
MAX  
1 switching  
4.5V  
CC  
CC  
5.5V  
MIN  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
t
vs Temperature (T  
)
Adjustment of t  
PHZ  
for  
PHZ  
amb  
Load Capacitance and # of Outputs Switching  
nOEBA to nAx  
C
= 50pF, 1 Output Switching  
nOEBA to nAx  
L
7
6
5
4
3
2
1
0
10  
16 switching  
8 switching  
1 switching  
8
6
MAX  
4
4.5V  
CC  
CC  
2
5.5V  
0
–2  
–4  
MIN  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
12  
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
t
vs Temperature (T  
amb  
= 50pF, 1 Output Switching  
nOEBA to nAx  
)
Adjustment of t for  
PLZ  
PLZ  
Load Capacitance and # of Outputs Switching  
C
L
nOEBA to nAx  
6
5
4
3
2
1
0
6
16 switching  
8 switching  
1 switching  
5
4
3
2
1
0
MAX  
4.5V  
CC  
CC  
5.5V  
MIN  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
t
vs Temperature (T  
= 50pF, 1 Output Switching  
nOEAB to nBx  
)
Adjustment of t for  
PZH  
PZH  
amb  
Load Capacitance and # of Outputs Switching  
C
L
nOEAB to nBx  
7
6
5
4
3
2
1
0
5
4
3
2
1
0
MAX  
16 switching  
8 switching  
4.5V  
1 switching  
CC  
CC  
5.5V  
MIN  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
t
vs Temperature (T  
)
Adjustment of t  
PZL  
for  
PZL  
amb  
Load Capacitance and # of Outputs Switching  
nOEAB to nBx  
C
= 50pF, 1 Output Switching  
nOEAB to nBx  
L
8
7
6
5
4
3
2
1
5
4
16 switching  
8 switching  
MAX  
3
1 switching  
2
4.5V  
CC  
CC  
5.5V  
1
0
MIN  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
13  
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
t
vs Temperature (T )  
amb  
= 50pF, 1 Output Switching  
nOEAB to nBx  
Adjustment of t  
PHZ  
for  
PHZ  
C
Load Capacitance and # of Outputs Switching  
nOEAB to nBx  
L
6
5
4
3
2
1
0
10  
16 switching,  
8 switching,  
1 switching,  
MAX  
4.5V  
8
6
CC  
4
5.5V  
CC  
2
0
MIN  
–2  
–4  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
t
vs Temperature (T  
= 50pF, 1 Output Switching  
nOEAB to nBx  
)
Adjustment of t for  
PLZ  
PLZ  
amb  
Load Capacitance and # of Outputs Switching  
C
L
nOEAB to nBx  
6
5
4
3
2
1
0
6
16 switching  
8 switching  
5
4
3
2
1
0
MAX  
1 switching  
4.5V  
CC  
CC  
5.5V  
MIN  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
t
vs Temperature (T  
= 50pF, 1 Output Switching  
)
Adjustment of t  
TLH  
for  
TLH  
amb  
Load Capacitance and # of Outputs Switching  
C
L
4
3
2
1
0
9
16 switching  
8 switching  
1 switching  
7
5
3
4.5V  
5.5V  
CC  
CC  
1
0
–1  
–3  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
pF  
150  
200  
°C  
14  
August 23, 1993  
Philips Semiconductors Products  
Product specification  
Dual octal transceiver/registers,  
non-inverting (3-State)  
MB2652  
t
vs Temperature (T )  
amb  
Adjustment of t  
THL  
for  
THL  
= 50pF, 1 Output Switching  
C
Load Capacitance and # of Outputs Switching  
L
4
3
2
1
0
5
4
3
2
1
0
16 switching  
8 switching  
1 switching  
4.5V  
5.5V  
CC  
CC  
–1  
–2  
–55 –35 –15  
5
25  
45  
65  
85  
105 125  
0
50  
100  
150  
200  
°C  
pF  
V
and V  
vs Load Capacitance  
V
and V  
vs Load Capacitance  
OHV  
OLP  
OHP  
OLV  
= 5V, V = 0 to 3V  
V
= 5V, V = 0 to 3V  
V
CC  
IN  
CC  
IN  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
6
5
4
125°C  
25°C  
–55°C  
125°C  
25°C  
–55°C  
3
2
1
0
125°C  
25°C  
–55°C  
125°C  
25°C  
–55°C  
–1  
–2  
–3  
0
50  
100  
150  
200  
0
50  
100  
150  
200  
pF  
pF  
15  
August 23, 1993  

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