N74F269D [PHILIPS]
Binary Counter, Synchronous, Bidirectional, TTL, PDSO24,;
| 型号： | N74F269D |
| 厂家： | 
PHILIPS SEMICONDUCTORS |
| 描述： | Binary Counter, Synchronous, Bidirectional, TTL, PDSO24, 光电二极管 输出元件 逻辑集成电路 触发器 |
| 文件： | 总14页 (文件大小：124K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F269
8-bit bidirectional binary counter
Product specification
IC15 Data Handbook
1996 Jan 05
Philips
Semiconductors
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
FEATURES
PIN CONFIGURATION
• Synchronous counting and loading
U/D
Q0
Q1
Q2
Q3
1
2
3
4
5
24 PE
• Built-in look-ahead carry capability
• Count frequency 115MHz typ
• Supply current 95mA typ
23 P0
22 P1
21 P2
20 P3
DESCRIPTION
Q4
GND
Q5
6
7
8
9
19 V
CC
The 74F269 is a fully synchronous 8-stage Up/Down Counter
featuring a preset capability for programmable operation, carry
look-ahead for easy cascading and a U/D input to control the
direction of counting. All state changes, whether in counting or
parallel loading, are initiated by the rising edge of the clock.
18 P4
17 P5
16 P6
15 P7
14 TC
13 CET
Q6
Q7 10
CP 11
TYPICAL
SUPPLY CURRENT
(TOTAL)
TYPE
TYPICAL f
CEP 12
MAX
SF00834
74F269
115MHz
95mA
ORDERING INFORMATION
COMMERCIAL RANGE
= 5V ±10%, T = 0°C to +70°C
DESCRIPTION
PKG DWG #
V
CC
amb
24-Pin Plastic Slim DIP (300mil)
24-Pin Plastic SOL
N74F269N
N74F269D
N74F269DB
SOT222-1
SOT137-1
SOT340-1
24-Pin Plastic SSOP type II
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
74F(U.L.)
LOAD VALUE
HIGH/LOW
PINS
P0 - P7
DESCRIPTION
HIGH/LOW
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
1.0/1.0
50/33
Parallel Data inputs
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
1.0mA/20mA
1.0mA/20mA
PE
Parallel Enable input (active Low)
Up/Down count control input
U/D
CEP
CET
CP
Count Enable Parallel input (active Low)
Count Enable Trickle input (active Low)
Clock input
TC
Terminal Count output (active Low)
Flip-flop outputs
Q0 - Q7
50/33
NOTE:
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
2
1996 Jan 05
853–0056 16186
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
CTR DIV 256
24
M1[LOAD]
M2[COUNT]
1
M3[UP]
M4[DOWN]
12
23 22 21 20 18 17 16 15
P0 P1 P2 P3 P4 P5 P6 P7
&
G5
13
EN6
11
2, 3, 5, 6 +/C7
2, 4, 5, 6–
24
1
PE
U/D
23
22
2
3
1, 7D [1]
[2]
12
13
CEP
CET
TC
14
21
20
4
5
[4]
[8]
11
CP
18
17
16
15
6
8
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
[16]
[32]
[64]
9
2
3
4
5
6
8
9
10
10
[128]
14
3, 5, 6 CT=256
4, 5, 8 CT=0
V
=Pin 19
CC
GND=Pin 7
SF00835
SF00836
APPLICATION
CP
U/D
PE
P0 P1 P2 P3 P4 P5 P6 P7
P0 P1 P2 P3 P4 P5 P6 P7
P0 P1 P2 P3 P4 P5 P6 P7
P0 P1 P2 P3 P4 P5 P6 P7
PE
PE
PE
PE
U/D
U/D
U/D
U/D
CP
CP
CP
CP
TC
TC
TC
TC
CEP
CEP
CEP
CEP
CET
CET
CET
CET
Q
0
Q1 Q2 Q3 Q4 Q5 Q6 Q7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Least significant 8-bit counter
Most significant 8-bit counter
SF00851
Figure 1. Synchronous Multistage Counting Scheme
OUTPUTS
MODE SELECT FUNCTION TABLE
INPUTS
OPERATING MODE
Parallel load
CP
↑
U/D
CEP
CET
PE
P
n
Q
TC
(a)
(a)
(a)
(a)
n
X
X
h
l
X
X
l
X
X
l
l
l
L
l
h
H
↑
h
h
X
X
X
X
Count Up
Count Down
Count Up
↑
l
l
Count Down
↑
X
X
h
l
h
h
q
n
(a)
H
↑
Hold (do nothing)
X
h
q
n
↑
H = High voltage level
h
L
l
= High voltage level one setup prior to the Low-to-High clock transition
= Low voltage level
= Low voltage level one setup time prior to the Low-to-High clock transition
q
= Lower case letters indicate the state of the referenced output prior to the Low-to-High clock transition
X = Don’t care
= Low-to-High clock transition
↑
(a)= TC is Low when CET is Low and the counter is at Terminal Count. Terminal Count Up is with all Q outputs High and Terminal Count
n
Down is with all Qn outputs Low.
3
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
LOGIC DIAGRAM
2
3
Q0
23
P0
P1
DETAIL A
DETAIL A
Q1
Q2
22
21
4
5
P2
P3
P4
DETAIL A
DETAIL A
DETAIL A
Q3
Q4
20
18
6
8
9
Q5
Q6
17
16
P5
P6
DETAIL A
DETAIL A
10
Q7
15
24
P7
PE
DETAIL A
11
1
CP
U/D
12
13
CEP
CET
14
TC
TOGGLE
DETAIL A
Pn
D
Q
Q
CP
PE
CP
V
=Pin 19
CC
GND=Pin 7
SF00837
4
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
Supply voltage
Input voltage
Input current
CC
IN
V
V
I
mA
V
IN
V
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature
–0.5 to V
40
OUT
OUT
CC
I
mA
°C
°C
T
amb
0 to +70
T
stg
–65 to +150
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
NOM
MAX
V
Supply voltage
5.0
5.5
V
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
2.0
0.8
–18
–1
V
I
I
I
mA
mA
mA
°C
IK
High-level output current
Low-level output current
OH
OL
20
T
amb
Operating free-air temperature range
0
70
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
NO TAG
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
TYP
MIN
MAX
NO TAG
V
V
V
V
V
V
V
V
V
= MIN, V = MAX
±10%V
2.5
2.7
CC
IL
CC
V
High-level output voltage
Low-level output voltage
V
V
OH
= MIN, I = MAX
±5%V
3.4
0.30
0.30
–0.73
IH
OH
CC
= MIN, V = MAX
±10%V
0.50
0.50
–1.2
100
CC
IL
CC
CC
V
V
OL
= MIN, I = MAX
±5%V
IH
OL
Input clamp voltage
= MIN, I = I
IK
V
IK
CC
CC
CC
CC
CC
I
I
I
I
I
Input current at maximum input voltage
High-level input current
= MAX, V = 7.0V
µA
µA
mA
mA
I
I
= MAX, V = 2.7V
20
IH
IL
I
Low-level input current
= MAX, V = 0.5V
–0.6
–150
I
NO TAG
Short-circuit output current
= MAX
–60
OS
PE=CET=CEP=U/D=GND,
Pn=4.5V, CP=↑
I
I
93
98
120
125
mA
mA
CCH
V
MAX
=
CC
I
Supply current (total)
CC
PE=CET=CEP=U/D=GND,
Pn=GND, CP=↑
CCL
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
5
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
= +25°C
T
= 0°C to +70°C
amb
V
amb
V
SYMBOL
PARAMETER
TEST CONDITIONS
= +5V
= +5V ± 10%
UNIT
CC
CC
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
f
Maximum clock frequency
Propagation delay
Waveform 1
Waveform 1
100
115
85
MHz
MAX
t
t
3.0
4.0
6.0
6.5
8.5
8.5
3.0
4.0
9.0
9.0
ns
ns
PLH
pPHL
CP to Q (Load, PE = Low)
n
t
t
Propagation delay
Waveform 1
3.0
4.5
6.0
7.0
9.0
10.0
3.0
4.0
10.0
10.5
ns
ns
PLH
PHL
CP to Q (Count, PE = High)
n
t
t
Propagation delay
CP to TC
4.5
5.0
6.5
6.5
9.5
9.5
4.0
5.0
10.5
10.0
ns
ns
PLH
PHL
Waveform 1
Waveform 2
Waveform 3
t
t
Propagation delay
CET to TC
3.5
3.0
6.0
6.5
9.0
9.0
3.0
3.0
10.0
10.0
ns
ns
PLH
PHL
t
t
Propagation delay
U/D to TC
4.5
4.5
7.0
7.0
9.0
9.5
4.0
4.0
10.0
10.0
ns
ns
PLH
PHL
AC SETUP REQUIREMENTS
LIMITS
T
= +25°C
T
= 0°C to +70°C
amb
V
amb
V
SYMBOL
PARAMETER
TEST CONDITIONS
= +5V
= +5V ± 10%
UNIT
CC
CC
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MIN
MAX
t (H)
t (L)
s
Setup time, High or Low
P to CP
n
3.5
3.5
2.5
2.5
ns
ns
s
Waveform 4
Waveform 4
Waveform 4
Waveform 4
Waveform 5
Waveform 5
Waveform 6
Waveform 6
Waveform 1
t (H)
Hold time, High or Low
P to CP
n
1.0
1.0
0
1.0
ns
ns
h
t (L)
h
t (H)
Setup time, High or Low
PE to CP
5.5
6.5
5.5
6.5
ns
ns
s
t (L)
s
t (H)
Hold time, High or Low
PE to CP
0
0
0
0
ns
ns
h
t (L)
h
t (H)
Setup time, High or Low
CEP or CET to CP
6.0
8.0
5.0
6.5
ns
ns
s
t (L)
s
t (H)
Hold time, High or Low
CEP or CET to CP
0
0
0
0
ns
ns
h
t (L)
h
t (H)
Setup time, High or Low
U/D to CP
8.0
6.5
6.5
6.5
ns
ns
s
t (L)
s
t (H)
Hold time, High or Low
U/D to CP
0
0
0
0
ns
ns
h
t (L)
h
t (H)
CP Pulse width
High or Low
4.0
4.5
4.0
5.0
ns
ns
w
t (L)
w
6
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
TIMING DIAGRAM
PE
P0
P1
P2
P3
P4
P5
P6
P7
CP
U/D
CEP AND CET
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
TC
253 254
LOAD
255
0
1
2
2
1
0
255 254 253
SEQUENCE
COUNT UP
INHIBIT
COUNT DOWN
SF00838B
7
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
MAX
CET
TC
V
V
M
M
CP
V
V
V
M
M
M
t
t
PLH
PHL
t
(H)
W
t (L)
W
t
t
t
t
PLH
PHL
V
V
M
M
V
V
V
M
M
M
M
SF00792
Q
n
PLH
PHL
Waveform 2. Propagation Delay,
CET Input to Terminal Count Output
TC
V
SF00791A
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
Pn
PE
V
V
h
M
M
V
V
M
U/D
TC
M
t
t
s
t
t
PLH
PHL
V
V
V
V
M
M
M
M
V
V
M
M
t (L)
s
t
h
= 0
t (H)
s
t = 0
h
SF00793
Waveform 3. Propagation Delay, Up/Down Count Control Input
to Terminal Count Output
V
V
CP
M
M
SF00844
Waveform 4. Parallel Data and Parallel Enable
Setup and Hold Times
CET
U/D
CP
V
V
V
V
M
V
V
V
V
M
M
M
M
M
M
M
CEP
t (L)
s
t
t (H)
s
h
t (L)
t (L)
h
t (H)
t (H)
h
t
h
s
s
V
V
M
V
V
M
CP
M
M
Q
n
COUNT
NO CHANGE
Q
n
COUNT DOWN
COUNT UP
SF00842
SF00839
Waveform 5. Count Enables Setup and Hold Times
Waveform 6. Up/Down Count Control Setup and Hold Times
8
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
TEST CIRCUIT AND WAVEFORMS
t
w
AMP (V)
90%
V
CC
90%
NEGATIVE
PULSE
V
V
M
M
10%
10%
V
V
OUT
IN
0V
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
t
t )
T
L
t
t )
TLH ( r
THL ( f
AMP (V)
90%
M
90%
POSITIVE
PULSE
V
V
M
10%
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
R
L
C
L
R
T
=
=
=
Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
Termination resistance should be equal to Z
pulse generators.
family
74F
V
rep. rate
t
t
t
amplitude
M
w
TLH
THL
of
OUT
2.5ns 2.5ns
3.0V
1.5V
1MHz
500ns
SF00006
9
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
10
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
11
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
12
1996 Jan 05
Philips Semiconductors
Product specification
8–bit bidirectional binary counter
74F269
NOTES
13
1996 Jan 05
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Philips Semiconductors and Philips Electronics North America Corporation
register eligible circuits under the Semiconductor Chip Protection Act.
Copyright Philips Electronics North America Corporation 1996
All rights reserved. Printed in U.S.A.
(print code)
Date of release: July 1994
9397-750-05112
Document order number:
相关型号：
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