N74F711AN [PHILIPS]

Multiplexer, 5-Func, 2 Line Input, TTL, PDIP20,;
N74F711AN
型号: N74F711AN
厂家: PHILIPS SEMICONDUCTORS    PHILIPS SEMICONDUCTORS
描述:

Multiplexer, 5-Func, 2 Line Input, TTL, PDIP20,

光电二极管
文件: 总16页 (文件大小:139K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74F711A, 74F711-1, 74F712A, 74F712-1  
Multiplexers  
Product specification  
IC15 Data Handbook  
1990 Dec 13  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
74F711A/74F711–1/  
74F712A/74F712–1  
Multiplexers  
74F711A Quint 2-to-1 Data Selector Multiplexer (3-State)  
74F711-1 Quint 2-to-1 Data Selector Multiplexer with 30W Equivalent Output Termination Impedance (3-State)  
74F712A Quint 3-to-1 Data Selector Multiplexer  
74F712-1 Quint 3-to-1 Data Selector Multiplexer with 30W Equivalent Output Termination Impedance  
To improve speed and noise immunity, V and GND side pins are  
used.  
FEATURES for 74F711A/74F711-1  
Consists of five 2-to-1 Multiplexers  
CC  
The 74F712A/74F712-1 consist of five 3-to1 multiplexers designed  
High impedance PNP base inputs for reduced loading  
for address multiplexing of dynamic RAMs and other multiplexing  
(20µA in High and Low states)  
applications. The 74F712A has two select (S0, S1) inputs to  
determine which set of five inputs will be propagated to the five  
Designed for address multiplexing of dynamic RAM and other  
outputs. The outputs source 15mA and sink 64mA. The 74F712-1 is  
the same as the 74F712A except that it has a 30W termination  
impedance on each output to reduce line noise and the outputs sink  
5mA.  
applications  
Output inverting/non-inverting option  
30W termination impedance on each output – 74F711-1  
Outputs sink 64mA (74F711A only)  
TYPICAL SUPPLY  
TYPICAL  
PROPAGATION DELAY  
CURRENT  
(TOTAL)  
TYPE  
FEATURES for 74F712A/74F712-1  
Consists of five 3-to-1 Multiplexers  
74F711A  
74F711-1  
74F712A  
74F712-1  
6.0ns  
6.5ns  
6.5ns  
6.5ns  
30mA  
29mA  
25mA  
25mA  
High impedance PNP base inputs for reduced loading  
(20µA in High and Low states)  
Designed for address multiplexing of dynamic RAM and other  
applications  
30W termination impedance on each output – 74F712-1  
Outputs sink 64mA (74F712A only)  
ORDERING INFORMATION  
COMMERCIAL RANGE  
= 5V ± 10%  
DESCRIPTION  
V
CC  
DESCRIPTION  
PKG DWG #  
The 74F711A/74F711-1 consist of five 2-to-1 multiplexers designed  
for address multiplexing of dynamic RAMs and other multiplexing  
applications. The 74F711A has a common select (S) input, an  
Output Enable (OE) input and an Output Inverting (INV) input to  
control the 3-State outputs. The outputs source 15mA and sink  
64mA. The 74F711-1 is the same as the 74F711A except that is has  
a 30W termination impedance on each output to reduce line noise  
and the 3-State outputs sink 5mA.  
T
amb  
= 0° C to +70°C  
20-Pin Plastic DIP  
N74F711AN, N74F711-1N  
SOT146-1  
SOT222-1  
24-Pin Plastic Slim N74F712AN, N74F712-1N  
DIP (300 mil)  
20-Pin Plastic SOL N74F711AD, N74F711-1D  
24-Pin Plastic SOL N74F712AD, N74F712-1D  
SOT163-1  
SOT137-1  
When the inverting input (INV) is Low, the input data path is  
inverted.  
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE  
74F(U.L.)  
HIGH/LOW  
LOAD VALUE  
HIGH/LOW  
PINS  
Dna, Dnb  
DESCRIPTION  
Data inputs  
Select input  
1.0/0.066  
1.0/0.033  
1.0/0.033  
1.0/0.033  
750/106.7  
750/8.33  
1.0/0.066  
1.0/0.033  
750/106.7  
750/8.33  
20µA/40µA  
20µA/20µA  
20µA/20µA  
20µA/20µA  
15mA/64mA  
15mA/5mA  
20µA/40µA  
20µA/20µA  
15mA/64mA  
15mA/5mA  
S
OE  
Output Enable input (active Low)  
Output inverting input (active Low)  
Data outputs for 74F711A  
Data outputs for 74F711-1  
Data inputs  
74F711A/  
74F711-1  
INV  
Q0 - Q4  
Q0 - Q4  
Dna, Dnb, Dnc  
S0, S1  
Q0 - Q4  
Q0 - Q4  
Select inputs  
74F712A/  
74F712-1  
Data outputs for 74F712A  
Data outputs for 74F712-1  
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High state and 0.6mA in the Low state.  
2
1990 Dec 13  
853-1368 01258  
Philips Semiconductors  
Product specification  
74F711A/74F711–1/  
74F712A/74F712–1  
Multiplexers  
PIN CONFIGURATION – 74F711A/74F711-1  
PIN CONFIGURATION – 74F712A/74F712-1  
D0a  
D0b  
Q0  
1
2
3
4
5
20 D1a  
19 D1b  
18 D2a  
17 D2b  
1
2
3
4
5
24  
23  
22  
21  
20  
S0  
S1  
D0a  
D1a  
D2a  
Q0  
Q1  
Q1  
D3a  
D4a  
GND  
16  
15  
14  
V
CC  
Q2  
D3a  
D3b  
Q2  
Q3  
Q4  
S
6
7
8
9
6
7
19  
18  
17  
16  
15  
14  
13  
GND  
Q3  
V
CC  
D0b  
D1b  
D2b  
13 D4a  
12 D4b  
11 OE  
8
Q4  
9
D0c  
D1c  
INV 10  
10  
11  
12  
D3b  
D4b  
D4c  
D2c  
D3c  
SF01215  
SF01216  
LOGIC SYMBOL – 74F711A/74F711-1  
LOGIC SYMBOL – 74F712A/74F712-1  
1
2
20 19 18 17 15 14 13 12  
24 18  
9
23 17 10 22 16 11 21 15 12 20 14 13  
D0a D0b D1a D1b D2a D2b D3a D3b D4a D4b  
D0a D0b D0c D1a D1b D1c D2a D2b D2c D3a D3b D3c D4a D4b D4c  
9
10  
11  
S
OE  
1
2
S0  
S1  
INV  
Q0  
3
Q1  
4
Q2  
6
Q3  
7
Q4  
8
Q0  
3
Q1  
4
Q2  
5
Q3  
7
Q4  
8
V
= Pin 16  
V
= Pin 19  
CC  
CC  
GND = Pin 6  
GND = Pin 5  
SF01217  
SF01218  
LOGIC SYMBOL (IEEE/IEC) – 74F711A/74F711-1  
LOGIC SYMBOL (IEEE/IEC) – 74F712A/74F712-1  
MUX  
MUX  
1
G1  
1
G
2
G2  
11  
EN1  
10  
M
24  
1
3
18  
9
3
1
2
23  
17  
10  
22  
16  
20  
4
5
7
8
4
6
7
8
19  
18  
17  
11  
21  
15  
14  
13  
12  
15  
12  
20  
14  
13  
SF01219  
SF01220  
3
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711–1/  
74F712A/74F712–1  
Multiplexers  
LOGIC DIAGRAM – 74F711A/74F711-1  
11  
OE  
10  
INV  
9
S
1
D0a  
3
2
Q0  
D0b  
20  
D1a  
19  
4
Q1  
D1b  
18  
D2a  
17  
6
Q2  
D2b  
15  
D3a  
14  
7
Q3  
D3b  
13  
D4a  
8
12  
Q4  
D4b  
V
= Pin 16  
CC  
GND = Pin 5  
SF01221  
FUNCTION TABLE – 74F711A/74F711-1  
INPUTS  
OUTPUT  
Qn  
S
L
INV  
L
OE  
L
Dna  
Dnb  
Data a Data b  
Data a Data b  
Data a Data b  
Data a Data b  
Data a  
Data b  
Data a  
Data b  
Z
H
L
L
L
H
L
H
X
H
L
X
H
X
X
H
L
X
Z
=
High voltage level  
Low voltage level  
Don’t care  
=
=
=
High impedance “off” state  
4
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711–1/  
74F712A/74F712–1  
Multiplexers  
LOGIC DIAGRAM – 74F712A/74F712-1  
1
S0  
2
S1  
24  
D0a  
18  
D0b  
3
Q0  
9
D0c  
23  
D1a  
17  
D1b  
4
Q1  
10  
D1c  
22  
D2a  
16  
D2b  
5
Q2  
11  
D2c  
21  
D3a  
15  
D3b  
7
Q3  
12  
D3c  
20  
D4a  
14  
D4b  
8
Q4  
13  
V
= Pin 19  
D4c  
CC  
GND = Pin 6  
SF01222  
FUNCTION TABLE – 74F712A/74F712-1  
INPUTS  
OUTPUT  
Qn  
S0  
L
S1  
L
Dna  
Dnb  
Dnc  
Data a Data b Data c  
Data a Data b Data c  
Data a Data b Data c  
Data a  
Data b  
Data c  
H
X
L
H
H
L
X
=
=
=
High voltage level  
Low voltage level  
Don’t care  
5
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711–1/  
74F712A/74F712–1  
Multiplexers  
ABSOLUTE MAXIMUM RATINGS  
Operation beyond the limits set forth in this table may impair the useful life of the device.  
Unless otherwise noted these limits are over the operating free-air temperature range.  
SYMBOL  
PARAMETER  
RATING  
–0.5 to +7.0  
–0.5 to +7.0  
–30 to +5  
UNIT  
V
V
Supply voltage  
Input voltage  
Input current  
V
V
CC  
IN  
I
IN  
mA  
V
V
OUT  
Voltage applied to output in High output state  
–0.5 to +V  
CC  
74F711A, 74F712A  
74F711-1, 74F712-1  
96  
10  
mA  
mA  
°C  
°C  
I
Current applied to output in Low output state  
OUT  
T
Operating free-air temperature range  
Storage temperature  
0 to +70  
amb  
T
–65 to +150  
stg  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
NOM  
5.0  
UNIT  
SYMBOL  
PARAMETER  
MIN  
4.5  
MAX  
V
CC  
V
IH  
V
IL  
Supply voltage  
5.5  
V
High-level input voltage  
Low-level input voltage  
Input clamp current  
High-level output current  
2.0  
V
0.8  
–18  
–15  
64  
V
I
I
mA  
mA  
mA  
mA  
°C  
IK  
OH  
74F711A, 74F712A  
74F711-1, 74F712-1  
I
OL  
Low-level output current  
5
T
amb  
Operating free-air temperature  
0
70  
6
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711–1/  
74F712A/74F712–1  
Multiplexers  
DC ELECTRICAL CHARACTERISTICS  
(Over recommended operating free-air temperature range unless otherwise noted.)  
LIMITS  
UNIT  
1
SYMBOL  
PARAMETER  
TEST CONDITIONS  
2
MIN  
2.4  
2.7  
2.0  
2.0  
TYP  
MAX  
±10%V  
V
V
V
V
V
CC  
I
= –3mA  
OH  
OH  
V
V
V
= MIN,  
= MAX,  
= MIN  
CC  
IL  
IH  
±5%V  
3.4  
CC  
V
OH  
High-level output voltage  
±10%V  
CC  
CC  
I
= –15mA  
±5%V  
74F711A/  
74F712A  
only  
±10%V  
0.38  
0.42  
0.55  
0.55  
CC  
I
I
= MAX  
= 5mA  
OL  
V
CC  
= MIN,  
= MAX,  
= MIN  
±5%V  
V
V
CC  
V
OL  
Low-level output voltage  
Input clamp voltage  
V
V
IL  
IH  
74F711-1/  
74F712-1  
±10%V  
0.38  
0.50  
–1.2  
100  
OL  
CC  
V
IK  
V
CC  
= MIN, I = I  
IK  
–0.73  
V
I
Input current at maximum input  
voltage  
I
I
V
= MAX, V = 7.0V  
µA  
CC  
CC  
I
I
High-level input current  
V
= MAX, V = 2.7V  
20  
µA  
µA  
µA  
IH  
IL  
I
Others  
–20  
–40  
I
Low-level input current  
V
= MAX, V = 0.5V  
CC I  
Dn only  
Off-state output current  
High-level voltage  
applied  
I
V
= MAX, V = 2.7V  
50  
µA  
µA  
OZH  
OZL  
CC  
O
74F711A/  
74F711-1  
only  
Off-state output current  
Low-level voltage  
applied  
I
V
= MAX, V = 0.5V  
–50  
CC  
O
Short-circuit output  
current  
74F711-1/  
74F712-1  
I
I
V
= MAX  
–60  
–60  
–150  
–150  
mA  
mA  
OS  
CC  
3
74F711A/  
74F712A  
4
Output current  
V
= MAX, V = 2.25 V  
CC O  
O
I
25  
33  
27  
26  
33  
28  
20  
30  
20  
29  
35  
46  
40  
40  
45  
45  
27  
40  
30  
40  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
mA  
CCH  
74F711A  
I
V
V
= MAX  
= MAX  
CCL  
CCZ  
CCH  
CC  
I
I
I
Supply  
current  
(total)  
74F711-1  
I
CCL  
CCZ  
CCH  
CC  
I
CC  
I
74F712A  
74F712-1  
V
V
= MAX  
= MAX  
CC  
I
CCL  
I
CCH  
CC  
I
CCL  
NOTES:  
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.  
2. All typical values are at V = 5V, T = 25°C.  
CC  
amb  
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold  
OS  
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting  
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any  
sequence of parameter tests, I tests should be performed last.  
OS  
4. I is tested under conditions that produce current approximity one half of the true short-circuit output current (I ).  
O
OS  
7
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711–1/  
74F712A/74F712–1  
Multiplexers  
AC ELECTRICAL CHARACTERISTICS – 74F711A/74F711-1  
LIMITS  
T
= 0° C to +70°C  
amb  
V
T
= +25°C  
amb  
V
= 5V ± 10%  
CC  
C
SYMBOL  
PARAMETER  
TEST CONDITION  
UNIT  
= 5V  
CC  
= 50pF,  
L
C
= 50pF, R = 500W  
L
L
R
= 500W  
L
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
Dna, Dnb to Qn  
2.5  
2.5  
5.0  
4.0  
7.5  
7.0  
2.0  
2.0  
8.0  
7.5  
ns  
ns  
PLH  
PHL  
Waveform 1, 2  
Waveform 1, 3  
Waveform 1, 3  
t
t
Propagation delay  
S to Qn  
7.0  
5.0  
9.0  
8.0  
12.0  
11.0  
5.5  
4.5  
13.5  
12.0  
ns  
ns  
PLH  
PHL  
t
t
Propagation delay  
INV to Qn  
6.0  
4.0  
9.0  
8.0  
12.5  
11.0  
5.0  
3.5  
14.0  
11.5  
ns  
ns  
PLH  
PHL  
74F711A  
t
t
Output Enable time  
OE to Qn  
Waveform 4  
Waveform 5  
2.5  
2.5  
4.0  
4.5  
6.5  
7.0  
2.0  
2.0  
7.0  
7.5  
ns  
ns  
PZH  
PZL  
t
t
Output Disable time  
OE to Qn  
Waveform 4  
Waveform 5  
2.5  
3.0  
4.0  
5.0  
7.0  
8.0  
2.0  
2.5  
8.0  
8.5  
ns  
ns  
PHZ  
PLZ  
t
t
Propagation delay  
Dna, Dnb to Qn  
3.0  
2.0  
4.5  
4.5  
7.5  
7.5  
2.0  
2.5  
9.0  
8.0  
ns  
ns  
PLH  
PHL  
Waveform 1, 2  
Waveform 1, 3  
t
t
Propagation delay  
S, INV to Qn  
6.5  
4.5  
10.0  
8.5  
13.5  
11.5  
5.5  
4.0  
14.5  
12.5  
ns  
ns  
PLH  
PHL  
74F711-1  
t
t
Output Enable time  
OE to Qn  
Waveform 4  
Waveform 5  
2.5  
3.0  
4.5  
5.0  
7.5  
7.5  
2.0  
2.5  
9.0  
8.0  
ns  
ns  
PZH  
PZL  
t
t
Output Disable time  
OE to Qn  
Waveform 4  
Waveform 5  
2.0  
3.5  
4.5  
5.5  
7.0  
8.5  
2.0  
3.0  
8.0  
9.5  
ns  
ns  
PHZ  
PLZ  
AC ELECTRICAL CHARACTERISTICS – 74F712A/74F712-1  
LIMITS  
T
V
= 0 to +70°C  
= 5V ± 10%  
amb  
CC  
C
R
T
= +25°C  
amb  
V
SYMBOL  
PARAMETER  
TEST CONDITION  
UNIT  
= 5V  
CC  
= 50pF,  
L
C
= 50pF, R = 500W  
L
L
= 500W  
L
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
Dna, Dnb, Dnc to Qn  
2.0  
2.0  
3.5  
3.5  
6.5  
6.5  
2.0  
2.0  
7.0  
7.0  
ns  
ns  
PLH  
PHL  
Waveform 1, 2  
Waveform 1  
74F712A  
74F712-1  
t
t
Propagation delay  
S0, S1 to Qn  
6.5  
5.0  
8.0  
7.5  
11.5  
10.0  
5.5  
4.5  
13.5  
11.0  
ns  
ns  
PLH  
PHL  
t
t
Propagation delay  
Dna, Dnb, Dnc to Qn  
2.0  
2.0  
4.0  
4.0  
7.0  
7.0  
2.0  
2.0  
7.5  
7.5  
ns  
ns  
PLH  
PHL  
Waveform 1, 2  
Waveform 1  
t
t
Propagation delay  
S0, S1 to Qn  
7.0  
5.5  
9.0  
7.5  
12.0  
10.5  
6.0  
5.5  
13.5  
11.0  
ns  
ns  
PLH  
PHL  
8
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711–1/  
74F712A/74F712–1  
Multiplexers  
AC WAVEFORMS  
For all waveforms, V = 1.5V  
M
Dna, Dnb,  
Dnc, Sn  
Dna, Dnb,  
Dnc, Sn  
V
V
M
M
V
V
M
M
t
t
PHL  
PLH  
t
t
PHL  
PLH  
Qn  
V
V
M
M
Q
V
V
n
M
M
SF01223  
SF01224  
Waveform 1. Propagation Delay for Non-Inverting Output  
Waveform 2. Propagation Delay for Inverting Output  
V
V
M
INV  
M
OE  
Qn  
V
M
V
-0.3V  
0V  
OH  
t
t
PHZ  
PZH  
t
PHL  
V
t
M
PLH  
Qn  
SF00343  
V
M
Waveform 4. 3-State Output Enable Time to High Level and  
Output Disable Time from High Level  
SF01225  
Waveform 3. Propagation Delay for INV to Output  
V
t
V
M
M
OE  
Qn  
t
PZL  
PLZ  
V
M
V
+0.3V  
OL  
SF00344  
Waveform 5. 3-State Output Enable Time to Low  
Level and Output Disable Time from Low Level  
9
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711–1/  
74F712A/74F712–1  
Multiplexers  
TEST CIRCUIT AND WAVEFORMS  
V
CC  
t
w
AMP (V)  
90%  
7.0V  
90%  
NEGATIVE  
PULSE  
V
V
R
M
M
L
V
V
OUT  
IN  
10%  
10%  
PULSE  
GENERATOR  
D.U.T.  
0V  
t
t )  
t
t )  
THL ( f  
TLH ( r  
R
C
R
L
T
L
t
t )  
t
t )  
TLH ( r  
THL ( f  
AMP (V)  
0V  
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
t
w
SWITCH POSITION  
TEST  
SWITCH  
closed  
closed  
open  
Input Pulse Definition  
t
t
PLZ  
PZL  
All other  
DEFINITIONS:  
R
L
C
L
R
T
=
=
=
Load resistor;  
see AC electrical characteristics for value.  
Load capacitance includes jig and probe capacitance;  
see AC electrical characteristics for value.  
Termination resistance should be equal to Z  
pulse generators.  
INPUT PULSE REQUIREMENTS  
family  
V
M
rep. rate  
t
w
t
t
THL  
amplitude  
TLH  
of  
OUT  
2.5ns  
2.5ns  
74F  
3.0V  
1.5V  
1MHz  
500ns  
SF00777  
10  
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711-1,  
74F712A/74F712-1  
Multiplexers  
DIP20: plastic dual in-line package; 20 leads (300 mil)  
SOT146-1  
11  
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711-1,  
74F712A/74F712-1  
Multiplexers  
DIP24: plastic dual in-line package; 24 leads (300 mil)  
SOT222-1  
12  
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711-1,  
74F712A/74F712-1  
Multiplexers  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
13  
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711-1,  
74F712A/74F712-1  
Multiplexers  
SO24: plastic small outline package; 24 leads; body width 7.5 mm  
SOT137-1  
14  
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711-1,  
74F712A/74F712-1  
Multiplexers  
NOTES  
15  
1990 Dec 13  
Philips Semiconductors  
Product specification  
74F711A/74F711-1,  
74F712A/74F712-1  
Multiplexers  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
Production  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 10-98  
9397-750-05174  
Document order number:  
Philips  
Semiconductors  

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