PCA8581CT/6,118 [NXP]
PCA8581CT;
| 型号： | PCA8581CT/6,118 |
| 厂家： | 
NXP |
| 描述： | PCA8581CT 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 PC 双倍数据速率 光电二极管 内存集成电路 |
| 文件： | 总20页 (文件大小：108K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
PCA8581; PCA8581C
128 × 8-bit EEPROM with I2C-bus
interface
1997 Apr 02
Product specification
Supersedes data of 1996 Aug 19
File under Integrated Circuits, IC12
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
CONTENTS
1
2
3
4
5
6
7
FEATURES
GENERAL DESCRIPTION
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
CHARACTERISTICS OF THE I2C-BUS
7.1
7.2
7.3
7.4
7.5
Bit transfer
Start and stop conditions
System configuration
Acknowledge
I2C-bus protocol
8
LIMITING VALUES
9
HANDLING
10
11
12
DC CHARACTERISTICS
AC CHARACTERISTICS
APPLICATION INFORMATION
12.2
12.2
12.3
Application example
Slave address
Diode protection
13
14
PACKAGE OUTLINES
SOLDERING
14.1
Introduction
14.2
DIP
14.2.1
14.2.2
14.3
Soldering by dipping or by wave
Repairing soldered joints
SO
14.3.1
14.3.2
14.3.3
Reflow soldering
Wave soldering
Repairing soldered joints
15
16
17
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I2C COMPONENTS
1997 Apr 02
2
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
1
FEATURES
2
GENERAL DESCRIPTION
• Operating supply voltage:
– 4.5 to 5.5 V (PCA8581)
– 2.5 to 6.0 V (PCA8581C)
The PCA8581 and PCA8581C are low power CMOS
EEPROMs with standard and wide operating voltages:
4.5 to 5.5 V (PCA8581)
2.5 to 6.0 V (PCA8581C).
• Integrated voltage multiplier and timer for writing
(no external components required)
In the following text, the generic term ‘PCA8581’ is used to
refer to both types in all packages except when otherwise
specified.
• Automatic erase before write
• Low standby current; maximum 10 µA
• 8-byte page write mode
The PCA8581 is organized as 128 words of 8-bytes.
• Serial input/output bus (I2C-bus)
Addresses and data are transferred serially via a two-line
bidirectional bus (I2C-bus). The built-in word address
register is incremented automatically after each written or
read data byte. All bytes can be read in a single operation.
Up to 8 bytes can be written in one operation, reducing the
total write time per byte. Three address pins, A0, A1 and
A2 are used to define the hardware address, allowing the
use of up to 8 devices connected to the bus without
additional hardware.
• Address by 3 hardware address pins
• Automatic word address incrementing
• Designed for minimum 10000 write cycles per byte
• 10 years minimum non-volatile data retention
• Infinite number of read cycles
• Pin and address compatibility to PCF8570C and
PCF8582
• Operating ambient temperature: −25 to +85 °C.
3
QUICK REFERENCE DATA
SYMBOL
VDD
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
supply voltage
PCA8581
4.5
5.5
V
V
PCA8581C
2.5
−
6.0
IDD
supply current (standby)
operating ambient temperature
storage temperature
fSCL = 0 Hz
10
µA
°C
°C
°C
Tamb
Tstg
−25
−65
−65
+85
+150
+85
without EEPROM retention
with EEPROM retention
4
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
DIP8
DIP8
SO8
DESCRIPTION
plastic dual in-line package; 8 leads (300 mil)
plastic dual in-line package; 8 leads (300 mil)
VERSION
SOT97-1
SOT97-1
SOT96-1
SOT96-1
PCA8581P
PCA8581CP
PCA8581T
PCA8581CT
plastic small outline package; 8 leads; body width 3.9 mm
plastic small outline package; 8 leads; body width 3.9 mm
SO8
1997 Apr 02
3
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
5
BLOCK DIAGRAM
VOLTAGE
MULTIPLIER
TIMER
PCA8581
PCA8581C
WORD
ADDRESS
REGISTER
MEMORY
CELL
ARRAY
ROW
SELECT
7
1
2
3
A0
A1
A2
6
5
2
SCL
SDA
INPUT
FILTER
COLUMN
SELECT
I C BUS
MULTIPLEXER
CONTROL
8
SHIFT
REGISTER
R/W
CONTROL
POWER
ON
8
V
DD
RESET
4
7
V
SS
TEST
MLB887
Fig.1 Block diagram.
6
PINNING
SYMBOL
PIN
DESCRIPTION
A0
1
2
3
4
5
6
7
hardware address input 0
hardware address input 1
hardware address input 2
negative supply
fpage
V
A0
A1
A2
1
2
3
4
8
7
6
5
DD
A1
TEST
SCL
A2
PCA8581
PCA8581C
VSS
SDA
SCL
TEST
serial data input/output
serial clock input
V
SDA
SS
MLB888
test output can be connected to VSS, VDD or left
open-circuit
Fig.2 Pin configuration.
VDD
8
positive supply
1997 Apr 02
4
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
CHARACTERISTICS OF THE I2C-BUS
7.1
Bit transfer
7
The I2C-bus is for bidirectional, two-line communication
between different ICs or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both
lines must be connected to a positive supply via a pull-up
resistor. Data transfer may be initiated only when the bus
is not busy.
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line
at this time will be interpreted as a control signal.
SDA
SCL
data line
stable;
data valid
change
of data
allowed
MBA607
Fig.3 Bit transfer.
7.2
Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is
defined as the stop condition (P).
SDA
SCL
SDA
SCL
S
P
STOP condition
START condition
MBA608
Fig.4 Definition of START and STOP conditions.
1997 Apr 02
5
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
7.3
System configuration
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
SDA
SCL
MASTER
TRANSMITTER /
RECEIVER
SLAVE
TRANSMITTER /
RECEIVER
MASTER
TRANSMITTER /
RECEIVER
SLAVE
RECEIVER
MASTER
TRANSMITTER
MBA605
Fig.5 System configuration.
The device that acknowledges must pull down the SDA
line during the acknowledge clock pulse, so that the SDA
line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times
must be taken into consideration). A master receiver must
signal an end of data to the transmitter by not generating
an acknowledge on the last byte that has been clocked out
of the slave. In this event the transmitter must leave the
data line HIGH to enable the master to generate a stop
condition.
7.4
Acknowledge
The number of data bytes transferred between the start
and stop conditions from transmitter to receiver is
unlimited. Each byte of eight bits is followed by an
acknowledge bit. The acknowledge bit is a HIGH level
signal put on the bus by the transmitter during which time
the master generates an extra acknowledge related clock
pulse. A slave receiver which is addressed must generate
an acknowledge after the reception of each byte. Also a
master receiver must generate an acknowledge after the
reception of each byte that has been clocked out of the
slave transmitter.
clock pulse for
acknowledgement
START
condition
SCL FROM
MASTER
2
9
1
8
DATA OUTPUT
BY TRANSMITTER
S
DATA OUTPUT
BY RECEIVER
MBA606 - 1
Fig.6 Acknowledgement on the I2C-bus.
1997 Apr 02
6
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
7.5
I2C-bus protocol
Before any data is transmitted on the I2C-bus, the device which should respond is addressed first. The addressing is
always carried out with the first byte transmitted after the start procedure. The I2C-bus configuration for the different
PCA8581 WRITE and READ cycles is shown in Figs 7, 9 and 10.
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from slave
S
SLAVE ADDRESS
0
A
X
WORD ADDRESS
A
DATA
A
P
WRITING
t
don't
care
R/W
n bytes
WR
auto increment
memory word address
MLB889
Fig.7 Master transmits to slave receiver (WRITE) mode.
After the word address, one-to-eight data bytes can be sent. The address is automatically incremented, but the four
highest address bits (row) are internally latched. Therefore all bytes are written in the same row.
An example of writing eight bytes with word address X 0 0 0 0 0 0 0 and six bytes with word address X 0 0 1 0 1 0 1 is
shown in Fig.8.
(1)
Word Address
Row
X0000000
X0001...
0
1
2
3
1
4
2
5
3
6
4
5
6
1
7
2
8
3
X0010101
X0011...
column
0
1
2
3
4
5
6
7
MLB890
(1) X = don’t care.
Fig.8 Writing eight and six bytes with different word addresses.
7
1997 Apr 02
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
To transmit eight bytes in sequential order, begin with the lowest address bits 0 0 0. The data is written after a stop is
detected. The data is only written if complete bytes have been received and acknowledged. Writing takes a time tWR
(6 to 10 ms) during which the device will not respond to its slave address. Note that to write the next row, a new write
operation is required (start, slave address, row address, data and stop).
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from master
S
SLAVE ADDRESS
0
A
X
WORD ADDRESS
A
S
SLAVE ADDRESS
1
A
DATA
A
n bytes
R/W don't
care
R/W
at this moment master -
transmitter becomes
auto increment
memory word address
master - receiver and
PCA8581(C) slave - receiver
becomes slave - transmitter
no acknowledgement
from master
DATA
1
P
last byte
auto increment
memory word address
MLB891
Fig.9 Master reads after setting word address (WRITE word address; READ data).
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from slave
1
A
A
DATA
1
P
S
SLAVE ADDRESS
DATA
R/W
n bytes
last bytes
auto increment
word address
auto increment
word address
MBD824
Fig.10 Master reads slave immediately after first byte (READ mode).
An unlimited number of data bytes can be read in one operation. The address is automatically incremented. If a read
without setting the word address is performed after a write operation, the address pointer may point at a byte in the row
after the previously written row. This occurs if, during writing, the three lowest address bits (column) rolled over.
1997 Apr 02
8
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
8
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
supply voltage (pin 8)
CONDITIONS
MIN.
−0.3
MAX.
+7.0
UNIT
VDD
VI
V
V
input voltage (any input)
DC input current
measured via a 500 Ω resistor
−0.8
−
VDD + 0.8
±10
II
mA
mA
mW
mW
°C
IO
DC output current
−
±10
Ptot
PO
Tamb
Tstg
total power dissipation per package
power dissipation per output
operating ambient temperature
storage temperature
−
150
−
50
−25
−65
−65
+85
without EEPROM retention
with EEPROM retention
+150
+85
°C
°C
9
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC12 under
“Handling MOS Devices”.
1997 Apr 02
9
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
10 DC CHARACTERISTICS
VDD = 2.5 to 6.0 V (PCA8581C); VDD = 4.5 to 5.5 V (PCA8581); VSS = 0 V; Tamb = −25 to +85 °C; note 1; unless
otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDD
supply voltage
PCA8581C
PCA8581
2.5
−
−
6.0
V
V
4.5
5.5
IDD
supply current
standby mode
during read cycle
during write cycle
f
SCL = 0 Hz; VIL = 0 V; VIH = VDD
−
−
−
−
−
−
10
µA
µA
µA
fSCL = 100 Hz; VIL = 0 V; VIH = VDD
VIL = 0 V; VIH = VDD
400
1000
Inputs A0, A1, A2, SDA and SCL
VIL
VIH
ILI
LOW level input voltage
HIGH level input voltage
input leakage current
input capacitance
−
−
−
−
−
0.3VDD
V
0.7VDD
−
1
7
V
VI = VDD or VSS
VI = VSS
−
−
µA
pF
Ci
Output SDA
IOL
LOW level output current VOL = 0.4 V
3
−
−
mA
Erase/write data
tWR
write time
data retention time
−
7
10
ms
tRET
10
−
−
years
Note
1. The PCA8581C is guaranteed to be programmed with all locations ‘FF’ (hexadecimal) provided the device has been
stored within the temperature limits −65 to +85 °C.
1997 Apr 02
10
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
11 AC CHARACTERISTICS
All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL and
VIH with an input voltage swing of VSS to VDD
.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
I2C-bus timing (see Fig.11; note 1)
fSCL
SCL clock frequency
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
100
kHz
tSP
tolerable spike width on bus
bus free time
100
−
ns
µs
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
tBUF
4.7
4.7
4.0
4.7
4.0
−
tSU;STA
tHD;STA
tLOW
tHIGH
tr
START condition set-up time
START condition hold time
SCL LOW time
−
−
−
SCL HIGH time
−
SCL and SDA rise time
SCL and SDA fall time
data set-up time
1.0
0.3
−
tf
−
tSU;DAT
tHD;DAT
tVD;DAT
tSU;STO
250
0
data hold time
−
SCL LOW to data out valid
STOP condition set-up time
−
3.4
−
4.0
Note
1. A detailed description of the I2C-bus specification, with applications, is given in brochure “The I2C-bus and how to
use it”. This brochure may be ordered using the code 9398 393 40011.
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6)
BIT 0
LSB
(R/W)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
PROTOCOL
t
t
t
HIGH
SU;STA
LOW
1 / f
SCL
SCL
SDA
t
t
t
f
BUF
r
t
t
t
t
t
HD;STA
SU;DAT
VD;DAT
SU;STO
HD;DAT
MBD820
Fig.11 I2C-bus timing diagram; rise and fall times refer to VIL and VIH.
1997 Apr 02
11
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
12 APPLICATION INFORMATION
12.1 Application example
V
DD
SDA
SCL
MASTER
TRANSMITTER/
RECEIVER
V
DD
0
SCL
A0
A1
A2
0
0
PCA8581/PCA8581C
'1010'
SDA
V
SS
TEST
V
DD
1
0
0
V
SCL
A0
A1
A2
DD
PCA8581/PCA8581C
'1010'
SDA
V
SS
TEST
V
DD
1
1
1
V
V
V
SCL
A0
A1
A2
DD
DD
DD
PCA8581/PCA8581C
'1010'
V
DD
SDA
V
SS
TEST
R
R
R: pull up resistor
t
r
R =
C
BUS
SDA SCL
MLB893
2
(I C bus)
Inputs A0, A1 and A2 must be connected to VDD of VSS but not left open-circuit.
Fig.12 Application diagram.
12
1997 Apr 02
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
12.2 Slave address
The PCA8581 has a fixed combination 1 0 1 0 as group 1, while group 2 is fully programmable (see Fig.13).
handbook, halfpage
1
0
1
0
A2 A1 A0 R/W
group 2
group 1
MLB892
Fig.13 Slave address.
12.3 Diode protection
handbook, halfpage
V
A0
A1
A2
DD
TEST
SCL
V
SDA
SS
substrate
MLB894
There is no connection between SCL and VDD, and SDA and VDD; this allows powering down the device without affecting I2C-bus operation.
Fig.14 Device diode protection.
1997 Apr 02
13
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
13 PACKAGE OUTLINES
DIP8: plastic dual in-line package; 8 leads (300 mil)
SOT97-1
D
M
E
A
2
A
A
1
L
c
w M
Z
b
1
e
(e )
1
M
H
b
b
2
8
5
pin 1 index
E
1
4
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
w
UNIT
mm
b
b
b
c
D
E
e
e
L
M
M
H
1
2
1
E
max.
min.
max.
max.
1.73
1.14
0.53
0.38
1.07
0.89
0.36
0.23
9.8
9.2
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.10
7.62
0.30
0.254
0.01
1.15
0.068 0.021 0.042 0.014
0.045 0.015 0.035 0.009
0.39
0.36
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.020
0.13
0.045
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
92-11-17
95-02-04
SOT97-1
050G01
MO-001AN
1997 Apr 02
14
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A
X
c
y
H
v
M
A
E
Z
5
8
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
4
e
w
M
detail X
b
p
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.050
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.20
0.014 0.0075 0.19
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches 0.069
0.01 0.004
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
95-02-04
97-05-22
SOT96-1
076E03S
MS-012AA
1997 Apr 02
15
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus
interface
PCA8581; PCA8581C
Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.
14 SOLDERING
14.1 Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.
14.3.2 WAVE SOLDERING
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Wave soldering techniques can be used for all SO
packages if the following conditions are observed:
• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.
14.2 DIP
14.2.1 SOLDERING BY DIPPING OR BY WAVE
• The longitudinal axis of the package footprint must be
parallel to the solder flow.
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
• The package footprint must incorporate solder thieves at
the downstream end.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.
14.2.2 REPAIRING SOLDERED JOINTS
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
14.3.3 REPAIRING SOLDERED JOINTS
Fix the component by first soldering two diagonally-
opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.
14.3 SO
14.3.1 REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO
packages.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
1997 Apr 02
16
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
15 DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
16 LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
17 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1997 Apr 02
17
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
NOTES
1997 Apr 02
18
Philips Semiconductors
Product specification
128 × 8-bit EEPROM with I2C-bus interface
PCA8581; PCA8581C
NOTES
1997 Apr 02
19
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Internet: http://www.semiconductors.philips.com
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1997
SCA53
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
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under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
417067/1200/03/pp20
Date of release: 1997 Apr 02
Document order number: 9397 750 01747
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