PESD15VS2UT,215 [NXP]
PESDxS2UT series - Double ESD protection diodes in SOT23 package TO-236 3-Pin;
| 型号： | PESD15VS2UT,215 |
| 厂家： | 
NXP |
| 描述： | PESDxS2UT series - Double ESD protection diodes in SOT23 package TO-236 3-Pin 局域网 光电二极管 |
| 文件： | 总13页 (文件大小：133K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
PESDxS2UT series
Double ESD protection diodes in
SOT23 package
Product data sheet
2004 Apr 15
Supersedes data of 2003 Aug 20
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
FEATURES
QUICK REFERENCE DATA
• Uni-directional ESD protection of up to two lines
• Max. peak pulse power: Ppp = 330 W at tp = 8/20 µs
• Low clamping voltage: V(CL)R = 20 V at Ipp = 18 A
• Ultra-low reverse leakage current: IRM < 700 nA
• ESD protection > 23 kV
SYMBOL
PARAMETER
VALUE
UNIT
VRWM
reverse stand-off
voltage
3.3, 5.2, 12, 15
and 24
V
Cd
diode capacitance 207, 152, 38, 32 pF
VR = 0 V;
f = 1 MHz
and 23
2
• IEC 61000-4-2; level 4 (ESD)
number of
protected lines
• IEC 61000-4-5 (surge); Ipp = 18 A at tp = 8/20 µs.
APPLICATIONS
PINNING
PIN
• Computers and peripherals
• Communication systems
• Audio and video equipment
• High speed data lines
• Parallel ports.
DESCRIPTION
1
2
3
cathode 1
cathode 2
common anode
DESCRIPTION
Uni-directional double ESD protection diodes in a SOT23
plastic package. Designed to protect up to two
transmission or data lines from ElectroStatic Discharge
(ESD) damage.
1
2
3
1
2
3
MARKING
TYPE NUMBER
PESD3V3S2UT
MARKING CODE(1)
*U9
*U1
*U2
*U3
*U4
sym022
001aaa490
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
Fig.1 Simplified outline (SOT23) and symbol.
Note
1. * = p : made in Hong Kong.
* = t : made in Malaysia.
* = W : made in China.
2004 Apr 15
2
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
DESCRIPTION
VERSION
PESD3V3S2UT
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
−
plastic surface mounted package; 3 leads
SOT23
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
Ppp
PARAMETER
peak pulse power
CONDITIONS
MIN.
MAX.
UNIT
8/20 µs pulse; notes 1 and 2
PESD3V3S2UT
PESD5V2S2UT
−
−
−
−
−
330
W
260
180
160
160
W
W
W
W
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
Ipp
peak pulse current
PESD3V3S2UT
8/20 µs pulse; notes 1 and 2
−
−
−
−
−
−
18
A
PESD5V2S2UT
15
A
PESD12VS2UT
5
A
PESD15VS2UT
5
A
PESD24VS2UT
3
A
Tj
junction temperature
operating ambient temperature
storage temperature
150
+150
+150
°C
°C
°C
Tamb
Tstg
−65
−65
Notes
1. Non-repetitive current pulse 8/20µ µs exponential decay waveform; see Fig.2.
2. Measured across either pins 1 and 3 or pins 2 and 3.
2004 Apr 15
3
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
ESD maximum ratings
SYMBOL
ESD
PARAMETER
CONDITIONS
VALUE
UNIT
electrostatic discharge
capability
IEC 61000-4-2 (contact discharge);
notes 1 and 2
PESD3V3S2UT
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
HBM MIL-Std 883
PESDxS2UT series
30
30
30
30
23
kV
kV
kV
kV
kV
10
kV
Notes
1. Device stressed with ten non-repetitive ElectroStatic Discharge (ESD) pulses; see Fig.3.
2. Measured across either pins 1 and 3 or pins 2 and 3.
ESD standards compliance
ESD STANDARD
IEC 61000-4-2; level 4 (ESD); see Fig.3
HBM MIL-Std 883; class 3
CONDITIONS
>15 kV (air); > 8 kV (contact)
>4 kV
001aaa191
MLE218
I
pp
120
handbook, halfpage
100 %
90 %
I
pp
100 % I ; 8 µs
pp
(%)
80
−t
e
50 % I ; 20 µs
pp
40
10 %
t
0
t = 0.7 to 1 ns
r
0
10
20
30
40
30 ns
t (µs)
60 ns
Fig.2 8/20 µs pulse waveform according to
Fig.3 ElectroStatic Discharge (ESD) pulse
waveform according to IEC 61000-4-2.
IEC 61000-4-5.
2004 Apr 15
4
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
ELECTRICAL CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
VRWM
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
reverse stand-off voltage
PESD3V3S2UT
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
reverse leakage current
PESD3V3S2UT
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
breakdown voltage
PESD3V3S2UT
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
diode capacitance
PESD3V3S2UT
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
clamping voltage
PESD3V3S2UT
−
−
−
−
−
−
−
−
−
−
3.3
V
V
V
V
V
5.2
12
15
24
IRM
VRWM = 3.3 V
−
−
−
−
−
0.7
2
1
1
1
1
µA
µA
µA
µA
µA
VRWM = 5.2 V
VRWM = 12 V
VRWM = 15 V
VRWM = 24 V
IZ = 5 mA
0.15
<0.02
<0.02
<0.02
VBR
5.2
5.6
6.0
V
V
V
V
V
6.4
6.8
7.2
14.7
17.6
26.5
15.0
18.0
27.0
15.3
18.4
27.5
Cd
f = 1 MHz; VR = 0 V
−
−
−
−
−
207
152
38
300
200
75
pF
pF
pF
pF
pF
32
70
23
50
V(CL)R
notes 1 and 2
Ipp = 1 A
Ipp = 18 A
Ipp = 1 A
Ipp = 15 A
Ipp = 1 A
Ipp = 5 A
Ipp = 1 A
Ipp = 5 A
Ipp = 1 A
Ipp = 3 A
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
7
V
V
V
V
V
V
V
V
V
V
20
9
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
20
19
35
23
40
36
70
2004 Apr 15
5
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
SYMBOL
Rdiff
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
differential resistance
PESD3V3S2UT
PESD5V2S2UT
PESD12VS2UT
PESD15VS2UT
PESD24VS2UT
IR = 1 mA
−
−
−
−
−
−
−
−
−
−
400
Ω
IR = 1 mA
IR = 1 mA
IR = 1 mA
IR = 0.5 mA
80
Ω
Ω
Ω
Ω
200
225
300
Notes
1. Non-repetitive current pulse 8/20 µs exponential decay waveform; see Fig.2.
2. Measured either across pins 1 and 3 or pins 2 and 3.
GRAPHICAL DATA
001aaa147
001aaa193
4
10
1.2
P
P
PP
pp
(W)
P
PP(25°C)
3
10
0.8
(1)
(2)
2
10
0.4
10
0
2
3
4
1
10
10
10
10
0
50
100
150
200
t
p
(µs)
T (°C)
j
(1) PESD3V3S2UT and PESD5V2S2UT.
(2) PESD12VS2UT, PESD15VS2UT, PESD24VS2UT
Tamb = 25 °C.
tp = 8/20 µs exponential decay waveform; see Fig.2.
Fig.5 Relative variation of peak pulse power as a
function of junction temperature; typical
values.
Fig.4 Peak pulse power dissipation as a function
of pulse time; typical values.
2004 Apr 15
6
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
001aaa148
001aaa149
240
50
C
d
C
d
(pF)
200
(pF)
40
160
120
80
30
20
10
0
(1)
(2)
(1)
(2)
(3)
40
0
1
2
3
4
5
0
5
10
15
20
25
V
(V)
R
V
(V)
R
(1) PESD12VS2UT; VRWM = 12 V.
(2) PESD15VS2UT; VRWM = 15 V.
(3) PESD24VS2UT; VRWM = 24 V.
(1) PESD3V3S2UT; VRWM = 3.3 V.
(2) PESD5V2S2UT; VRWM = 5 V.
Tamb = 25 °C; f = 1 MHz.
Tamb = 25 °C; f = 1 MHz.
Fig.6 Diode capacitance as a function of reverse
voltage; typical values.
Fig.7 Diode capacitance as a function of reverse
voltage; typical values.
2004 Apr 15
7
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
001aaa270
10
I
R
I
R(25˚C)
(1)
1
−1
10
−100
−50
0
50
100
150
T (°C)
j
(1) PESD3V3S2UT; VRWM = 3.3 V.
PESD5V2S2UT; VRWM = 5 V.
IR is less than 10 nA at 150 °C for:
PESD12V52UT; VRWM = 12 V.
PESD15VS2UT; VRWM = 15 V.
PESD24VS2UT; VRWM = 24 V.
Fig.8 Relative variation of reverse leakage
current as a function of junction
temperature; typical values.
2004 Apr 15
8
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
ESD TESTER
RG 223/U
50 Ω coax
4 GHz DIGITAL
OSCILLOSCOPE
R
Z
450 Ω
10×
ATTENUATOR
C
Z
50 Ω
note 1
Note 1: IEC61000-4-2 network
C
Z
= 150 pF; R = 330 Ω
Z
D.U.T.: PESDxS2UT
vertical scale = 200 V/div
horizontal scale = 50 ns/div
vertical scale = 20 V/div
horizontal scale = 50 ns/div
PESD24VS2UT
GND
GND
GND
GND
GND
PESD15VS2UT
PESD12VS2UT
PESD5V2S2UT
PESD3V3S2UT
GND
unclamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
clamped +1 kV ESD voltage waveform
(IEC61000-4-2 network)
GND
GND
vertical scale = 10 V/div
horizontal scale = 50 ns/div
vertical scale = 200 V/div
horizontal scale = 50 ns/div
unclamped −1 kV ESD voltage waveform
(IEC61000-4-2 network)
clamped −1 kV ESD voltage waveform
(IEC61000-4-2 network)
001aaa492
Fig.9 ESD clamping test set-up and waveforms.
9
2004 Apr 15
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
APPLICATION INFORMATION
The PESDxS2UT series is designed for uni-directional protection for up to two lines against damage caused by
ElectroStatic Discharge (ESD) and surge pulses. The PESDxS2UT series may be used on lines where the signal
polarities are below ground. PESDxS2UT series provide a surge capability of up to 330 W (Ppp) per line for an 8/20 µs
waveform.
line 1 to be protected
line 2 to be protected
line 1 to be protected
PESDxS2UT
ground
PESDxS2UT
ground
unidirectional protection
of two lines
bidirectional protection
of one line
001aaa491
Fig.10 Typical application: ESD protection of data lines.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The
following guidelines are recommended:
• Place the PESDxS2UT as close as possible to the input terminal or connector.
• The path length between the PESDxS2UT and the protected line should be minimized.
• Keep parallel signal paths to a minimum.
• Avoid running protected conductors in parallel with unprotected conductors.
• Minimize all printed-circuit board conductive loops including power and ground loops.
• Minimize the length of transient return paths to ground.
• Avoid using shared return paths to a common ground point.
• Ground planes should be used whenever possible. For multilayer printed-circuit boards use ground vias.
2004 Apr 15
10
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
PACKAGE OUTLINE
Plastic surface-mounted package; 3 leads
SOT23
D
B
E
A
X
H
v
M
A
E
3
Q
A
A
1
c
1
2
e
b
w M
B
1
L
p
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
b
c
D
E
e
e
H
L
Q
v
w
A
p
p
1
E
max.
1.1
0.9
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.45
0.15
0.55
0.45
mm
0.1
1.9
0.95
0.2
0.1
REFERENCES
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEDEC
JEITA
04-11-04
06-03-16
SOT23
TO-236AB
2004 Apr 15
11
NXP Semiconductors
Product data sheet
Double ESD protection diodes in SOT23
package
PESDxS2UT series
DATA SHEET STATUS
DOCUMENT
STATUS(1)
PRODUCT
STATUS(2)
DEFINITION
Objective data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary data sheet
Product data sheet
Qualification
Production
This document contains data from the preliminary specification.
This document contains the product specification.
Notes
1. Please consult the most recently issued document before initiating or completing a design.
2. The product status of device(s) described in this document may have changed since this document was published
and may differ in case of multiple devices. The latest product status information is available on the Internet at
URL http://www.nxp.com.
DISCLAIMERS
above those given in the Characteristics sections of this
document is not implied. Exposure to limiting values for
extended periods may affect device reliability.
General ⎯ Information in this document is believed to be
accurate and reliable. However, NXP Semiconductors
does not give any representations or warranties,
expressed or implied, as to the accuracy or completeness
of such information and shall have no liability for the
consequences of use of such information.
Terms and conditions of sale ⎯ NXP Semiconductors
products are sold subject to the general terms and
conditions of commercial sale, as published at
http://www.nxp.com/profile/terms, including those
pertaining to warranty, intellectual property rights
infringement and limitation of liability, unless explicitly
otherwise agreed to in writing by NXP Semiconductors. In
case of any inconsistency or conflict between information
in this document and such terms and conditions, the latter
will prevail.
Right to make changes ⎯ NXP Semiconductors
reserves the right to make changes to information
published in this document, including without limitation
specifications and product descriptions, at any time and
without notice. This document supersedes and replaces all
information supplied prior to the publication hereof.
No offer to sell or license ⎯ Nothing in this document
may be interpreted or construed as an offer to sell products
that is open for acceptance or the grant, conveyance or
implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Suitability for use ⎯ NXP Semiconductors products are
not designed, authorized or warranted to be suitable for
use in medical, military, aircraft, space or life support
equipment, nor in applications where failure or malfunction
of an NXP Semiconductors product can reasonably be
expected to result in personal injury, death or severe
property or environmental damage. NXP Semiconductors
accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at
the customer’s own risk.
Export control ⎯ This document as well as the item(s)
described herein may be subject to export control
regulations. Export might require a prior authorization from
national authorities.
Quick reference data ⎯ The Quick reference data is an
extract of the product data given in the Limiting values and
Characteristics sections of this document, and as such is
not complete, exhaustive or legally binding.
Applications ⎯ Applications that are described herein for
any of these products are for illustrative purposes only.
NXP Semiconductors makes no representation or
warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values ⎯ Stress above one or more limiting
values (as defined in the Absolute Maximum Ratings
System of IEC 60134) may cause permanent damage to
the device. Limiting values are stress ratings only and
operation of the device at these or any other conditions
2004 Apr 15
12
NXP Semiconductors
Customer notification
This data sheet was changed to reflect the new company name NXP Semiconductors, including new legal
definitions and disclaimers. No changes were made to the technical content, except for package outline
drawings which were updated to the latest version.
Contact information
For additional information please visit: http://www.nxp.com
For sales offices addresses send e-mail to: salesaddresses@nxp.com
© NXP B.V. 2009
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R76/03/pp13
Date of release: 2004 Apr 15
Document order number: 9397 750 12823
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