TZA3043BU/G [NXP]

IC SPECIALTY TELECOM CIRCUIT, UUC13, 1.03 X 1.30 MM, DIE-13, Telecom IC:Other;
TZA3043BU/G
型号: TZA3043BU/G
厂家: NXP    NXP
描述:

IC SPECIALTY TELECOM CIRCUIT, UUC13, 1.03 X 1.30 MM, DIE-13, Telecom IC:Other

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INTEGRATED CIRCUITS  
DATA SHEET  
TZA3043; TZA3043B  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
Product specification  
2000 Mar 28  
Supersedes data of 1998 Jul 08  
File under Integrated Circuits, IC19  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
FEATURES  
APPLICATIONS  
Wide dynamic range, typically 2.5 µA to 1.5 mA  
Low equivalent input noise, typically 5.7 pA/Hz  
Differential transimpedance of 8.3 kΩ  
Wide bandwidth from DC to 950 MHz  
Differential outputs  
Digital fibre optic receiver in medium and long haul  
optical telecommunications transmission systems or in  
high speed data networks  
Wideband RF gain block.  
GENERAL DESCRIPTION  
On-chip Automatic Gain Control (AGC)  
No external components required  
The TZA3043 is a high speed transimpedance amplifier  
with AGC designed to be used in Gigabit Ethernet/Fibre  
Channel optical links. It amplifies the current generated by  
a photo detector (PIN diode or avalanche photodiode) and  
converts it to a differential output voltage.  
Single supply voltage from 3.0 to 5.5 V  
Bias voltage for PIN diode  
Pin compatible with TZA3023 and SA5223  
Switched output polarity available (B-version).  
ORDERING INFORMATION  
TYPE  
PACKAGE  
NUMBER  
NAME  
DESCRIPTION  
VERSION  
TZA3043T  
TZA3043U  
TZA3043BT  
TZA3043BU  
SO8  
plastic small outline package; 8 leads; body width 3.9 mm  
bare die in waffle pack carriers; die dimensions 1.030 × 1.300 mm  
plastic small outline package; 8 leads; body width 3.9 mm  
bare die in waffle pack carriers; die dimensions 1.030 × 1.300 mm  
SOT96-1  
SOT96-1  
SO8  
2000 Mar 28  
2
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
BLOCK DIAGRAM  
(1)  
AGC  
V
CC  
(13)  
8 (11, 12)  
V
CC  
1 nF  
125 Ω  
GAIN  
CONTROL  
125 Ω  
1 (1)  
DREF  
peak detector  
A2  
10 pF  
IPhoto 3 (4)  
(10) 7 OUTQ  
(9) 6 OUT  
A1  
low noise  
amplifier  
single-ended to  
differential converter  
TZA3043T  
TZA3043U  
BIASING  
2, 4, 5 (2, 3, 5, 6, 7, 8)  
MGU096  
GND  
The numbers in brackets refer to the pad numbers of the bare die version.  
(1) AGC analog I/O (pad 13) is only available on the TZA3043U.  
Fig.1 Block diagram of TZA3043T and TZA3043U.  
(1)  
AGC  
V
CC  
(13)  
8 (11, 12)  
V
CC  
1 nF  
DREF  
125 Ω  
GAIN  
CONTROL  
125 Ω  
1 (1)  
peak detector  
A2  
10 pF  
IPhoto 3 (4)  
(9) 6  
OUTQ  
A1  
(10) 7 OUT  
low noise  
amplifier  
single-ended to  
differential converter  
TZA3043BT  
TZA3043BU  
BIASING  
2, 4, 5 (2, 3, 5, 6, 7, 8)  
MGU097  
GND  
The numbers in brackets refer to the pad numbers of the bare die version.  
(1) AGC analog I/O (pad 13) is only available on the TZA3043BU.  
Fig.2 Block diagram of TZA3043BT and TZA3043BU.  
3
2000 Mar 28  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
PINNING  
PIN  
PIN  
PAD  
PAD  
SYMBOL  
TYPE  
DESCRIPTION  
TZA3043T TZA3043BT TZA3043U TZA3043BU  
DREF  
1
1
1
1
analog bias voltage for PIN diode; cathode  
output should be connected to this pin  
GND  
2
3
2
3
2, 3  
4
2, 3  
4
ground ground  
IPhoto  
analog current input; anode of PIN diode  
input  
should be connected to this pin;  
DC bias level of 822 mV is one diode  
voltage above ground  
GND  
GND  
OUT  
4
5
6
4
5
7
5, 6  
7, 8  
9
5, 6  
7, 8  
10  
ground ground  
ground ground  
data  
data output; pin OUT goes HIGH  
output  
when current flows into pin IPhoto  
OUTQ  
7
6
10  
9
data  
compliment of pin OUT  
output  
VCC  
8
8
11, 12  
13  
11, 12  
13  
supply  
supply voltage  
AGC  
input/  
AGC analog I/O  
output  
handbook, halfpage  
handbook, halfpage  
V
V
DREF  
GND  
DREF  
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
CC  
CC  
OUTQ  
OUT  
GND  
IPhoto  
GND  
OUT  
TZA3043T  
TZA3043BT  
OUTQ  
GND  
IPhoto  
GND  
GND  
MGR287  
MGU098  
Fig.3 Pin configuration of TZA3043T.  
Fig.4 Pin configuration of TZA3043BT.  
2000 Mar 28  
4
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
FUNCTIONAL DESCRIPTION  
The AGC loop hold capacitor is integrated on-chip, so an  
external capacitor is not needed for AGC.  
The TZA3043 is a transimpedance amplifier intended for  
use in fibre optic links for signal recovery in Fibre Channel  
or Gigabit Ethernet applications. It amplifies the current  
generated by a photo detector (PIN diode or avalanche  
photodiode) and transforms it into a differential output  
voltage. The most important characteristics of the  
TZA3043 are high receiver sensitivity and wide dynamic  
range. High receiver sensitivity is achieved by minimizing  
noise in the transimpedance amplifier.  
AGC monitoring  
The AGC voltage can be monitored at pad 13 on the bare  
die (TZA3043U/TZA3043BU). Pad 13 is not bonded in the  
packaged device (TZA3043T/TZA3043BT). This pad can  
be left unconnected during normal operation. It can also be  
used to force an external AGC voltage. If pad 13 (AGC) is  
connected to GND, the internal AGC loop is disabled and  
the receiver gain is at a maximum. The maximum input  
current is then approximately 75 µA.  
Input circuit  
The signal current generated by a PIN diode can vary  
between 2.5 µA to 1.5 mA (p-p).  
Output circuit  
A differential amplifier converts the output of the  
preamplifier to a differential voltage (see Fig.5).  
An AGC loop is implemented to make it possible to handle  
such a wide dynamic range. The AGC loop increases the  
dynamic range of the receiver by reducing the feedback  
resistance of the preamplifier.  
The logic level symbol definitions for the differential  
outputs are shown in Fig.6.  
V
CC  
800 Ω  
800 Ω  
30 Ω  
OUTQ  
30 Ω  
OUT  
4.5 mA  
2 mA  
4.5 mA  
MGR290  
Fig.5 Differential data output circuit.  
V
V
CC  
V
O(max)  
V
OQH  
V
OH  
o(p-p)  
V
OQL  
V
OO  
V
OL  
V
O(min)  
MGR243  
Fig.6 Logic level symbol definitions for data outputs OUT and OUTQ.  
5
2000 Mar 28  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
PIN diode bias voltage DREF  
The reverse voltage across the PIN diode is 4.18 V  
(5 0.82 V) for 5 V supply or 2.48 V (3.3 0.82 V) for  
3.3 V supply.  
The transimpedance amplifier together with the PIN diode  
determines the performance of an optical receiver for a  
large extent. Especially how the PIN diode is connected to  
the input and the layout around the input pin influence the  
key parameters like sensitivity, the bandwidth and the  
Power Supply Rejection Ratio (PSRR) of a  
transimpedance amplifier. The total capacitance at the  
input pin is critical to obtain the highest sensitivity. It should  
be kept to a minimum by reducing the capacitance of the  
PIN diode and the parasitics around the input pin. The  
PIN diode should be placed very close to the IC to reduce  
the parasitics. Because the capacitance of the PIN diode  
depends on the reverse voltage across it, the reverse  
voltage should be chosen as high as possible.  
It is preferable to connect the cathode of the PIN diode to  
a higher voltage then VCC when such a voltage source is  
available on the board. In this case pin DREF can be left  
unconnected. When a negative supply voltage is available,  
the configuration in Fig.8 can be used. It should be noted  
that in this case the direction of the signal current is  
reversed compared to the Fig.7. Proper filtering of the bias  
voltage for the PIN diode is essential to achieve the  
highest sensitivity level.  
The PIN diode can be connected to the input in two ways  
as shown in Figs 7 and 8. In Fig.7 the PIN diode is  
connected between pins DREF and IPhoto. Pin DREF  
provides an easy bias voltage for the PIN diode. The  
voltage at DREF is derived from VCC by a low-pass filter.  
The low-pass filter consisting of the internal resistors  
R1, R2, C1 and the external capacitor C2 rejects the  
supply voltage noise. The external capacitor C2 should be  
equal or larger then 1 nF for a high PSRR.  
V
V
CC  
CC  
8
8
R2  
R1  
R2  
R1  
125 Ω  
125 Ω  
125 Ω  
125 Ω  
DREF 1  
1
3
DREF  
IPhoto  
C2  
1 nF  
C1  
10 pF  
C1  
10 pF  
I
i
3
IPhoto  
I
i
TZA3043  
TZA3043  
MGU103  
MGU104  
negative supply voltage  
Fig.8 The PIN diode connected between the input  
and a negative supply voltage.  
Fig.7 The PIN diode connected between the input  
and pin DREF.  
2000 Mar 28  
6
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
AGC  
It is disabled for smaller signals. The transimpedance is  
then at its maximum value (8.3 kdifferential).  
The TZA3043 transimpedance amplifier can handle input  
currents from 1 µA to 1.5 mA. This means a dynamic  
range of 63 dB. At low input currents, the transimpedance  
must be high to get enough output voltage, and the noise  
should be low enough to guaranty minimum bit error rate.  
At high input currents however, the transimpedance  
should be low to avoid pulse width distortion. This means  
that the gain of the amplifier has to vary depending on the  
input signal level to handle such a wide dynamic range.  
This is achieved in the TZA3043 by implementing an  
Automatic Gain Control (AGC) loop. The AGC loop  
consists of a peak detector, a hold capacitor and a gain  
control circuit.  
When AGC is active, the feedback resistor of the  
transimpedance amplifier is reduced to keep the output  
voltage constant. The transimpedance is regulated from  
8.3 kat low currents (I < 30 µA) to 1 kat high currents  
(I < 500 µA). Above 500 µA the transimpedance is at its  
minimum and can not be reduced further but the front-end  
remains linear until input currents of 1.5 mA.  
The upper part of Fig.9 shows the output voltages of the  
TZA3043 (OUT and OUTQ) as a function of the DC input  
current. In the lower part, the difference of both voltages is  
shown. It can be seen from the figure that the output  
changes linearly up to 25 µA input current where AGC  
becomes active. From this point on, AGC tries to keep the  
differential output voltage constant around 200 mV for  
medium range input currents (input currents <200 µA).  
The AGC can not regulate any more above 500 µA input  
current and the output voltage rises again with the input  
current.  
The peak amplitude of the signal is detected by the peak  
detector and it is stored on the hold capacitor. The voltage  
over the hold capacitor is compared to a threshold level.  
The threshold level is set to 25 µA (p-p) input current. AGC  
becomes active only for input signals larger than the  
threshold level.  
MGU105  
3.9  
V
o
(V)  
3.7  
V
OUT  
3.5  
3.3  
V
= 5 V  
CC  
V
OUTQ  
3.1  
600  
V
o(dif)  
(1)  
(mV)  
400  
(2)  
(3)  
200  
0
2
3
4
1
10  
10  
10  
10  
I (µA)  
i
Vo(dif) = VOUT VOUTQ  
(1) VCC = 3 V.  
.
(2) VCC = 3.3 V.  
(3) VCC = 5 V.  
Fig.9 AGC characteristics.  
7
2000 Mar 28  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
SYMBOL  
PARAMETER  
MIN.  
0.5  
MAX.  
+6  
UNIT  
VCC  
Vn  
supply voltage  
DC voltage  
V
pin/pad IPhoto  
0.5  
0.5  
0.5  
0.5  
+1  
V
V
V
V
pins/pads OUT and OUTQ  
pad AGC (bare die only)  
pin/pad DREF  
V
CC + 0.5  
CC + 0.5  
V
VCC + 0.5  
In  
DC current  
pin/pad IPhoto  
2.5  
15  
0.2  
2.5  
+2.5  
+15  
+0.2  
+2.5  
300  
mA  
mA  
mA  
mA  
mW  
°C  
pins/pads OUT and OUTQ  
pad AGC (bare die only)  
pin/pad DREF  
Ptot  
Tstg  
Tj  
total power dissipation  
storage temperature  
junction temperature  
ambient temperature  
65  
+150  
150  
°C  
Tamb  
40  
+85  
°C  
HANDLING  
Precautions should be taken to avoid damage through electrostatic discharge. This is particularly important during  
assembly and handling of the bare die. Additional safety can be obtained by bonding the VCC and GND pads first, the  
remaining pads may then be bonded to their external connections in any order.  
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
VALUE  
UNIT  
Rth(j-a)  
thermal resistance from junction to ambient  
160  
K/W  
2000 Mar 28  
8
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
CHARACTERISTICS  
Typical values at Tamb = 25 °C and VCC = 5 V; minimum and maximum values are valid over the entire ambient  
temperature range and supply range; all voltages are measured with respect to ground; unless otherwise specified.  
SYMBOL  
PARAMETER  
supply voltage  
CONDITIONS  
MIN.  
TYP.  
MAX.  
5.5  
UNIT  
VCC  
ICC  
3
5
V
supply current  
AC coupled; RL = 50 Ω  
34  
47  
mA  
mW  
mW  
°C  
Ptot  
total power dissipation  
VCC = 5 V  
170  
112  
259  
169  
+125  
+85  
V
CC = 3.3 V  
Tj  
junction temperature  
ambient temperature  
40  
40  
Tamb  
Rtr  
+25  
°C  
small-signal transresistance of measured differentially;  
the receiver  
AC coupled  
RL = ∞  
13.2  
6.6  
16.6  
8.3  
20  
10  
kΩ  
RL = 50 Ω  
kΩ  
f3dB(h)  
PSRR  
high frequency 3 dB point  
VCC = 5 V; Ci = 0.7 pF  
1000  
850  
1200  
1100  
MHz  
MHz  
V
CC = 3.3 V; Ci = 0.7 pF  
power supply rejection ratio  
measured differentially;  
note 1  
f = 1 to 100 MHz  
f = 1 GHz  
2
µA/V  
µA/V  
66  
Bias voltage: pin DREF  
RDREF resistance between DREF and tested at DC  
VCC  
210  
250  
290  
Input: pin IPhoto  
Vbias(IPhoto) input bias voltage on  
pin IPhoto  
600  
822  
1000  
mV  
Ii(IPhoto)(p-p) input current on pin IPhoto  
(peak-to-peak value)  
VCC = 5 V; note 2  
1500  
1000  
+6  
+6  
28  
+1500  
+1000  
µA  
µA  
VCC = 3.3 V; note 2  
Ri  
small-signal input resistance  
fi = 1 MHz; input current  
<2 µA (p-p)  
In(tot)  
total integrated RMS noise  
current over bandwidth  
referenced to input;  
f = 920 MHz; note 3  
200  
nA  
2000 Mar 28  
9
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
Data outputs: pins OUT and OUTQ  
Vo(cm)  
common mode output voltage AC coupled; RL = 50 Ω  
V
CC 2  
VCC 1.7 VCC 1.4 V  
Vo(se)(p-p)  
single-ended output voltage  
(peak-to-peak value)  
AC coupled; RL = 50 ;  
input current 100 µA (p-p)  
75  
200  
330  
mV  
VOO  
differential output offset  
voltage  
100  
+100  
mV  
Ro  
output resistance  
rise time, fall time  
single-ended; DC tested  
40  
50  
62  
tr, tf  
VCC = 5 V; 20% to 80%;  
285  
430  
ps  
input current <20 µA (p-p)  
VCC = 3.3 V; 20% to 80%;  
input current <20 µA (p-p)  
300  
25  
460  
ps  
Automatic gain control loop: pad AGC  
Ith(AGC)  
AGC threshold current  
referenced to the peak  
input current; tested at  
10 MHz  
µA  
tatt(AGC)  
AGC attack time  
AGC decay time  
5
µs  
tdecay(AGC)  
10  
ms  
Notes  
1. PSRR is defined as the ratio of the equivalent current change at the input (IIPhoto) to a change in supply voltage:  
IIPhoto  
PSRR =  
--------------------  
VCC  
For example, a +10 mV disturbance on VCC at 10 MHz will typically add an extra 20 nA to the photodiode current.  
The external capacitor between pins DREF and GND has a large impact on the PSRR. The specification is valid with  
an external capacitor of 1 nF.  
2. The pulse width distortion (PWD) is <5% over the whole input current range. The PWD is defined as:  
pulse width  
PWD =  
1 × 100% where T is the clock period. The PWD is measured differentially with  
-----------------------------  
T
PRBS pattern of 1023  
.
3. All In(tot) measurements were made with an input capacitance of Ci = 1 pF. This was comprised of 0.5 pF for the  
photodiode itself, with 0.3 pF allowed for the printed-circuit board layout and 0.2 pF intrinsic to the package. Noise  
performance is measured differentially.  
2000 Mar 28  
10  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
TYPICAL PERFORMANCE CHARACTERISTICS  
MGU112  
MGU113  
40  
CC  
(mA)  
38  
34.8  
handbook, halfpage  
handbook, halfpage  
I
I
CC  
(mA)  
34.4  
36  
34.0  
(1)  
(2)  
(3)  
34  
33.6  
33.2  
32  
30  
28  
40  
32.8  
3
0
40  
80  
120  
4
5
6
T (°C)  
V
(V)  
j
CC  
(1) VCC = 5 V.  
(2) VCC = 3.3 V.  
(3) VCC = 3 V.  
Fig.10 Supply current as a function of the junction  
temperature.  
Fig.11 Supply current as a function of the supply  
voltage.  
MGU114  
MGU115  
825  
920  
handbook, halfpage  
handbook, halfpage  
V
i
(mV)  
V
i
(mV)  
823  
840  
(1)  
(3)  
(2)  
821  
819  
817  
760  
680  
3
4
5
6
40  
0
40  
80  
120  
V
(V)  
T (°C)  
CC  
j
(1) VCC = 5 V.  
(2) VCC = 3.3 V.  
(3) VCC = 3 V.  
Fig.12 Input voltage as a function of the supply  
voltage.  
Fig.13 Input voltage as a function of the junction  
temperature.  
2000 Mar 28  
11  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
MGU116  
MGU117  
1.68  
1.85  
handbook, halfpage  
handbook, halfpage  
V
o(cm)  
(V)  
V
o(cm)  
(V)  
1.675  
(1)  
1.75  
(1)  
(2)  
1.67  
1.665  
1.65  
(2)  
1.66  
1.655  
1.55  
3
4
5
6
40  
0
40  
80  
120  
V
(V)  
T (°C)  
j
CC  
VCC = 5 V.  
(1)  
(2)  
V
CC VOUT.  
(1)  
(2)  
V
CC VOUT  
.
VCC VOUTQ  
.
VCC VOUTQ  
.
Fig.14 Common mode voltage at the output as a  
function of the supply voltage.  
Fig.15 Common mode voltage at the output as a  
function of the junction temperature.  
2000 Mar 28  
12  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
APPLICATION AND TEST INFORMATION  
10 µH  
V
P
22 nF  
680 nF  
V
CC  
8
DREF  
IPhoto  
1
3
Z
Z
= 50 Ω  
= 50 Ω  
o
o
100 nF  
100 nF  
(1)  
OUTQ  
7
TZA3043T  
(1)  
OUT  
6
R3  
50 Ω  
R4  
50 Ω  
1 nF  
2
4
5
GND  
GND  
GND  
MGU101  
(1) For TZA3043BT pin 7 is OUT and pin 6 is OUTQ.  
Fig.16 Application diagram.  
2000 Mar 28  
13  
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  g
V
CC  
680 nF  
(1)  
(1)  
(1)  
22 nF  
100 nF  
100 nF  
180 kΩ  
V
RSET  
CF  
V
V
CCD  
V
CC  
ref  
CCA  
8
16  
7
15  
14  
6
DREF  
IPhoto  
1.5 nF  
(2)  
OUTQ  
DIN  
DOUT  
1
4
7
6
13  
100  
data out  
TZA3043T  
4 pF  
TZA3044  
1 nF  
1.5 nF  
(2)  
OUT  
DINQ  
DOUTQ  
5
12  
3
2
noise filter:  
1-pole, 800 MHz  
1
AGND SUB JAM  
4
5
3
8
9
10  
STQ ST  
11  
DGND  
GND GND GND  
level-detect  
status  
1 kΩ  
50 Ω  
50 Ω  
V
2 V  
CC  
MGU102  
(1) Ferrite bead e.g. Murata BLM10A700S.  
(2) For TZA3043BT pin 7 is OUT and pin 6 is OUTQ.  
Fig.17 Gigabit Ethernet/Fibre Channel receiver using the TZA3043T and TZA3044.  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
Test circuits  
Z
= s .(R + Z ) . 2  
21  
R = 470 , Z = 28 Ω  
i
T
i
NETWORK ANALYZER  
S-PARAMETER TEST SET  
PORT 1  
PORT 2  
Z
= 50 Ω  
Z
= 50 Ω  
o
o
V
CC  
23  
2
-1 PRBS  
100 nF  
100 nF  
SAMPLING  
OSCILLOSCOPE/  
TDR/TDT  
OUT  
PATTERN  
GENERATOR  
10 nF  
470 Ω  
IPhoto  
1
2
TR  
OUTQ  
C
C
D
D
TR  
C IN  
51 Ω  
TZA3043  
OM5803  
Z
= 50 Ω  
o
MGU106  
Fig.18 Electrical test circuit.  
2000 Mar 28  
15  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
LIGHTWAVE MULTIMETER  
9.54 dBm  
OPTICAL  
INPUT  
ERROR DETECTOR  
Data Clock  
OPTICAL ATTENUATOR  
0 dBm/1300  
in  
in  
IN  
OUT  
V
CC  
90% 10%  
BLM  
22 nF  
23  
2
-1 PRBS  
100 nF  
DREF  
IPhoto  
SAMPLING  
OSCILLOSCOPE/  
TDR/TDT  
PATTERN  
GENERATOR  
OUT  
LASER DRIVER  
DIN  
TR  
OUTQ  
C
C
D
D
TR  
C IN  
1
2
PIN  
10 nF  
TZA3043 100 nF  
DINQ  
Laser  
TZA3041  
OM5802  
OM5804  
Z
= 50 Ω  
o
1.24416 GHz  
MGU107  
Fig.19 Optical test circuit.  
2000 Mar 28  
16  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
MGU108  
Fig.20 Differential output with 25 dBm optical input power [input current of 5.17 µA (p-p)].  
MGU109  
Fig.21 Differential output with 15 dBm optical input power [input current of 51.7 µA (p-p)].  
2000 Mar 28  
17  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
MGU110  
Fig.22 Differential output with 5 dBm optical input power [input current of 517 µA (p-p)].  
MGU111  
Fig.23 Differential output with 2 dBm optical input power [input current of 1030 µA (p-p)].  
2000 Mar 28  
18  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
BONDING PAD LOCATIONS  
COORDINATES(1)  
y
SYMBOL  
PAD TZA3043U  
PAD TZA3043BU  
x
DREF  
GND  
GND  
1
2
1
2
95  
95  
881  
618  
473  
285  
95  
3
3
95  
IPhoto  
GND  
GND  
GND  
GND  
OUT  
OUTQ  
VCC  
4
4
95  
5
5
215  
360  
549  
691  
785  
785  
567  
424  
259  
6
6
95  
7
7
95  
8
8
95  
9
10  
9
501  
641  
1055  
1055  
1055  
10  
11  
12  
13  
11  
12  
13  
VCC  
AGC  
Note  
1. All coordinates are referenced, in µm, to the bottom left-hand corner of the die.  
11  
11  
13  
12  
13  
12  
1
1
DREF  
DREF  
10  
9
10  
9
OUTQ  
OUT  
OUT  
1300  
µm  
1300  
µm  
TZA3043U  
TZA3043BU  
GND  
GND  
2
3
GND  
GND  
2
3
OUTQ  
4
4
IPhoto  
IPhoto  
5
6
7
8
5
6
7
8
x
x
0
0
0
0
y
y
1030  
µm  
1030  
µm  
MGU099  
MGU100  
Fig.24 Bonding pad locations of the TZA3043U.  
Fig.25 Bonding pad locations of the TZA3043BU.  
2000 Mar 28  
19  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
Physical characteristics of the bare die  
PARAMETER  
VALUE  
Glass passivation  
Bonding pad dimension  
Metallization  
Thickness  
2.1 µm PSG (PhosphoSilicate Glass) on top of 0.65 µm oxynitride  
minimum dimension of exposed metallization is 90 × 90 µm (pad size = 100 × 100 µm)  
1.22 µm W/AlCu/TiW  
380 µm nominal  
Size  
1.03 × 1.30 mm (1.34 mm2)  
Backing  
silicon; electrically connected to GND potential through substrate contacts  
Attach temperature  
Attach time  
<440 °C; recommended die attach is glue  
<15 s  
2000 Mar 28  
20  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
PACKAGE OUTLINE  
SO8: plastic small outline package; 8 leads; body width 3.9 mm  
SOT96-1  
D
E
A
X
c
y
H
v
M
A
E
Z
5
8
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
4
e
w
M
detail X  
b
p
0
2.5  
5 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(2)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
5.0  
4.8  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.27  
0.050  
1.05  
0.041  
1.75  
0.25  
0.01  
0.25  
0.01  
0.25  
0.1  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.20  
0.014 0.0075 0.19  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches 0.069  
0.01 0.004  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
97-05-22  
99-12-27  
SOT96-1  
076E03  
MS-012  
2000 Mar 28  
21  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
SOLDERING  
If wave soldering is used the following conditions must be  
observed for optimal results:  
Introduction to soldering surface mount packages  
Use a double-wave soldering method comprising a  
turbulent wave with high upward pressure followed by a  
smooth laminar wave.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “Data Handbook IC26; Integrated Circuit Packages”  
(document order number 9398 652 90011).  
For packages with leads on two sides and a pitch (e):  
– larger than or equal to 1.27 mm, the footprint  
longitudinal axis is preferred to be parallel to the  
transport direction of the printed-circuit board;  
There is no soldering method that is ideal for all surface  
mount IC packages. Wave soldering is not always suitable  
for surface mount ICs, or for printed-circuit boards with  
high population densities. In these situations reflow  
soldering is often used.  
– smaller than 1.27 mm, the footprint longitudinal axis  
must be parallel to the transport direction of the  
printed-circuit board.  
Reflow soldering  
The footprint must incorporate solder thieves at the  
downstream end.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
For packages with leads on four sides, the footprint must  
be placed at a 45° angle to the transport direction of the  
printed-circuit board. The footprint must incorporate  
solder thieves downstream and at the side corners.  
Several methods exist for reflowing; for example,  
infrared/convection heating in a conveyor type oven.  
Throughput times (preheating, soldering and cooling) vary  
between 100 and 200 seconds depending on heating  
method.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
Typical reflow peak temperatures range from  
215 to 250 °C. The top-surface temperature of the  
packages should preferable be kept below 230 °C.  
Typical dwell time is 4 seconds at 250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
Wave soldering  
Manual soldering  
Conventional single wave soldering is not recommended  
for surface mount devices (SMDs) or printed-circuit boards  
with a high component density, as solder bridging and  
non-wetting can present major problems.  
Fix the component by first soldering two  
diagonally-opposite end leads. Use a low voltage (24 V or  
less) soldering iron applied to the flat part of the lead.  
Contact time must be limited to 10 seconds at up to  
300 °C.  
To overcome these problems the double-wave soldering  
method was specifically developed.  
When using a dedicated tool, all other leads can be  
soldered in one operation within 2 to 5 seconds between  
270 and 320 °C.  
2000 Mar 28  
22  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
Suitability of surface mount IC packages for wave and reflow soldering methods  
SOLDERING METHOD  
WAVE  
REFLOW(1)  
not suitable suitable  
PACKAGE  
BGA, LFBGA, SQFP, TFBGA  
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS  
PLCC(3), SO, SOJ  
not suitable(2)  
suitable  
suitable  
suitable  
LQFP, QFP, TQFP  
not recommended(3)(4) suitable  
not recommended(5)  
suitable  
SSOP, TSSOP, VSO  
Notes  
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum  
temperature (with respect to time) and body size of the package, there is a risk that internal or external package  
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the  
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.  
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink  
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).  
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.  
The package footprint must incorporate solder thieves downstream and at the side corners.  
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;  
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.  
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is  
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.  
2000 Mar 28  
23  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
DATA SHEET STATUS  
PRODUCT  
DATA SHEET STATUS  
STATUS  
DEFINITIONS (1)  
Objective specification  
Development This data sheet contains the design target or goal specifications for  
product development. Specification may change in any manner without  
notice.  
Preliminary specification Qualification  
This data sheet contains preliminary data, and supplementary data will be  
published at a later date. Philips Semiconductors reserves the right to  
make changes at any time without notice in order to improve design and  
supply the best possible product.  
Product specification  
Production  
This data sheet contains final specifications. Philips Semiconductors  
reserves the right to make changes at any time without notice in order to  
improve design and supply the best possible product.  
Note  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
DEFINITIONS  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes, without notice, in the  
products, including circuits, standard cells, and/or  
software, described or contained herein in order to  
improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for  
the use of any of these products, conveys no licence or title  
under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that  
these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified.  
Short-form specification  
The data in a short-form  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
BARE DIE DISCLAIMER  
All die are tested and are guaranteed to comply with all  
data sheet limits up to the point of wafer sawing for a  
period of ninety (90) days from the date of Philips' delivery.  
If there are data sheet limits not guaranteed, these will be  
separately indicated in the data sheet. There are no post  
packing tests performed on individual die or wafer. Philips  
Semiconductors has no control of third party procedures in  
the sawing, handling, packing or assembly of the die.  
Accordingly, Philips Semiconductors assumes no liability  
for device functionality or performance of the die or  
systems after third party sawing, handling, packing or  
assembly of the die. It is the responsibility of the customer  
to test and qualify their application in which the die is used.  
Application information  
Applications that are  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
DISCLAIMERS  
Life support applications  
These products are not  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
2000 Mar 28  
24  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
NOTES  
2000 Mar 28  
25  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
NOTES  
2000 Mar 28  
26  
Philips Semiconductors  
Product specification  
Gigabit Ethernet/Fibre Channel  
transimpedance amplifier  
TZA3043; TZA3043B  
NOTES  
2000 Mar 28  
27  
Philips Semiconductors – a worldwide company  
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Slovakia: see Austria  
Slovenia: see Italy  
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International Marketing & Sales Communications, Building BE-p, P.O. Box 218,  
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825  
69  
SCA  
© Philips Electronics N.V. 2000  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
403510/200/02/pp28  
Date of release: 2000 Mar 28  
Document order number: 9397 750 06817  

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NXP

TZA3044B

SDH/SONET STM4/OC12 and 1.25 Gbits/s Gigabit Ethernet postamplifiers
NXP

TZA3044BT

SDH/SONET STM4/OC12 and 1.25 Gbits/s Gigabit Ethernet postamplifiers
NXP

TZA3044BT/C2

IC SPECIALTY TELECOM CIRCUIT, PDSO16, PLASTIC, SOT-109, SO-16, Telecom IC:Other
NXP

TZA3044BTT

SDH/SONET STM4/OC12 and 1.25 Gbits/s Gigabit Ethernet postamplifiers
NXP