PL0300 [PICSEMI]
Low Noise, Fixed Output Voltage 300mA LDO Regulator; 低噪声，固定输出电压300毫安LDO稳压器
| 型号： | PL0300 |
| 厂家： | 
POWER IC LTD. |
| 描述： | Low Noise, Fixed Output Voltage 300mA LDO Regulator |
| 文件： | 总12页 (文件大小：334K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PL0300
Low Noise, Fixed Output Voltage
300mA LDO Regulator
FEATURES
DESCRIPTION
Guaranteed 300mA output
The PL0300/P is a CMOS low dropout linear
regulator with ultra-low-noise output, very low
dropout voltage and very low ground current.
Ultra low output noise
Output voltage accuracy: ±2%
Low ground current: 90µA
The PL0300/P operates from a 2.5V to 5.5V input
voltage range and delivers up to 300mA, with low
dropout of 380mV at 300mA. Other features of the
PL0300/P include short-circuit protection and
thermal-shutdown protection.
Very low dropout: 380mV @ 300mA
Zero shutdown supply current
TTL-logic-controlled enable input
Thermal and current limit protections
Compatible with low ESR capacitor to
achieve ultra low droop load transient
response
Ultra fast line transient response
Low profile 5-lead SOT-25 package
Fixed options from 1.5V to 5.0V with
100mV steps
The PL0300/P is designed especially for battery-
powered portable devices. Its reference bypass pin
improves low noise performance which makes it
ideal for noise-sensitive RF and personal
communication applications. Other key application
areas for the PL0300/P include handheld
computers, PCMCIA cards and WLAN cards.
APPLICATIONS
The PL0300/P is available in small 5-lead SOT-25
package.
Cellular and cordless phones
PDAs
Battery powered portable equipment
Notebook computers
PC peripherals
Wireless LAN cards
Bluetooth devices
TYPICAL APPLICATION CIRCUIT
1
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PL0300
PIN CONFIGURATION
PIN DESIGNATOR
Name
IN
Pin
1
Type
Supply
Ground
Function
Supply voltage. 2.5V ~ 5.5V
Ground pin
GND
2
Enable/Shutdown. TTL and CMOS compatible input. Logic ‘H’: enable,
logic ‘L’: shutdown
EN
3
Logic input
Reference voltage bypass pin. Connect 0.01µF ≤ CBYP ≤ 0.1µF to GND to
reduce output noise. May be left open
BYP/ PGD
OUT
4 Bypass/PGood
Analog output
5
Regulator output
PIN DESCRIPTION
PL0300
Name
IN
Pin
1
Type
Supply
Function
Supply voltage. 2.5 ~ 5.5V
GND
EN
BYP
OUT
2
3
4
5
Ground
Logic input
Bypass
Ground
TTL and CMOS compatible input. Logic ‘H’: enable, logic ‘L’: shutdown
Noise filtering pin
Analog output
Regulator output
PL0300P
Name
IN
Pin
1
Type
Supply
Function
Supply voltage. 2.5 ~ 5.5V
GND
EN
2
3
Ground
Logic input
Ground
TTL and CMOS compatible input. Logic ‘H’: enable, logic ‘L’: shutdown
Monitors the output voltage and signals an error condition when the output
voltage drops 10% below its nominal value
Regulator output
PGD
OUT
4
5
Power good
Analog output
2
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PL0300
BLOCK DIAGRAM
3
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PL0300
ABSOLUTE MAXIMUM RATINGS
Symbol
VIN
Parameter
Value
-0.3 to +6.0
-0.3 to +6.0
Internally limited
-65 to +150
+235
Unit
V
V
W
°C
°C/W
°C
°C
DC Supply Voltage at Pin 1
Enable Input Voltage at Pin 3
Continuous Power Dissipation
Storage Temperature Range
VEN
PD
TSTG
RθJA
TJ,MAX
TL
Thermal Resistance, Junction-To-Air
Operating Junction Temperature
Lead Temperature (Soldering, 5sec)
ESD Capability, HBM Model
-40 to +125
+260
ESD
2.0
KV
ELECTRICAL CHARACTERISTICS
( All specifications are at TA = 25°C. VIN = VOUT ( NOMINAL ) + 1V OR 2.5V whichever is greater, VEN = VIN, CIN =
COUT = 1µF, unless otherwise specified.)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
VIN
Supply Voltage
2.5
-2.0
-3.0
5.5
V
IO = 1mA to 300mA,
TA = +25°C
+2.0
+3.0
%
%
VOUT
VDP
Output Voltage Accuracy
Dropout Voltage (Note 1)
IO = 1mA to 300mA,
TA = -40°C to 85°C
ILOAD = 300mA
ILOAD = 100mA
Continuous
380
130
mV
mV
mA RMS
mA
IMAX
ILIM
IQ
Maximum Output Current
Short Circuit Current Limit
Shutdown Quiescent Current
300
VOUT < 90% of V NOM
VEN < 0.4V
650
0.05
0.5
µA
IG
Ground Pin Current
ILOAD = 1mA
VIN = VOUT + 1V (or 2.5V,
90
140
µA
%/V
dB
ΔVLINE
Line Regulation dVOUT/dVIN whichever is greater) to 5.5V, -0.15
0.15
IO = 1 mA
f = 100Hz, COUT= 10µF,
CBYP = 10nF,
ILOAD = 1mA
COUT = 10µF, CBYP = 10nF,
f = 10Hz to 100KHz
65
70
PSRR
eNO
Ripple Rejection
Output Voltage Noise
µVRMS
4
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PL0300
OVER TEMPERATURE PROTECTION
Symbol
Parameter
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Test Conditions
Test Conditions
Min
Typ
165
15
Max
Max
Unit
°C
°C
ENABLE INPUT
Symbol
Parameter
Min
1.6
Typ
Unit
V
V
µA
µS
VIH
VIL
IEN
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
0.4
0.5
-0.5
Shutdown Exit Delay
VEN = 0 to 5.5V, CBYP
10nF, COUT = 1µF
=
25
Shutdown Discharge Resistance
900
Ω
Note 1: The Dropout Voltage is defined as VIN - VOUT, when VIN = VOUT ( NOM )
5
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PL0300
TYPICAL OPERATING CHARACTERSTICS
(All specifications are at TA = 25°C , unless otherwise specified)
6
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PL0300
TYPICAL OPERATING CHARACTERSTICS ( continued )
(All specifications are at TA = 25°C , unless otherwise specified)
7
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PL0300
TYPICAL OPERATING CHARACTERSTICS ( continued )
(All specifications are at TA = 25°C , unless otherwise specified)
8
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PL0300
OPERATION
The PL0300/P is an ultra-low-noise, low-dropout, low-
quiescent current linear regulator designed for space-
restricted applications. It is available with preset output
voltages ranging from 1.5V to 5.0V in 100mV increments.
It can supply loads of up to 300mA. As shown in the
Current Limit
The PL0300/P includes a current limiter. It monitors the
output current and controls the pass transistor’s gate
voltage to limit the output current under 550mA (typical).
The output can be shorted to ground for an indefinite
amount of time without damaging the part.
Block Diagram, the PL0300/P consists of
a highly
accurate band gap core, noise bypass circuit, error
amplifier, P-channel pass transistor and an internal
feedback voltage divider. The PL0300/P allows for an
adjustable output with an external feedback network. The
1.0V band gap reference is connected to the error
amplifier’s inverting input. The error amplifier compares
this reference with the feedback voltage and amplifies
the difference. If the feedback voltage is lower than the
reference voltage, the pass transistor gate is pulled low.
This allows more current to pass to the output and
increases the output voltage. If the feedback voltage is
too high, the pass transistor gate is pulled high, allowing
less current to pass to the output. The output voltage is
fed back through an internal resistor voltage-divider
connected to the OUT pin. An external bypass capacitor
connected to BYP (PL0300/P-BYP) reduces the noise at
the output. Additional blocks include a current limiter,
over temperature protection and shutdown logic.
The short circuit current limit is increased to
approximately 650mA (typical) when the output voltage
is within 10% of the nominal output, thus improving the
performance of large pulsating loads. The in-regulation
current limit option provides the user to overload the
device, maintaining a continuous 300mA (RMS) load.
Enable Input
The PL0300/P features an active-high Enable input (EN)
pin that allows on/off control of the regulator. The
PL0300/P bias current reduces to ZERO (leakage current)
when it goes into shutdown. The Enable input is
TTL/CMOS compatible for simple logic interfacing. When
EN is ‘H,’ the output voltage startup rising time is typically
25µs. Connect EN pin to IN pin for normal operation.
Power Good Flag (Applicable for PL0300P)
The PL0300/P features a Power Good flag (PGD), which
monitors the output voltage and signals an error
condition when the output voltage drops 10% below its
nominal value.
Internal P-Channel Pass Transistor
The PL0300/P features a 1Ω (typical) P-channel MOSFET
pass transistor. This provides several advantages over
similar designs using a PNP pass transistor, including
longer battery life. The P-channel MOSFET requires no
base drive, which considerably reduces the quiescent
current. PNP-based regulators waste considerable current
in dropout when the pass transistor saturates. They also
use high base-drive current under heavy loads.
Under Voltage Lockout
When the input supply goes too low (typically below
2.0V), the PL0300/P produces an internal UVLO (Under
Voltage Lockout) signal that generates a fault signal and
shuts down the chip. This mechanism protects the chip
from producing false logic due to low input supply.
The PL0300/P does not suffer from these problems and
consumes only 90μA of quiescent current.
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PL0300
APPLICATION INFORMATION
Capacitor Selection And Regulator Stability
Use a 1.0μF capacitor on the PL0300/P input and a 1.0μF
capacitor on the output. Large input capacitor values and
lower ESR provide better noise rejection and line-
transient response.
Quick Charging Mode
The PL0300/P has a quick charge block to get the
reference up very quickly by charging the BYP capacitor
with very high current when the chip comes out of shut
down. This quick charge block stops charging the BYP
capacitor when the reference reaches 95% of its nominal
value and then the chip switches out of quick charging
mode to normal operating mode.
Reduce output noise and improve load-transient
response, stability and power-supply rejection by using
large output capacitors. Note that some ceramic
dielectrics exhibit large capacitance and ESR variation
with temperature. With dielectrics such as Z5U and Y5V,
it may be necessary to use a 2.2μF or larger output
capacitor to ensure stability at temperatures below -10°C.
With X7R or X5R dielectrics, 1μF is sufficient at all
operating temperatures.
Over Temperature Protection
Over temperature protection limits the total power
dissipation in the PL0300/P. When the junction
temperature exceeds TJ = +165°C, the thermal sensor
signals the shutdown logic and turns off the pass
transistor. The thermal sensor turns the pass transistor
on again after the IC’s junction temperature drops by
15°C, resulting in a pulsed output during continuous
thermal-overload conditions.
Use a 0.01μF bypass capacitor at BYP (PL0300/P-BYP) for
low-output voltage noise. The leakage current going into
the BYP pin should be less than 10nA.
Thermal-overload protection is designed to protect the
PL0300/P in the event of a fault condition. For continuous
operation, do not exceed the absolute maximum junction
temperature rating of TJ = +150°C.
Noise, PSRR and Transient Response
The PL0300/P is designed to deliver ultra-low noise and
high PSRR, as well as low dropout and low quiescent
currents in battery-powered systems. The PL0300/P PSRR
is 68dB at 100Hz and 60dB at 10KHz.
When operating from sources other than batteries,
improved supply-noise rejection and transient response
can be achieved by increasing the values of the input and
output bypass capacitors and through passive filtering
techniques.
Operating Region and Power Dissipation
The PL0300/P’s maximum power dissipation depends on
(1) the thermal resistance of the case and circuit board,
(2) the temperature difference between the die junction
and ambient and (3) the rate of airflow. The power
dissipation across the device is:
P = IOUT × (VIN – VOUT
)
Dropout Voltage
A regulator’s minimum dropout voltage determines the
lowest usable supply voltage. In battery-powered
systems, this determines the useful end-of-life battery
voltage. Because the PL0300/P uses a P-channel MOSFET
pass transistor, its dropout voltage is a function of drain-
to-source on resistance (RDSON) multiplied by the load
current.
The maximum power dissipation is:
PMAX = (TJ – TA)/(θJC + θCA
)
Where (TJ – TA) is the temperature difference between
the PL0300/P die junction and the surrounding air, θJC is
the thermal resistance of the package and θCA is the
thermal resistance through the PC board, copper traces
and other materials to the surrounding air.
The GND pin of the PL0300/P performs the dual function
of providing an electrical connection to ground and
channeling heat away. Connect the GND pin to ground
using a large pad or ground plane.
Noise Reduction
For the PL0300/P, an external 0.01μF bypass capacitor
between BYP and GND with innovative noise bypass
scheme reduces the output noises dramatically, exhibiting
70μV(RMS) of output voltage noise with CBYP = 0.01μF
and COUT = 10μF.
10
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PL0300
PACKAGE INFORMATION
5-PIN SOT-25 OUTLINE DIMENSION
D
Detail A
b
5
4
3
c
1
e
e1
θ
1
L
θ
L1
θ
1
Detail A
Dimension:
Millimeter
Typ
Inch
Symbol
Min
Max
1.45
0.15
1.30
0.50
0.22
Min
Typ
Max
A
A1
A2
b
0.057
0.006
0.051
0.020
0.009
0.90
0.30
0.08
1.15
0.036
0.011
0.003
0.045
c
D
2.90
2.80
1.60
0.95
1.90
0.45
0.60
0.25
0.114
0.110
0.063
0.037
0.075
0.018
0.024
0.010
E
E1
e
e1
L
L1
L2
R
R1
θ˚
θ1˚
0.30
0.60
0.020
0.024
0.10
0.10
0˚
0.004
0.004
0˚
0.25
8˚
15˚
0.010
8˚
15˚
4˚
10˚
4˚
10˚
5˚
5˚
11
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PL0300
DISCLAIMERS
LIFE SUPPORT
Power IC’s products are NOT designed to be used as components in devices intended to support or sustain
human life. The use of Power IC’s products in components intended for surgical implants into the body or other
applications, in which failure of Power IC’s products could create a situation where personal death or injury
may occur, is NOT authorized without the express written approval of Power IC’s Chief Executive Officer.
Power IC will NOT be held liable for any damages or claims resulting from the use of its products in medical
applications.
MILITARY
Power IC’s products are NOT designed for use in military applications. The use of Power IC’s products in
military applications is NOT authorized without the express written approval of Power IC’s Chief Executive
Officer. Power IC will NOT be held liable for any damages or claims resulting from the use of its products in
military applications.
RIGHT TO MAKE CHANGES
Power IC reserves the right to change this document and/or this product without notice. Customers are
advised to consult their Power IC sales representative before ordering.
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