PLL501-03SM [PLL]
VCXO Clock Generator IC; VCXO时钟发生器IC
| 型号： | PLL501-03SM |
| 厂家： | 
PHASELINK CORPORATION |
| 描述： | VCXO Clock Generator IC |
| 文件： | 总6页 (文件大小：95K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PLL501-01/-03
VCXO Clock Generator IC
PIN CONFIGURATION
FEATURES
·
·
Integrated voltage-controlled crystal oscillator
XIN
XOUT
GND
VDD
CLK
1
2
3
4
8
7
6
5
circuitry (VCXO) (pull range 200ppm minimum).
Ideal for ADSL (35.328MHz) and Set-Top Box
and multimedia (27MHz) applications.
VCXO tuning range: 0-3.3V.
Uses inexpensive fundamental-mode parallel
resonant crystals (from 10 to 20MHz).
Integrated phase-locked loop (PLL) provides
pullable output frequency at 2x (PLL501-01) and
4x (PLL501-03) crystal frequency.
VDD
VIN
·
·
GND
·
Table 1: Crystal / Output Frequencies
·
·
·
3.3V supply voltage.
Small circuit board footprint (8-pin 0.150’’ SOIC).
12mA output drives capability at TTL level.
DEVICE
PLL501-01
PLL501-03
FXIN (MHz)
10 - 20
CLK (MHz)
2 x FXIN
10 - 15
4 x FXIN
DESCRIPTIONS
Note: Contact PhaseLink for custom PLL Frequencies
The PLL501-01 and PLL501-03 are monolithic low
jitter, high performance CMOS VCXO chips. They
allow the control of the output frequency with an
input voltage (VIN), using a low cost crystal.
While the PLL501-03 provides a pullable output
clock 4 times the input crystal frequency, the
PLL501-01 provides a pullable output clock 2x the
input crystal frequency. This makes the PLL501-01
ideal for 35.328MHz ADSL applications (using
17.664MHz crystal) and for 27MHz Set-Top Box /
multimedia applications (with a 13.5MHz crystal).
BLOCK DIAGRAM
XIN
Output
Buffer
PLL
VCXO
CLK
XOUT
VIN
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 05/10/01 Page 1
PLL501-01/-03
VCXO Clock Generator IC
PIN DESCRIPTIONS
Name
Number
Type
Description
XIN
VDD
VIN
1
2
3
4
5
6
7
8
I
Crystal input connection (parallel resonant crystal, CL = 10pF).
3.3V Power Supply.
P
I
Voltage Input for VCXO Frequency Control.
Ground for PLL Core.
GND
CLK
P
O
P
P
O
Clock Output.
VDD
GND
XOUT
3.3V Power Supply.
Ground.
Crystal connection.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 05/10/01 Page 2
PLL501-01/-03
VCXO Clock Generator IC
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
PARAMETERS
SYMBOL
MIN.
MAX.
UNITS
Supply Voltage
7
V
VDD
VI
Input Voltage, dc
V
VSS-0.5
VSS-0.5
-65
VDD+0.5
VDD+0.5
150
Output Voltage, dc
V
VO
TS
TA
TJ
Storage Temperature
°C
°C
°C
°C
kV
Ambient Operating Temperature
Junction Temperature
0
70
125
Lead Temperature (soldering, 10s)
Input Static Discharge Voltage Protection
260
2
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other
conditions above the operational limits noted in this specification is not implied.
2. DC Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
FXIN = 10 - 20MHz
Ouput load of 10pF
Supply Current, Dynamic, with
Loaded Outputs
IDD
20
mA
3.13
2.4
Operating Voltage
Output High Voltage
Output Low Voltage
3.47
0.4
V
V
V
VDD
VOH
VOL
IOH = -12mA
ILO = 12mA
Output High Voltage at CMOS
level
VOHC
IDD
IOH = -4mA
No Load
VDD– 0.4
V
Operating Supply Current
Short Circuit Current
7
mA
mA
V
±50
0
VIN, VCXO Control Voltage
3.3
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 05/10/01 Page 3
PLL501-01/-03
VCXO Clock Generator IC
3. AC Electrical Specifications
PARAMETERS
SYMBOL
CONDITIONS
PLL501-01
MIN.
TYP.
MAX.
UNITS
10
10
20
15
Input Crystal Frequency
MHz
PLL501-03
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Max Absolute Jitter
tr
tf
0.8V ~ 2.0V
2.0V ~ 0.8V
Measured @ 1.4V
Short Term
1.5
1.5
55
ns
ns
%
45
50
100
±50
ps
mA
Short Circuit Current
4. Voltage Control Crystal Oscillator
PARAMETERS
PLL Stabilization Time *
VCXO Stabilization Time *
SYMBOL
CONDITIONS
From VCXO stable
From power valid
MIN.
TYP.
MAX.
UNITS
500
10
ms
TPLLSTB
ms
TVCXOSTB
Output Frequency Synthesis
Error
(Unless otherwise noted in
Frequency Table)
ppm
±30
FXIN = 10 - 20MHz;
VCXO Tuning Range
200
ppm
XTAL C0/C1 < 250;
CL=10pF
CLK output pullability
ppm
±100
0V£VIN£3.3V
VCXO Tuning Characteristic
100
ppm/V
Note: Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits.
5. Crystal Specifications
PARAMETERS
SYMBOL
CONDITIONS
MIN.
TYP.
MAX.
UNITS
20
(PLL501-01)
15
Crystal Resonator Frequency
Parallel Fundamental Mode
10
MHz
FXIN
(PLL501-03)
Crystal Loading Capacitance
Rating
10
pF
CL
(xtal)
AT cut
AT cut
Crystal Pullability
250
30
-
C0/C1 (xtal)
RE
Recommended ESR
W
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 05/10/01 Page 4
PLL501-01/-03
VCXO Clock Generator IC
6. External Components and Layout Recommendations
The PLL501-01/-03 requires a minimum number of external components for proper operation. A standard low
frequency decoupling capacitor of 4.7mF or more should be used between VDD and GND (pin 2 and pin 4, as well
as pin 6 and pin 7). Additionally, higher frequency decoupling capacitors of 0.1mF are required between VDD and
GND (between pin 2 and 4, and between pin 6 and 7). These higher frequency decoupling capacitors must be
connected as close to the PLL501-01/-03 chip as possible, and preferably directly next to the PLL501-01/-03 pins.
A series termination resistor of 33W may be used for the clock output.
The input crystal must be connected as close to the chip as possible, and preferably directly next to the PLL501-
01/-03 pins. If a crystal with CL higher than 10pF is used, it will requires additional loading capacitors externally to
complement the internal 10pF of the PLL501-01/-03: one between each crystal electrode and GND, as close to
the crystal as possible, and preferably directly next to the crystal electrodes. Consult PhaseLink for recommended
suppliers.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 05/10/01 Page 5
PLL501-01/-03
VCXO Clock Generator IC
PACKAGE INFORMATION
8 PIN Narrow SOIC ( mm )
SOIC
Symbol
Min.
Max.
E
H
A
A1
B
1.55
0.15
0.35
0.19
4.80
3.81
5.84
0.41
1.73
0.18
0.49
0.25
4.98
3.99
6.20
0.89
D
C
D
E
H
L
A
A
1
e
1.27 BSC
C
L
B
e
ORDERING INFORMATION
For part ordering, please contact our Sales Department:
47745 Fremont Blvd., Fremont, CA 94538, USA
Tel: (510) 492-0990 Fax: (510) 492-0991
PART NUMBER
The order number for this device is a combination of the following:
Device number, Package type and Operating temperature range
PLL501-0x S C
TEMPERATURATRE
C=COMMERCIAL
M=MILITARY
PART NUMBER
I=INDUSTRAL
PACKAGE TYPE
S=SOIC
PhaseLink Corporation, reserves the right to make changes in its products or specifications, or both at any time without notice. The information
furnished by Phaselink is believed to be accurate and reliable. However, PhaseLink makes no guarantee or warranty concerning the accuracy of said
information and shall not be responsible for any loss or damage of whatever nature resulting from the use of, or reliance upon this product.
LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the
express written approval of the President of PhaseLink Corporation.
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 05/10/01 Page 6
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