TISP4265H4BJ [POINN]
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS; 双向晶闸管过电压保护
| 型号： | TISP4265H4BJ |
| 厂家： | 
POWER INNOVATIONS LTD |
| 描述： | BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS |
| 文件： | 总14页 (文件大小：291K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
Copyright © 1999, Power Innovations Limited, UK
NOVEMBER 1997 - REVISED MARCH 1999
HIGH HOLDING CURRENT 100 A 10/1000 OVERVOLTAGE PROTECTORS
●
●
●
8 kV 10/700, 200 A 5/310 ITU-T K20/21 rating
High Holding Current . . . . . . . . . 225 mA min.
SMBJ PACKAGE
(TOP VIEW)
Ion-Implanted Breakdown Region
Precise and Stable Voltage
1
2
T(A)
R(B)
Low Voltage Overshoot under Surge
MDXXBG
V
V
(BO)
DRM
DEVICE
MINIMUM MAXIMUM
device symbol
V
V
‘4165
‘4180
‘4200
‘4265
‘4300
‘4360
135
145
155
200
230
270
165
180
200
265
300
360
T
SD4XAA
R
●
Rated for International Surge Wave Shapes
Terminals T and R correspond to the
alternative line designators of A and B
I
TSP
WAVE SHAPE
STANDARD
A
2/10 µs
8/20 µs
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
500
300
250
200
160
100
10/160 µs
10/700 µs
10/560 µs
10/1000 µs
ITU-T K20/21
FCC Part 68
GR-1089-CORE
●
Low Differential Capacitance . . . 39 pF max.
description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by
a.c. power system or lightning flash disturbances which are induced or conducted on to the telephone line. A
single device provides 2-point protection and is typically used for the protection of 2-wire telecommunication
equipment (e.g. between the Ring and Tip wires for telephones and modems). Combinations of devices can
be used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially
clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to
crowbar into a low-voltage on state. This low-voltage on state causes the current resulting from the
overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c. latchup
as the diverted current subsides.
This TISP4xxxH4BJ range consists of six voltage variants to meet various maximum system voltage levels
(135 V to 270 V). They are guaranteed to voltage limit and withstand the listed international lightning surges
in both polarities. These high (H) current protection devices are in a plastic package SMBJ (JEDEC DO-
214AA with J-bend leads) and supplied in embossed carrier reel pack. For alternative voltage and holding
current values, consult the factory. For lower rated impulse currents in the SMB package, the 50 A 10/1000
TISP4xxxM3BJ series is available.
P R O D U C T
I N F O R M A T I O N
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
T = 25°C (unless otherwise noted)
absolute maximum ratings,
A
RATING
SYMBOL
VALUE
±135
±145
±155
±200
±230
±270
UNIT
‘4165
‘4180
‘4200
‘4265
‘4300
‘4360
Repetitive peak off-state voltage, (see Note 1)
V
V
DRM
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
500
300
250
220
200
200
200
160
100
8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 current combination wave generator)
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape)
5/200 µs (VDE 0433, 10/700 µs voltage wave shape)
0.2/310 µs (I3124, 0.5/700 µs voltage wave shape)
5/310 µs (ITU-T K20/21, 10/700 µs voltage wave shape)
5/310 µs (FTZ R12, 10/700 µs voltage wave shape)
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape)
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
I
A
TSP
55
60
16.7 ms (60 Hz) full sine wave
I
A
TSM
1000 s 50 Hz/60 Hz a.c.
2.1
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 200 A
Junction temperature
di /dt
400
A/µs
°C
T
T
-40 to +150
-65 to +150
J
Storage temperature range
T
°C
stg
NOTES: 1. See Applications Information and Figure 10 for voltage values at lower temperatures.
2. Initially the TISP4xxxH4BJ must be in thermal equilibrium with T = 25°C.
J
3. The surge may be repeated after the TISP4xxxH4BJ returns to its initial conditions.
4. See Applications Information and Figure 11 for current ratings at other temperatures.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 8 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures
above 25 °C
P R O D U C T
I N F O R M A T I O N
2
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
electrical characteristics for the T and R terminals, T = 25°C (unless otherwise noted)
A
PARAMETER
Repetitive peak off-
state current
TEST CONDITIONS
MIN
TYP
MAX
±5
UNIT
T = 25°C
A
I
V
= ±V
DRM
µA
DRM
D
T = 85°C
±10
A
‘4165
‘4180
‘4200
‘4265
‘4300
‘4360
‘4165
‘4180
‘4200
‘4265
‘4300
‘4360
±165
±180
±200
±265
±300
±360
±174
±189
±210
±276
±311
±373
±0.8
±3
V
V
Breakover voltage
dv/dt = ±750 V/ms,
R
= 300 Ω
SOURCE
V
V
(BO)
dv/dt ≤ ±1000 V/µs, Linear voltage ramp,
Maximum ramp value = ±500 V
Impulse breakover
voltage
(BO)
di/dt = ±20 A/µs, Linear current ramp,
Maximum ramp value = ±10 A
I
Breakover current
On-state voltage
Holding current
dv/dt = ±750 V/ms,
I = ±5 A, t = 100 µs
T
R
= 300 Ω
±0.15
A
V
A
(BO)
SOURCE
V
T
W
I
I = ±5 A, di/dt = +/-30 mA/ms
±0.225
±5
±0.8
H
T
Critical rate of rise of
off-state voltage
Off-state current
dv/dt
Linear voltage ramp, Maximum ramp value < 0.85V
kV/µs
µA
DRM
I
V
= ±50 V
T = 85°C
±10
90
84
79
67
74
62
35
28
33
26
D
D
A
f = 100 kHz, V = 1 V rms, V = 0,
‘4165 thru ‘4200
‘4265 thru ‘4360
‘4165 thru ‘4200
‘4265 thru ‘4360
‘4165 thru ‘4200
‘4265 thru ‘4360
‘4165 thru ‘4200
‘4265 thru ‘4360
‘4165 thru ‘4200
‘4265 thru ‘4360
80
70
71
60
65
55
30
24
28
22
d
D
f = 100 kHz, V = 1 V rms, V = -1 V
d
D
f = 100 kHz, V = 1 V rms, V = -2 V
d
D
C
Off-state capacitance
pF
off
f = 100 kHz, V = 1 V rms, V = -50 V
d
D
f = 100 kHz, V = 1 V rms, V = -100 V
d
D
thermal characteristics
PARAMETER
MIN
TYP
MAX
UNIT
TEST CONDITIONS
EIA/JESD51-3 PCB, I = I
,
TSM(1000)
T
113
T = 25 °C, (see Note 6)
A
R
Junction to free air thermal resistance
°C/W
θJA
265 mm x 210 mm populated line card,
4-layer PCB, I = I , T = 25 °C
50
T
TSM(1000)
A
NOTE 6: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
P R O D U C T
I N F O R M A T I O N
3
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
PARAMETER MEASUREMENT INFORMATION
+i
Quadrant I
Switching
ITSP
Characteristic
ITSM
IT
V(BO)
VT
I(BO)
IH
IDRM
ID
VDRM
VD
+v
-v
ID
VD
VDRM
IDRM
IH
I(BO)
VT
V(BO)
IT
ITSM
Quadrant III
ITSP
Switching
Characteristic
-i
PMXXAAB
Figure 1. VOLTAGE-CURRENT CHARACTERISTIC FOR T AND R TERMINALS
ALL MEASUREMENTS ARE REFERENCED TO THE R TERMINAL
P R O D U C T
I N F O R M A T I O N
4
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
TYPICAL CHARACTERISTICS
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
NORMALISED BREAKOVER VOLTAGE
vs
JUNCTION TEMPERATURE
TC4HAF
TCHAG
1.10
1.05
1.00
0.95
100
10
VD = ±50 V
1
0·1
0·01
0·001
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100 125 150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 2.
Figure 3.
ON-STATE CURRENT
vs
NORMALISED HOLDING CURRENT
vs
JUNCTION TEMPERATURE
ON-STATE VOLTAGE
TC4HAK
TC4HAH
2.0
1.5
200
150
TA = 25 °C
W = 100 µs
t
100
70
50
40
30
1.0
0.9
20
15
0.8
0.7
10
7
5
4
3
0.6
0.5
'4165
THRU
'4200
'4265
THRU
'4360
2
1.5
0.4
1
-25
0
25
50
75
100 125 150
0.7
1
1.5
2
3
4
5
7
10
TJ - Junction Temperature - °C
VT - On-State Voltage - V
Figure 4.
Figure 5.
P R O D U C T
I N F O R M A T I O N
5
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
TYPICAL CHARACTERISTICS
NORMALISED CAPACITANCE
vs
DIFFERENTIAL OFF-STATE CAPACITANCE
vs
OFF-STATE VOLTAGE
RATED REPETITIVE PEAK OFF-STATE VOLTAGE
TC4HAI
TCHAJ
1
36
0.9
TJ = 25°C
0.8
0.7
35
34
Vd = 1 Vrms
0.6
0.5
'4165 THRU '4200
'4265 THRU '4360
33
0.4
0.3
∆C = Coff(-2 V) - Coff(-50 V)
32
31
30
0.2
0.5
1
2
3
5
10
20 30 50 100150
130
150
170
200
230
270 300
VD - Off-state Voltage - V
VDRM - Repetitive Peak Off-State Voltage - V
Figure 6.
Figure 7.
P R O D U C T
I N F O R M A T I O N
6
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
RATING AND THERMAL INFORMATION
NON-REPETITIVE PEAK ON-STATE CURRENT
THERMAL IMPEDANCE
vs
vs
CURRENT DURATION
POWER DURATION
TI4HAC
TI4HAE
30
150
VGEN = 600 Vrms, 50/60 Hz
RGEN = 1.4*VGEN/ITSM(t)
100
70
20
15
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
50
40
30
10
9
20
15
8
7
6
10
7
5
4
5
4
ITSM(t) APPLIED FOR TIME t
3
3
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
2
2
1.5
1.5
0·1
1
0·1
1
10
100
1000
1
10
100
1000
t - Current Duration - s
t - Power Duration - s
Figure 8.
Figure 9.
VDRM DERATING FACTOR
IMPULSE RATING
vs
AMBIENT TEMPERATURE
vs
MINIMUM AMBIENT TEMPERATURE
TI4HAF
TC4HAA
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
700
600
BELLCORE 2/10
500
400
IEC 1.2/50, 8/20
300
250
FCC 10/160
ITU-T 10/700
FCC 10/560
'4165 THRU '4200
200
150
120
BELLCORE 10/1000
100
90
'4265 THRU '4360
-40 -35 -30 -25 -20 -15 -10 -5
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80
0
5
10 15 20 25
TA - Ambient Temperature - °C
TAMIN - Minimum Ambient Temperature - °C
Figure 10.
Figure 11.
P R O D U C T
I N F O R M A T I O N
7
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
APPLICATIONS INFORMATION
deployment
These devices are two terminal overvoltage protectors. They may be used either singly to limit the voltage
between two conductors (Figure 12) or in multiples to limit the voltage at several points in a circuit (Figure 13).
Th3
Th1
Th1
Th2
Figure 12. TWO POINT PROTECTION
Figure 13. MULTI-POINT PROTECTION
In Figure 12, protector Th1 limits the maximum voltage between the two conductors to ±V(BO). This
configuration is normally used to protect circuits without a ground reference, such as modems. In Figure 13,
protectors Th2 and Th3 limit the maximum voltage between each conductor and ground to the ±V(BO) of the
individual protector. Protector Th1 limits the maximum voltage between the two conductors to its ±V(BO)
value. If the equipment being protected has all its vulnerable components connected between the conductors
and ground, then protector Th1 is not required.
impulse testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested
with various impulse wave forms. The table below shows some common values.
PEAK VOLTAGE
SETTING
V
VOLTAGE
WAVE FORM
µs
PEAK CURRENT
CURRENT
TISP4xxxH4
SERIES
STANDARD
VALUE
A
WAVE FORM 25 °C RATING RESISTANCE
µs
A
Ω
2500
2/10
500
100
200
100
37.5
25
2/10
500
100
250
160
200
200
200
GR-1089-CORE
0
1000
10/1000
10/160
10/1000
10/160
10/560
5/320 †
5/320 †
0.2/310
1500
0
0
0
0
0
FCC Part 68
(March 1998)
800
10/560
1500
9/720 †
9/720 †
0.5/700
1000
I3124
1500
37.5
37.5
100
1500
ITU-T K20/K21
10/700
5/310
200
0
4000
† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K21 10/700 impulse generator
If the impulse generator current exceeds the protectors current rating then a series resistance can be used to
reduce the current to the protectors rated value and so prevent possible failure. The required value of series
resistance for a given waveform is given by the following calculations. First, the minimum total circuit
impedance is found by dividing the impulse generators peak voltage by the protectors rated current. The
impulse generators fictive impedance (generators peak voltage divided by peak short circuit current) is then
subtracted from the minimum total circuit impedance to give the required value of series resistance. In some
cases the equipment will require verification over a temperature range. By using the rated waveform values
from Figure 11, the appropriate series resistor value can be calculated for ambient temperatures in the range
of -40 °C to 85 °C.
P R O D U C T
I N F O R M A T I O N
8
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
a.c. power testing
The protector can withstand currents applied for times not exceeding those shown in Figure 8. Currents that
exceed these times must be terminated or reduced to avoid protector failure. Fuses, PTC (Positive
Temperature Coefficient) resistors and fusible resistors are overcurrent protection devices which can be used
to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one ampere. In
some cases it may be necessary to add some extra series resistance to prevent the fuse opening during
impulse testing. The current versus time characteristic of the overcurrent protector must be below the line
shown in Figure 8. In some cases there may be a further time limit imposed by the test standard (e.g. UL
1459 wiring simulator failure).
capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, VD, values of 0, -1 V,
-2 V and -50 V. Where possible values are also given for -100 V. Values for other voltages may be calculated
by multiplying the VD = 0 capacitance value by the factor given in Figure 6. Up to 10 MHz the capacitance is
essentially independent of frequency. Above 10 MHz the effective capacitance is strongly dependent on
connection inductance. In many applications, such as Figure 15 and Figure 17, the typical conductor bias
voltages will be about -2 V and -50 V. Figure 7 shows the differential (line unbalance) capacitance caused by
biasing one protector at -2 V and the other at -50 V.
normal system voltage levels
The protector should not clip or limit the voltages that occur in normal system operation. For unusual
conditions, such as ringing without the line connected, some degree of clipping is permissible. Under this
condition about 10 V of clipping is normally possible without activating the ring trip circuit.
Figure 10 allows the calculation of the protector VDRM value at temperatures below 25 °C. The calculated
value should not be less than the maximum normal system voltages. The TISP4265H4BJ, with a VDRM of
200 V, can be used for the protection of ring generators producing 100 V rms of ring on a battery voltage of
-58 V (Th2 and Th3 in Figure 17). The peak ring voltage will be 58 + 1.414*100 = 199.4 V. However, this is the
open circuit voltage and the connection of the line and its equipment will reduce the peak voltage. In the
extreme case of an unconnected line, clipping the peak voltage to 190 V should not activate the ring trip. This
level of clipping would occur at the temperature when the VDRM has reduced to 190/200 = 0.95 of its 25 °C
value. Figure 10 shows that this condition will occur at an ambient temperature of -22 °C. In this example, the
TISP4265H4BJ will allow normal equipment operation provided that the minimum expected ambient
temperature does not fall below -22 °C.
JESD51 thermal measurement method
To standardise thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51
standard. Part 2 of the standard (JESD51-2, 1995) describes the test environment. This is a 0.0283 m3 (1 ft3)
cube which contains the test PCB (Printed Circuit Board) horizontally mounted at the centre. Part 3 of the
standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for packages smaller
than 27 mm on a side and the other for packages up to 48 mm. The SMBJ measurements used the smaller
76.2 mm x 114.3 mm (3.0 “ x 4.5 “) PCB. The JESD51-3 PCBs are designed to have low effective thermal
conductivity (high thermal resistance) and represent a worse case condition. The PCBs used in the majority
of applications will achieve lower values of thermal resistance and so can dissipate higher power levels than
indicated by the JESD51 values.
P R O D U C T
I N F O R M A T I O N
9
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
typical circuits
MODEM
TIP
RING
WIRE
FUSE
R1a
RING DETECTOR
HOOK SWITCH
D.C. SINK
Th3
Th2
PROTECTED
EQUIPMENT
Th1
E.G. LINE CARD
TISP4360H4
SIGNAL
R1b
RING
WIRE
AI6XBK
TIP
AI6XBP
Figure 14. MODEM INTER-WIRE PROTECTION
Figure 15. PROTECTION MODULE
R1a
Th3
SIGNAL
Th1
Th2
R1b
AI6XBL
D.C.
Figure 16. ISDN PROTECTION
OVER-
CURRENT
PROTECTION
SLIC
PROTECTION
RING/TEST
PROTECTION
TEST
RELAY
RING
RELAY
SLIC
RELAY
TIP
WIRE
S3a
R1a
Th4
Th5
Th3
S1a
S2a
SLIC
Th1
Th2
R1b
RING
WIRE
S3b
TISP6xxxx,
TISPPBLx,
½TISP6NTP2
S1b
S2b
VBAT
C1
220 nF
TEST
EQUIP-
MENT
RING
GENERATOR
AI6XBJ
Figure 17. LINE CARD RING/TEST PROTECTION
P R O D U C T
I N F O R M A T I O N
10
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
MECHANICAL DATA
SMBJ (DO-214AA)
plastic surface mount diode package
This surface mount package consists of a circuit mounted on a lead frame and encapsulated within a plastic
compound. The compound will withstand soldering temperature with no deformation, and circuit performance
characteristics will remain stable when operated in high humidity conditions. Leads require no additional
cleaning or processing when used in soldered assembly.
SMB
4,57
4,06
3,94
3,30
2
Index
Mark
(if needed)
2,40
2,00
2,10
1,90
2,32
1,96
0,20
0,10
1,52
0,76
5,59
5,21
ALL LINEAR DIMENSIONS IN MILLIMETERS
MDXXBHA
P R O D U C T
I N F O R M A T I O N
11
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
MECHANICAL DATA
recommended printed wiring footprint.
SMB Pad Size
2.54
2.40
2.16
ALL LINEAR DIMENSIONS IN MILLIMETERS
MDXXBI
device symbolization code
Devices will be coded as below. As the device parameters are symmetrical, terminal 1 is not identified.
SYMOBLIZATION
DEVICE
CODE
TISP4165H4BJ
TISP4180H4BJ
TISP4200H4BJ
TISP4265H4BJ
TISP4300H4BJ
TISP4360H4BJ
4165H4
4180H4
4200H4
4265H4
4300H4
4360H4
carrier information
Devices are shipped in one of the carriers below. Unless a specific method of shipment is specified by the
customer, devices will be shipped in the most practical carrier. For production quantities the carrier will be
embossed tape reel pack. Evaluation quantities may be shipped in bulk pack or embossed tape.
CARRIER
Embossed Tape Reel Pack
Bulk Pack
ORDER #
TISP4xxxH4BJR
TISP4xxxH4BJ
P R O D U C T
I N F O R M A T I O N
12
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
MECHANICAL DATA
tape dimensions
SMB Package Single-Sprocket Tape
4,10
3,90
1,65
1,55
2,05
1,95
1,85
1,65
0,40 MAX.
5,55
5,45
12,30
11,70
8,20
MAX.
8,10
7,90
Cover
Tape
ø 1,5 MIN.
0 MIN.
Carrier Tape
Embossment
4,5 MAX.
Direction of Feed
Maximium component
rotation
20°
Typical component
cavity centre line
Index
Mark
(if needed)
Typical component
centre line
ALL LINEAR DIMENSIONS IN MILLIMETERS
NOTES: A. The clearance between the component and the cavity must be within 0,05 mm MIN. to 0,65 mm MAX. so that the
component cannot rotate more than 20° within the determined cavity.
MDXXBJ
B. Taped devices are supplied on a reel of the following dimensions:-
Reel diameter:
330 ±3,0 mm
Reel hub diameter 75 mm MIN.
Reel axial hole:
13,0 ±0,5 mm
C.
3000 devices are on a reel.
P R O D U C T
I N F O R M A T I O N
13
TISP4165H4BJ THRU TISP4200H4BJ, TISP4265H4BJ THRU TISP4360H4BJ
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
NOVEMBER 1997 - REVISED MARCH 1999
IMPORTANT NOTICE
Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product
or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is
current.
PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with
PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this
warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government
requirements.
PI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents
or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design
right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used.
PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORISED, OR WARRANTED TO BE SUITABLE
FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS.
Copyright © 1999, Power Innovations Limited
P R O D U C T
I N F O R M A T I O N
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