L2821 [POLYFET]
SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR; 硅栅增强型RF功率LDMOS晶体管
| 型号： | L2821 |
| 厂家： | 
POLYFET RF DEVICES |
| 描述： | SILICON GATE ENHANCEMENT MODE RF POWER LDMOS TRANSISTOR |
| 文件： | 总2页 (文件大小：44K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
polyfet rf devices
L2821
General Description
Silicon VDMOS and LDMOS
transistors designed specifically
for broadband RF applications.
Suitable for Militry Radios,
SILICON GATE ENHANCEMENT MODE
RF POWER LDMOS TRANSISTOR
Cellular and Paging Amplifier Base
Stations, Broadcast FM/AM, MRI,
Laser Driver and others.
8.0 Watts Single Ended
Package Style S02
TM
"Polyfet" process features
low feedback and output capacitances
HIGH EFFICIENCY, LINEAR
HIGH GAIN, LOW NOISE
resulting in high F transistors with high
t
input impedance and high efficiency.
o
25 C )
ABSOLUTE MAXIMUM RATINGS ( T =
Total
Device
Dissipation
Junction to
Case Thermal
Resistance
Maximum
Junction
Temperature
DC Drain
Current
Drain to
Gate
Voltage
Drain to
Source
Voltage
Gate to
Source
Voltage
Storage
Temperature
o
C/W
o
o
o
5.0
50 Watts
200 C
-65 C to 150 C
A
36V
36V
20 V
3.40
RF CHARACTERISTICS (
8.0 WATTS OUTPUT )
SYMBOL PARAMETER
MIN
13
TYP
MAX
UNITS
TEST CONDITIONS
Idq = 0.20 A, Vds = 12.5 V, F = 500
Gps
Common Source Power Gain
Drain Efficiency
MHz
dB
%
h
Idq =
0.20
50
A, Vds = 12.5 V, F = 500 MHz
Idq = 0.20
A, Vds = 12.5 V, F = 500
MHz
VSWR
Load Mismatch Tolerance
20:1
Relative
ELECTRICAL CHARACTERISTICS ( EACH SIDE )
SYMBOL PARAMETER
MIN
36
TYP
MAX
UNITS
V
TEST CONDITIONS
Drain Breakdown Voltage
Ids = 0.10 mA, Vgs = 0V
Vds =
Bvdss
Idss
1.0
Zero Bias Drain Current
Gate Leakage Current
mA
12.5 V, Vgs = 0V
Igss
Vgs
1
7
uA
V
Vds = 0V Vgs = 30V
Gate Bias for Drain Current
1
Ids = 0.10 A, Vgs = Vds
1.0
gM
Forward Transconductance
Saturation Resistance
Mho
Vds = 10V, Vgs = 5V
Rdson
Ohm
Vgs = 20V, Ids = 3.00 A
0.60
7.50
33.0
2.0
Idsat
Ciss
Crss
Coss
Saturation Current
Amp
pF
Vgs = 20V, Vds = 10V
12.5 Vgs = 0V, F = 1 MHz
Common Source Input Capacitance
Common Source Feedback Capacitance
Common Source Output Capacitance
Vds =
Vds =
Vds =
12.5 Vgs = 0V, F = 1 MHz
12.5 Vgs = 0V, F = 1 MHz
pF
24.0
pF
REVISION 04/27/2001
POLYFET RF DEVICES
1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:Sales@polyfet.com URL:www.polyfet.com
L2821
POUT VS PIN GRAPH
CAPACITANCE VS VOLTAGE
L2 C1 DIE CAP ACITAN CE
L2 8 2 1 P i n v s P o u t F = 5 0 0 M H Z , VD S = 1 2 . 5 V, I d q = . 2 A
1 2
1 0
8
2 0 . 0 0
100
1 8 . 0 0
1 6 . 0 0
Ciss
Pout
Coss
1 4 . 0 0
1 2 . 0 0
1 0 . 0 0
8 . 0 0
Efficiency@8W=46%
6
0
Crss
4
Gain
2
0
6 . 0 0
1
0
2
4
6
8
1 0
1 2
1 4
0
0 . 5
1
1 . 5
2
P i n i n W a t t s
VDS IN VOLTS
IV CURVE
ID & GM VS VGS
L2 C 1 DIE ID, GM vs VG
L2C 1 DIE IV
1 0 0
9
8
7
6
5
4
3
2
1
0
ID
GM
0
2
4
6
8
10
12
14
16
18
20
0.1
0
VDSINVOLTS
Vg=6v
2
4
6
1 0
1 2
1 4
Vg s in Vo lt8s
vg=2v
Vg=4v
vg=8v
vg=10v
vg=12v
Zin Zout
PACKAGE DIMENSIONS IN INCHES
Tolerance .XX +/-0.01 .XXX +/-.005 inches
REVISION 04/27/2001
POLYFET RF DEVICES
1110 Avenida Acaso, Camarillo, Ca 93012 Tel:(805) 484-4210 FAX: (805) 484-3393 EMAIL:Sales@polyfet.com URL:www.polyfet.com
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