PO74G00A [POTATO]
QUADRUPLE 2-INPUT POSITIVE-NAND GATE; 四路2输入正与非门
| 型号： | PO74G00A |
| 厂家： | 
POTATO SEMICONDUCTOR CORPORATION |
| 描述： | QUADRUPLE 2-INPUT POSITIVE-NAND GATE |
| 文件： | 总6页 (文件大小：551K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PO54G00A, PO74G00A
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
01/12/09
54, 74 Series GHz Logic
FEATURES:
DESCRIPTION:
. Patented technology
. Specified From –40°C to 85°C, –40°C to 125°C,
and –55°C to 125°C
Potato Semiconductor’s PO74G00A is designed for
world top performance using submicron CMOS
technology to achieve 1.125GHz TTL/CMOS output
frequency with less than 1.5ns propagation delay.
. Operating frequency up to 1.125GHz with 2pf load
. Operating frequency up to 750MHz with 5pf load
. Operating frequency up to 350MHz with 15pf load
This quadruple 2-input positive-NAND gate is
designed for 1.65-V to 3.6-V VCC operation.
. VCC Operates from 1.65V to 3.6V
. Propagation delay < 1.5ns max with 15pf load
. Low input capacitance: 4pf typical
. Latch-Up Performance Exceeds 250 mA Per
JESD 17
. ESD Protection Exceeds JESD 22
. 5000-VHuman-BodyModel (A114-A)
. 200-VMachineModel (A115-A)
The PO74G00A performs the Boolean function
Y= A · B or Y= A + B in positive logic.
Inputs can be driven from either 3.3V or 5V devices.
This feature allows the use of these devices as
translators in a mixed 3.3V/5V system environment.
. Available in 14pin 150mil wide SOIC package
. Available in 14pin Ceramic Dual Flatpack
. Available in 20pin Leadless Ceramic Chip Carrier
Pin Configuration
1A
1B
1
2
3
4
5
6
7
14
13
12
11
10
9
V
CC
3
2 1 20 19
18
4B
4A
4Y
3B
3A
3Y
4A
NC
4Y
NC
3B
1Y
NC
2A
4
5
6
7
8
1Y
17
16
15
14
2A
NC
2B
2B
2Y
9 10 11 12 13
GND
8
Pin Description
Logic Block Diagram
INPUTS
OUTPUT
Y
A
H
L
B
H
X
L
A
B
L
H
H
Y
X
1
Copyright © 2005-2007, Potato Semiconductor Corporation
PO54G00A, PO74G00A
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
09/12/07
54, 74 Series GHz Logic
Maximum Ratings
Description
Note:
Max
-65 to 150
Unit
°C
°C
V
stresses greater than listed under
Maximum
Ratings
may
cause
Storage Temperature
Operation Temperature
Operation Voltage
Input Voltage
permanent damage to the device. This
is a stress rating only and functional
operation of the device at these or any
other conditions above those indicated
in the operational sections of this
specification is not implied. Exposure
to absolute maximum rating conditions
for extended periods may affect
reliability specification is not implied.
-55 to 125
-0.5 to +4.6
-0.5 to +5.5
-0.5 to Vcc+0.5
V
Output Voltage
V
DC Electrical Characteristics
Symbol
Description
Output High voltage
Output Low voltage
Input High voltage
Input Low voltage
Input High current
Input Low current
Clamp diode voltage
Test Conditions
Min
Typ Max
Unit
V
Vcc=3V Vin=VIH or VIL, IOH= -12mA
Vcc=3V Vin=VIH or VIL, IOH=12mA
Guaranteed Logic HIGH Level (Input Pin)
Guaranteed Logic LOW Level (Input Pin)
Vcc = 3.6V and Vin = 5.5V
VOH
VOL
VIH
VIL
IIH
2.4
3
0.3
-
-
0.5
5.5
0.8
5
-
V
2
V
-0.5
-
V
-
-
-
-
uA
Vcc = 3.6V and Vin = 0V
IIL
-
-5 uA
VIK
Vcc = Min. And IIN = -18mA
-0.7 -1.2
V
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, 25 °C ambient.
3. This parameter is guaranteed but not tested.
4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
5. VoH = Vcc – 0.6V at rated current
2
Copyright © 2005-2007, Potato Semiconductor Corporation
PO54G00A, PO74G00A
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
01/12/09
54, 74 Series GHz Logic
Power Supply Characteristics
Symbol
IccQ
Description
Test Conditions (1)
Min
Typ
Max Unit
Quiescent Power Supply Current
Vcc=Max, Vin=Vcc or GND
-
0.1
40
uA
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, 25°C ambient.
3. This parameter is guaranteed but not tested.
4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
Capacitance
Parameters (1)
Cin
Description
Test Conditions
Vin = 0V
Typ
Unit
Input Capacitance
Output Capacitance
4
6
pF
pF
Cout
Vout = 0V
Notes:
1 This parameter is determined by device characterization but not production tested.
Switching Characteristics
Symbol
Description
Test Conditions (1)
CL = 15pF
Max
1.5
Unit
ns
Propagation Delay A, B to Y
Propagation Delay A, B to Y
Rise/Fall Time
tPLH
tPHL
tr/tf
CL = 15pF
1.5
ns
0.8V – 2.0V
CL =15pF
0.8
ns
Input Frequency
fmax
fmax
fmax
Notes:
350
750
1125
MHz
MHz
MHz
Input Frequency
CL = 5pF
Input Frequency
CL = 2pF
1. See test circuits and waveforms.
2. tpLH, tpHL, tsk(p), and tsk(o) are production tested. All other parameters guaranteed but not production tested.
3. Airflow of 1m/s is recommended for frequencies above 133MHz
3
Copyright © 2005-2006, Potato Semiconductor Corporation
PO54G00A, PO74G00A
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
09/12/07
54, 74 Series GHz Logic
Test Waveforms
Propagation Delay
3V
1.5V
0V
Input
tPHL
tPLH
VoH
2.0V
1.5V
0.8V
Output
VoL
tf
tR
Test Circuit
Vcc
Pulse
Generator
D.U.T.
15pF
to
50Ω
2pF
4
Copyright © 2005-2006, Potato Semiconductor Corporation
PO54G00A, PO74G00A
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
09/12/07
54, 74 Series GHz Logic
Packaging Mechanical Drawing: 14 pin 150mil SOIC
6.20
5.80
0.244
0.228
1.27
0.40
0.010
0.007
0.050
0.016
0.25
0.17
X.XX
X.XX
Denotes dimensions in inches
X.XX
X.XX
Denotes dimensions in millimenters
Packaging Mechanical Drawing: 14pin Leadless Ceramic Chip Carrier
X.XX
X.XX
Denotes dimensions in inches
X.XX
Denotes dimensions in millimenters
X.XX
5
Copyright © 2005-2007, Potato Semiconductor Corporation
PO54G00A, PO74G00A
QUADRUPLE 2-INPUT POSITIVE-NAND GATE
27/10/07
54, 74 Series GHz Logic
Packaging Mechanical Drawing: 20pin Ceramic Dual Flatpack
0.020 (0,51)
0.010 (0,25)
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
3
2
1
13 12
4
5
6
18
17
0.358 (9,09)
0.342 (8,69)
16
0.358 (9,09)
7
8
15
14
0.307 (7,80)
X.XX
X.XX
Denotes dimensions in inches
X.XX
X.XX
Denotes dimensions in millimenters
9
10 11
12 13
Ordering Information
T
Ordering Code
Package
Top-Marking
PO74G00AS
PO74G00AS
A
14pin SOIC
14pin SOIC
Tube
Pb-free & Green
PO74G00ASU
PO74G00ASR
125°C
-40°C to
-40°C to
Tape and reel
Pb-free & Green
125°C
14pin Leadless
Ceramic Chip Carrier
PO54G00ALU
PO54G00AFU
Tube
Tube
Pb-free & Green
Pb-free & Green
PO54G00AL
PO54G00AF
-55°C to 125°C
-55°C to 125°C
20pin Ceramic
Dual Flatpack
IC Package Information
QTY
PER
TUBE
TAPE LEADER
LENGTH
PIN 1 LOCATION
TAPE TRAILER
LENGTH
QTY
PER REEL
TAPE
WIDTH
(mm)
TAPE
PITCH
(mm)
PACKAGE
CODE
PACKAGE
TYPE
S
L
F
SOIC 14
LCCC 20
CFP 14
16
8
Top Left Corner
39 (12”)
N/A
3000
N/A
64 (20”)
N/A
55
55
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
150
6
Copyright © 2005-2007, Potato Semiconductor Corporation
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