4220 [PSEMI]
SPDT UltraCMOS⑩ RF Switch DC - 2500 MHz; SPDT的UltraCMOS ？ RF开关直流 - 2500兆赫
| 型号： | 4220 |
| 厂家： | 
Peregrine Semiconductor |
| 描述： | SPDT UltraCMOS⑩ RF Switch DC - 2500 MHz |
| 文件： | 总7页 (文件大小：247K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product Specification
PE4220
SPDT UltraCMOS™ RF Switch
DC - 2500 MHz
Product Description
Features
The PE4220 UltraCMOS™ RF Switch is designed to cover a
broad range of applications from near DC to 2500 MHz. This
single-supply switch integrates on-board CMOS control logic
driven by a simple, single-pin CMOS or TTL compatible control
input. Using a nominal +3-volt power supply, a typical input 1
dB compression point of +22 dBm can be achieved. The
PE4220 also exhibits input-output isolation of better than 37 dB
at 1000 MHz and is offered in a small 8-lead MSOP package.
• Single 3-volt power supply
• Very low insertion loss: 0.25 dB at
1000 MHz
• High isolation: 37 dB at 1.0 GHz
• Typical input 1 dB compression point
of +22.5 dBm
• Single-pin CMOS or TTL logic control
• Packaged in a small 8-lead MSOP
The PE4220 UltraCMOS™ RF Switch is manufactured in
Peregrine’s patented Ultra Thin Silicon (UTSi®) CMOS
process, offering the performance of GaAs with the economy
and integration of conventional CMOS.
Figure 1. Functional Diagram
Figure 2. Package Type
8-lead MSOP
RFC
RF1
RF2
CMOS
Control
Driver
CTRL
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 ꢀ)
Parameter
Operating Frequency1
Insertion Loss
Conditions
Minimum
Typical
Maximum
2500
Units
MHz
dB
DC
1000 MHz
1000 MHz
1000 MHz
1000 MHz
0.25
37
0.35
Isolation – RFC to RF1/RF2
Isolation – RF1 to RF2
Return Loss
34.5
34
dB
35
dB
17.5
19
dB
‘ON’ Switching Time
‘OFF’ Switching Time
Video Feedthrough2
Input 1 dB Compression
Input IP3
CTRL to 0.1 dB final value, 2 GHz
CTRL to 25 dB isolation, 2 GHz
200
90
ns
ns
5.0
22.5
43.5
mVpp
dBm
dBm
2000 MHz
20
42
2000 MHz, 8 dBm
Notes:
1. Device linearity will begin to degrade below 10 MHz.
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low
in a 50Ω test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.
Document No. 70-0028-09 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 7
PE4220
Product Specification
Figure 3. Pin Configuration (Top View)
Table 4. Absolute Maximum Ratings
Symbol
Parameter/Conditions
Min Max Units
1
2
3
4
8
7
6
5
VDD
RF1
GND
GND
RF2
VDD
Power supply voltage
-0.3
4.0
V
VDD
+ 0.3
CTRL
VI
TST
TOP
PIN
Voltage on any input
-0.3
-65
-40
V
°C
4220
Storage temperature range
150
85
GND
RFC
Operating temperature
range
°C
Input power (50ꢀ)
ESD voltage (Human Body
Model)
25
dBm
V
VESD
250
Table 2. Pin Descriptions
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Pin
No.
Pin
Name
Description
1
VDD
Nominal 3 V supply connection. A
bypass capacitor (100 pF) to the ground
plane should be placed as close as
possible to the pin
2
3
CTRL
GND
CMOS or TTL logic level:
High = RFC to RF1 signal path
Low = RFC to RF2 signal path
Electrostatic Discharge (ESD) Precautions
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating in Table 4.
4
5
6
RFC
RF2
Common RF port for switch (Note 1)
RF2 port (Note 1)
GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
Latch-Up Avoidance
7
GND
Ground connection. Traces should be
physically short and connected to ground
plane for best performance.
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
8
RF1
RF1 port (Note 1)
Table 5. Control Logic Truth Table
Note 1: All RF pins must be DC blocked with an external
series capacitor or held at 0 VDC
Control Voltage
Signal Path
RFC to RF1
RFC to RF2
.
CTRL = CMOS or TTL High
CTRL = CMOS or TTL Low
Table 3. DC Electrical Specifications
Parameter
Min
Typ
Max
Units
Control Logic
VDD Power Supply Voltage
2.7
3.0
3.3
V
The control logic input pin (CTRL) is typically
driven by a 3-volt CMOS logic level signal, and
has a threshold of 50% of VDD. For flexibility to
support systems that have 5-volt control logic
drivers, the control logic input has been designed
to handle a 5-volt logic HIGH signal. (A minimal
current will be sourced out of the VDD pin when the
control logic input voltage level exceeds VDD.)
IDD Power Supply Current
(VDD = 3V, VCNTL = 3)
30
40
µA
Control Voltage High
Control Voltage Low
0.7x VDD
V
V
0.3x VDD
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0028-09 │ UltraCMOS™ RFIC Solutions
Page 2 of 7
PE4220
Product Specification
Figure 4. Evaluation Board Layout
Peregrine specification 101/0037
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4220 SPDT switch. The RF common port is
connected through a 50 ꢀ transmission line to the
top left SMA connector, J1. Port 1 and Port 2 are
connected through 50 ꢀ transmission lines to the top
two SMA connectors on the right side of the board,
J3 and J4. A through transmission line connects
SMA connectors J6 and J8. This transmission line
can be used to estimate the loss of the PCB over the
environmental conditions being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The bottom
layer provides ground for the RF transmission lines.
The transmission lines were designed using a
coplanar waveguide model with a trace width of
0.030”, trace gaps of 0.007”, dielectric thickness of
0.028”, metal thickness of 0.0014” and εr of 4.4. Note
that the predominate mode for these transmission
lines is coplanar waveguide with a ground plane.
J2 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left pin,
the second pin to the right (J2-3) is connected to the
device CTRL input. The fourth pin to the right (J2-7)
is connected to the device VDD input. A decoupling
capacitor (100 pF) is provided on both CTRL and
V
DD traces. It is the responsibility of the customer to
determine proper supply decoupling for their design
application. Removing these components from the
evaluation board has not been shown to degrade RF
performance.
Figure 5. Evaluation Board Schematic
Peregrine specification 102/0035
Document No. 70-0028-09 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 7
PE4220
Product Specification
Typical Performance Data @ -40 °C to 85 °C (Unless otherwise noted)
Figure 7. Input 1 dB Compression Point & IIP3
T = 25 °C
Figure 6. Insertion Loss – RFC to RF1
0
60
50
40
30
20
10
0
60
50
40
30
20
10
0
IIP3
-0.25
-40 C
25 C
-0.5
-0.75
-1
85 C
-1.25
-1.5
-1.75
-2
1dB Compression
2500
0
500
1000
1500
2000
2500
500
1000
1500
2000
3000
Frequency (MHz)
Frequency (MHz)
Figure 8. Insertion Loss – RFC to RF2
Figure 9. Isolation – RFC to RF1
T = 25 °C
0
0
-0.25
-0.5
-20
-40
-40 C
85 C
-0.75
-1
25 C
-60
-1.25
-1.5
-1.75
-2
-80
-100
0
500
1000
1500
2000
2500
0
500
1000
1500
2000
2500
Frequency (MHz)
Frequency (MHz)
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0028-09 │ UltraCMOS™ RFIC Solutions
Page 4 of 7
PE4220
Product Specification
Typical Performance Data @ 25 °C
Figure 10. Isolation – RFC to RF2
Figure 11. Isolation – RF1/RF2 to RF2/RF1
0
-20
0
-20
RF2
-40
-40
RF1
-60
-60
-80
-80
-100
-100
0
500
1000
1500
2000
2500
0
500
1000
1500
2000
2500
Frequency (MHz)
Frequency (MHz)
Figure 12. Return Loss – RFC
Figure 13. Return Loss – RF1, RF2
0
0
RF2
-10
-20
-30
-40
-10
-20
RF1
-30
-40
0
500
1000
1500
2000
2500
0
500
1000
1500
2000
2500
Frequency (MHz)
Frequency (MHz)
Document No. 70-0028-09 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7
PE4220
Product Specification
Figure 14. Package Drawing
8-lead MSOP
TOP VIEW
0.65BSC
.525BSC
8
7
6
5
2.45±0.10
2X
3.00±0.10
0.51±0.13
- B -
1
2
3
4
.25
A
B
C
0.51±0.13
- C -
2.95±0.10
0.86±0.08
2.95±0.10
1.10 MAX
- A -
+0.07
3.00±0.10
4.90±0.15
0.10
A
0.33
0.10±0.05
-0.08
0.08
A
B
C
3.00±0.10
FRONT VIEW
SIDE VIEW
Table 6. Ordering Information
Order Code
4220-21
Part Marking
4220
Description
Package
8-lead MSOP
Shipping Method
PE4220-08MSOP-50A
PE4220-08MSOP-2000C
PE4220-08MSOP-EK
50 units / Tube
2000 units / T&R
1 / Box
4220-22
4220
8-lead MSOP
4220-00
PE4220-EK
4220
Evaluation Kit
4220-51
PE4220G-08MSOP-50A
PE4220G-08MSOP-2000C
Green 8-lead MSOP
Green 8-lead MSOP
50 units / Tube
2000 units / T&R
4220-52
4220
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0028-09 │ UltraCMOS™ RFIC Solutions
Page 6 of 7
PE4220
Product Specification
Sales Offices
The Americas
North Asia Pacific
Peregrine Semiconductor Corp.
9450 Carroll Park Drive
San Diego, CA 92121
Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel 858-731-9400
Fax 858-731-9499
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Europe
South Asia Pacific
Peregrine Semiconductor Europe
Commercial Products:
Bâtiment Maine
13-15 rue des Quatre Vents
F- 92380 Garches, France
Tel: +33-1-47-41-91-73
Peregrine Semiconductor
28G, Times Square,
No. 500 Zhangyang Road,
Shanghai, 200122, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
Fax : +33-1-47-41-91-73
Space and Defense Products:
180 Rue Jean de Guiramand
13852 Aix-En-Provence cedex 3, France
Tel: +33(0) 4 4239 3361
Fax: +33(0) 4 4239 7227
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Preliminary Specification
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS is a trademark of Peregrine Semiconductor
Corp.
Document No. 70-0028-09 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 7 of 7
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