4235-00 [PSEMI]
SPDT UltraCMOS? RF Switch DC - 4000 MHz; SPDT的UltraCMOS ？ RF开关直流 - 4000兆赫
| 型号： | 4235-00 |
| 厂家： | 
Peregrine Semiconductor |
| 描述： | SPDT UltraCMOS? RF Switch DC - 4000 MHz |
| 文件： | 总8页 (文件大小：288K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product Specification
PE4235
SPDT UltraCMOS™ RF Switch
DC - 4000 MHz
Product Description
The PE4235 RF Switch is designed to cover a broad range of
applications from near DC to 4000 MHz. This single-supply
reflective switch integrates on-board CMOS control logic
driven by a simple, single-pin CMOS or TTL control input.
Using a nominal +3-volt power supply, a 1 dB compression
point of +15 dBm can be achieved. The PE4235 also exhibits
outstanding isolation of better than 40 dB at 1000 MHz and is
offered in a small 3x3 mm DFN package.
Features
• Single 3.0-volt power supply
• Low insertion loss: 0.40 dB at
1000 MHz, 0.45 dB at 2000 MHz
• High isolation of 40 dB at 1000 MHz,
30 dB at 2000 MHz
• Typical 1 dB compression point of
+15 dBm
The PE4235 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
• Single-pin CMOS or TTL logic control
• Available in a 6-lead DFN package
Figure 1. Functional Diagram
Figure 2. Package Type
6-lead DFN
RFC
RF1
RF2
CMOS
Control
Driver
CTRL
Table 1. Electrical Specifications @ +25 °C, VDD = 3 V (ZS = ZL = 50 Ω)
Parameter
Conditions
Minimum
Typical
Maximum
Units
Operating Frequency1
DC
4000
MHz
1000 MHz
2000 MHz
0.40
0.45
0.50
0.60
dB
dB
Insertion Loss
1000 MHz
2000 MHz
39
29
40
30
dB
dB
Isolation – RFC to RF1/RF2
Isolation – RF1 to RF2
Return Loss
1000 MHz
2000 MHz
36
28
37
29
dB
dB
1000 MHz
2000 MHz
20
17
22
19
dB
dB
CTRL to 0.1 dB final value, 2 GHz
CTRL to 25 dB isolation, 2 GHz
200
90
ns
‘ON’ Switching Time
‘OFF’ Switching Time
Video Feedthrough2
Input 1 dB Compression
Input IP3
ns
2.5
15
mVpp
dBm
dBm
2000 MHz
13.5
32.5
2000 MHz, 5 dBm
36
Notes: 1. Device linearity will begin to degrade below 10 MHz.
2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to
High or High to Low in a 50 Ω test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth.
Document No. 70-0069-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 8
PE4235
Product Specification
Figure 3. Pin Configuration
Table 4. Absolute Maximum Ratings
Symbol Parameter/Conditions
Min
Max
Units
RF2
GND
RF1
1
2
3
6
5
4
RFC
CTRL
VDD
VDD
Power Supply Voltage
-0.3
4.0
V
Voltage on any input
except for CTRL pin
VI
-0.3 VDD + 0.3
V
Exposed Solder
Pad - Shorted
to Pin 2
VCTRL
TST
Voltage on CTRL pin
5
V
(bottom side)
Storage temperature range
-65
-40
150
85
°C
Operating temperature
range
TOP
PIN
°C
dBm
V
Input power (50 Ω)
ESD Voltage (Human Body
Model)
19
VESD
200
Table 2. Pin Descriptions
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Pin
No.
Pin
Name
Description
1
RF2
RF2 port.1
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
2
GND
Ground Connection. Traces should be
physically short and connected to the
ground plane. This pin is connected to
the exposed solder pad that also must
be soldered to the ground plane for best
performance.
3
4
RF1
VDD
RF1 port.1
Control Logic Input
Nominal 3 V supply connection.
The control logic input pin (CTRL) is typically
driven by a 3-volt CMOS logic level signal. For
flexibility to support systems that have 5-volt
control logic drivers, the control logic input has
been designed to handle a standard 5-volt TTL
control signal. This TTL control signal input must
not exceed 5-volts or damage to the switch could
result.
5
CTRL
CMOS or TTL logic level:
High = RFC to RF1 signal path
Low = RFC to RF2 signal path
Common RF port for switch.1
6
RFC
Notes: 1. All RF pins must be DC blocked with an external series
capacitor or held at 0 VDC
.
Table 5. Control Logic Truth Table
Table 3. DC Electrical Specifications
Control Voltage
Signal Path
Parameter
Min
Typ
Max
Units
CTRL = CMOS or TTL High
CTRL = CMOS or TTL Low
RFC to RF1
RFC to RF2
VDD Power Supply Voltage
IDD Power Supply Current
(VDD = 3V, VCNTL = 3V)
Control Voltage High
2.7
3.0
3.3
V
250
500
nA
Electrostatic Discharge (ESD) Precautions
0.7xVDD
V
V
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Control Voltage Low
0.3xVDD
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0069-03 │ UltraCMOS™ RFIC Solutions
Page 2 of 8
PE4235
Product Specification
Typical Performance Data @ -40 °C to 85 °C (Unless Otherwise Noted)
Figure 4. Insertion Loss - RFC to RF1
Figure 5. Input 1dB Compression Point and IIP3
0
IIP3
-40 C
40
30
20
10
0
40
30
20
10
0
-40 C
-0.25
25 C
-0.5
25 C
85 C
85 C
-0.75
-1
-1.25
-1.5
1dB Compression
25 C
-40 C
0
500
1000
1500 2000 2500
Frequency (MHz)
3000 3500
4000
500
1000
1500
2000
2500
3000
3500
4000
Frequency (MHz)
Figure 6. Insertion Loss - RFC to RF2
Figure 7. Isolation - RFC to RF1
T = 25 °C
0
0
-20
-40 8C
-0.25
-0.5
25 8C
-40
85 8C
-0.75
-60
-1
-1.25
-1.5
-80
-100
0
500
1000
1500 2000 2500
Frequency (MHz)
3000 3500
4000
0
500
1000
1500 2000 2500
Frequency (MHz)
3000 3500
4000
Document No. 70-0069-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 8
PE4235
Product Specification
Typical Performance Data @ 25 °C
Figure 8. Isolation – RFC to RF2
Figure 9. Isolation – RF1 to RF2, RF2 to RF1
0
-20
0
-20
RF2
-40
-40
-60
-60
RF1
-80
-80
-100
-100
0
500
1000
1500 2000 2500
Frequency (MHz)
3000 3500
4000
0
500
1000
1500 2000 2500
Frequency (MHz)
3000 3500
4000
Figure 10. Return Loss – RFC
Figure 11. Return Loss – RF1, RF2
0
-10
-20
-30
-40
0
-10
RF2
-20
-30
-40
RF1
0
500
1000
1500 2000 2500
Frequency (MHz)
3000 3500
4000
0
500
1000
1500 2000 2500
Frequency (MHz)
3000 3500
4000
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0069-03 │ UltraCMOS™ RFIC Solutions
Page 4 of 8
PE4235
Product Specification
Figure 12. Evaluation Board Layouts
Peregrine Specification 101/0085
Evaluation Kit
The SPDT Switch Evaluation Kit board was
designed to ease customer evaluation of the
PE4235 SPDT switch. The RF common port is
connected through a 50 Ω transmission line to the
top left SMA connector, J1. Port 1 and Port 2 are
connected through 50 Ω transmission lines to the top
two SMA connectors on the right side of the board,
J2 and J3. A through transmission line connects
SMA connectors J4 and J5. This transmission line
can be used to estimate the loss of the PCB over the
environmental conditions being evaluated.
The board is constructed of a two metal layer FR4
material with a total thickness of 0.031”. The bottom
layer provides ground for the RF transmission lines.
The transmission lines were designed using a
coplanar waveguide with ground plane model using
a trace width of 0.0476”, trace gaps of 0.030”,
dielectric thickness of 0.028”, metal thickness of
0.0021” and εr of 4.4.
J6 provides a means for controlling DC and digital
inputs to the device. Starting from the lower left pin,
the second pin to the right (J6-3) is connected to the
device CTRL input. The fourth pin to the right (J6-7)
is connected to the device VDD input. A decoupling
capacitor (100 pF) is provided on both CTRL and
VDD traces. It is the responsibility of the customer to
determine proper supply decoupling for their design
application. Removing these components from the
evaluation board has not been shown to degrade RF
performance.
Figure 13. Evaluation Board Schematic
Peregrine Specification 102/0108
Document No. 70-0069-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 8
PE4235
Product Specification
Figure 14. Package Drawing
6-lead DFN
- A -
3.00
- B -
C
L
6
5
4
0.125
C
3.00
L
PIN
MAR
1
K
C
0.10
4
1
2
3
0.10
C
0.125
4
+2°
10°
TOP
DETAIL C
-10°
VIEW
0.025
±0.025
0.100
C
C
0.70 ± 0.05
0.20 ±0.05
0.90 ±0.10
0.025±0.025
0.080
3
SEATING
SIDE
VIEW
SEE DETAIL B
PLANE
DETAIL B
- C -
C
L
0.17 MIN.
0.24
+0.08
-0.02
+0.20
-0.08
0.95
0.35
0.10
C A B
0.05
C
0.125
EXPOSED PAD
SEE DETAIL A
+0.21
0.29
1
-0.08
2
3
EXPOSED SLUG/
HEAT SINK
0.17
0.30
R0.127 TYP
R 0.15 TYP
1.21 ±0.10
0.605 ±0.05
THIS FEATURE
APPLIES TO
BOTH ENDS OF
THE PKG.
EXPOSED METALIZED
FEATURE
EXPOSED
(2X)
.20 MIN.
3
EDGE OF PLASTIC BODY
6
DETAIL A
4
5
1.05±0.05
2.01±0.10
BOTTOM VIEW
1. DIMENSIONS AND TOLERANCES ARE PER ANSi Y14.5
2. DIMENSIONS ARE IN MILLIMETERS, ANGLES ARE IN DEGREES.
3
COPLANARITY APPLIES TO EXPOSED HEAT SLUG AS WELL AS THE TERMINALS.
PROFILE TOLERANCE APPLIES TO PLASTIC BODY ONLY.
4
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0069-03 │ UltraCMOS™ RFIC Solutions
Page 6 of 8
PE4235
Product Specification
Figure 14. Tape and Reel Specifications
6-lead DFN
Table 6. Dimensions
Dimension
DFN 3x3 mm
3.23 ± 0.1
3.17 ± 0.1
1.37 ± 0.1
4 ± 0.1
Ao
Bo
Ko
P
W
8 +0.3, -0.1
0.254 ± 0.02
3000
T
R7 Quantity
R13 Quantity
N.A.
Note: R7 = 7 inch Lock Reel, R13 = 13 inch Lock Reel
Table 7. Ordering Information
Order Code
4235-01
Part Marking
4235
Description
Package
Shipping Method
12800 units / Canister
3000 units / T&R
1 / Box
PE4235-06DFN 3x3mm-12800F
PE4235-06DFN 3x3mm-3000C
PE4235-06DFN 3x3mm-EK
PE4235G-06DFN 3x3mm-12800F
PE4235G-06DFN 3x3mm-3000C
6-lead 3x3 mm DFN
6-lead 3x3 mm DFN
Evaluation Kit
4235-02
4235
4235-00
PE4235-EK
4235
4235-51
Green 6-lead 3x3 mm DFN
Green 6-lead 3x3 mm DFN
12800 units / Canister
3000 units / T&R
4235-52
4235
Document No. 70-0069-03 │ www.psemi.com
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 7 of 8
PE4235
Product Specification
Sales Offices
The Americas
North Asia Pacific
Peregrine Semiconductor Corp.
9450 Carroll Park Drive
San Diego, CA 92121
Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel 858-731-9400
Fax 858-731-9499
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Europe
South Asia Pacific
Peregrine Semiconductor Europe
Commercial Products:
Bâtiment Maine
13-15 rue des Quatre Vents
F- 92380 Garches, France
Tel: +33-1-47-41-91-73
Peregrine Semiconductor
28G, Times Square,
No. 500 Zhangyang Road,
Shanghai, 200122, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
Fax : +33-1-47-41-91-73
Space and Defense Products:
180 Rue Jean de Guiramand
13852 Aix-En-Provence cedex 3, France
Tel: +33(0) 4 4239 3361
Fax: +33(0) 4 4239 7227
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Preliminary Specification
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS is a trademark of Peregrine Semiconductor
Corp.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0069-03 │ UltraCMOS™ RFIC Solutions
Page 8 of 8
相关型号：
©2020 ICPDF网 联系我们和版权申明