PE83513_06 [PSEMI]
DC - 1500 MHz Low Power UltraCMOS Divide-by-8 Prescaler Military Operating Temperature Range; 直流 - 1500兆赫低功率的UltraCMOS分频预分频器的8军用工作温度范围
| 型号： | PE83513_06 |
| 厂家： | 
Peregrine Semiconductor |
| 描述： | DC - 1500 MHz Low Power UltraCMOS Divide-by-8 Prescaler Military Operating Temperature Range |
| 文件： | 总7页 (文件大小：237K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Product Specification
PE83513
DC - 1500 MHz Low Power UltraCMOS™
Divide-by-8 Prescaler
Product Description
Military Operating Temperature Range
The PE83513 is a high-performance static UltraCMOS™
prescaler with a fixed divide ratio of 8. Its operating frequency
range is DC to 1500 MHz. The PE83513 operates on a nominal
3 V supply and draws only 14 mA. It is packaged in a small
8-lead plastic MSOP and is ideal for frequency scaling and
clock generation solutions.
Features
• DC to 1500 MHz operation
• Fixed divide ratio of 8
• Low-power operation: 14 mA
The PE83513 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
typical @ 3.0 V
• Ultra small package: 8-lead MSOP
Figure 2. Package Type
Figure 1. Functional Schematic Diagram
8-lead MSOP
Table 1. Electrical Specifications (ZS = ZL = 50 Ω)
2.85 V ≤ VDD ≤ 3.15 V; -55° C ≤ TA ≤ 125° C, unless otherwise specified
Parameter
Conditions
Minimum
Typical
Maximum
Units
V
Supply Voltage
2.85
3.0
7
3.15
12
OUTB Disabled
OUTB Enabled
mA
mA
Supply Current
14
25
Input Frequency (FIN)
DC
-5
1500
+10
MHz
dBm
100 MHz ≤ Fin ≤ 1200 MHz
-55°C ≤ TA ≤ 85°C
100 MHz ≤ Fin ≤ 1200 MHz
85°C ≥ TA ≥ 125°C
Input Power (PIN)
Output Power
0
+10
+10
dBm
1200 MHz < Fin ≤ 1500 MHz
-55°C ≤ TA ≤ 85°C
+5
+2
dBm
dBm
DC < Fin ≤ 1500MHz
Document No. 70-0118-03 │ www.psemi.com
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 7
PE83513
Product Specification
Figure 3. Pin Configuration (Top View)
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
1
2
3
4
8
7
6
5
VDD
IN
GND
OUT
CTL
OUT
PE83513
N/C
GND
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 2. Pin Descriptions
Device Functional Considerations
Pin
Name
Pin No.
Description
The PE83513 divides an input signal, up to a
frequency of 1500 MHz, by a factor of eight
thereby producing an output frequency at one
fourth the input frequency. To work properly at
higher frequency, the input and output signals
(pins 2 , 7 & optional 5) must be AC coupled via
an external capacitor. The input may be DC
coupled for low frequency operation with care
taken to remain within the specified DC input
range for the device.
Power supply pin. Bypassing is required
(eg 1000 pF & 100 pF).
1
2
3
VDD
Input signal pin. Should be coupled with a
capacitor (eg 1000 pF).
IN
No connection. This pin should be left
open.
N/C
Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
4
GND
Inverted divided frequency output. This pin
should be coupled with a capacitor
(eg 1000 pF).
5
6
OUTB
CTL
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance. See Figure 8 for a layout example.
Control pin. When grounded OUTB is
enabled.
OUTB Control
Divided frequency output. This pin should
be coupled with a capacitor (eg 1000 pF).
7
8
OUT
GND
Pin 6 controls whether OUTB is enabled or
disabled. Pin 6 has an internal pull-up resistor.
With no connection (floating), OUTB is disabled.
By grounding pin 6, OUTB is enabled. By
enabling OUTB, this part will use roughly 5 mA
more current.
Ground Pin.
Table 3. Absolute Maximum Ratings
Symbol
Parameter/Conditions
Min Max Units
VDD
Pin
Supply voltage
Input Power
4.0
15
V
dBm
VDD
+0.3
VIN
TST
Voltage on input
-0.3
-65
V
Storage temperature range
150
°C
Operating temperature
range
TOP
-55
125
°C
V
ESD voltage (Human Body
Model, MIL-STD 883)
VESD
2000
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Exposure
to absolute maximum ratings for extended periods
may affect device reliability.
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0118-03 │ UltraCMOS™ RFIC Solutions
Page 2 of 7
PE83513
Product Specification
Typical Performance Data: VDD = 3.0 V
Figure 4. Input Sensitivity
Figure 5. Device Current (OUTB Enabled)
Figure 6. Output Power (OUT or OUTB)
Document No. 70-0118-03 │ www.psemi.com
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 7
PE83513
Product Specification
J2 provides DC power to the device. Starting from the
lower left pin, the second pin to the right (J2-3) is
connected to the device VDD pin (1). Two decoupling
capacitors (10 pF, 1000 pF) are included on this trace.
It is the responsibility of the customer to determine
proper supply decoupling for their design application.
Evaluation Kit
Evaluation Kit Operation
The PE83513 EK board was designed to ease
customer evaluation of Peregrine’s high performance
divide-by-8 Military Grade Prescaler. On this board,
the device input (pin 2) is connected via J1 and a 50ꢀ
transmission line. A series capacitor (C3) provides the
necessary DC block for the device input. It is important
to note that the value of this capacitance will impact the
performance of the device. A value of 1000pF was
found to be optimal for this board layout; other
Applications Support
If you have a problem with your evaluation kit or if you
have applications questions call (858) 731-9400 and
ask for applications support. You may also contact us
by fax or e-mail:
Fax: (858) 731-9499
E-Mail: help@psemi.com
applications may require a different value.
The device output (pin 7) is connected to connector J3
through a 50ꢀ transmission line. A series capacitor
(C1) provides the necessary DC block for the device
output. Note that this capacitor must be chosen to
have low impedance at the desired output frequency
the device. The value of 1000pF was chosen to
provide a wide operating range for the evaluation
board.
Figure 7. Evaluation Board Layouts
Peregrine Specification 101/0190
The board is constructed of a two-layer FR4 material
with a total thickness of 0.031”. The bottom layer
provides ground for the RF transmission lines. The
transmission lines were designed using a coplanar
waveguide above ground plane model with trace width
of 0.030”, trace gaps of 0.007”, dielectric thickness of
0.028”, metal thickness of 0.0014” and εr of 4.4. Note
that the predominate mode for these transmission lines
is coplanar waveguide.
Figure 8. Evaluation Board Schematic
Peregrine Specification 102/0201
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0118-03 │ UltraCMOS™ RFIC Solutions
Page 4 of 7
PE83513
Product Specification
Figure 9. Package Drawing
8-lead MSOP
TOP VIEW
0.65BSC
.525BSC
8
7
6
5
2.45±0.10
2X
3.00±0.10
0.51±0.13
0.51±0.13
- B -
2
3
4
1
.25 A B C
- C -
2.95±0.10
0.86±0.08
2.95±0.10
1.10 MAX
- A -
+0.07
-0.08
3.00±0.10
4.90±0.15
0.10 A
0.33
0.08
0.10±0.05
A B C
3.00±0.10
FRONT VIEW
SIDE VIEW
Document No. 70-0118-03 │ www.psemi.com
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 7
PE83513
Product Specification
Figure 10. Tape and Reel Specifications
8-lead MSOP
Pin1
Table 4. Ordering Information
Order Code
83513-01
Part Marking
PE83513
Description
Package
Shipping Method
50 units / Tube
2000 units / T&R
1 / Box
PE83513-08MSOP-50A
8-lead MSOP
83513-02
PE83513
PE83513-08MSOP-2000C
PE83513-08MSOP-EK
8-lead MSOP
Evaluation Kit
83513-00
PE83513-EK
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0118-03 │ UltraCMOS™ RFIC Solutions
Page 6 of 7
PE83513
Product Specification
Sales Offices
The Americas
North Asia Pacific
Peregrine Semiconductor Corporation
Peregrine Semiconductor K.K.
9450 Carroll Park Drive
San Diego, CA 92121
Tel: 858-731-9400
Teikoku Hotel Tower 10B-6
1-1-1 Uchisaiwai-cho, Chiyoda-ku
Tokyo 100-0011 Japan
Fax: 858-731-9499
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Europe
Peregrine Semiconductor, Korea
#B-2402, Kolon Tripolis, #210
Geumgok-dong, Bundang-gu, Seongnam-si
Gyeonggi-do, 463-480 S. Korea
Tel: +82-31-728-4300
Peregrine Semiconductor Europe
Bâtiment Maine
13-15 rue des Quatre Vents
F-92380 Garches, France
Tel: +33-1-4741-9173
Fax : +33-1-4741-9173
Fax: +82-31-728-4305
South Asia Pacific
Space and Defense Products
Americas:
Peregrine Semiconductor, China
Shanghai, 200040, P.R. China
Tel: +86-21-5836-8276
Tel: 858-731-9453
Fax: +86-21-5836-7652
Europe, Asia Pacific:
180 Rue Jean de Guiramand
13852 Aix-En-Provence Cedex 3, France
Tel: +33-4-4239-3361
Fax: +33-4-4239-7227
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Preliminary Specification
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS and HaRP are trademarks of Peregrine
Semiconductor Corp.
Document No. 70-0118-03 │ www.psemi.com
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 7 of 7
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