PE9309-00 [PSEMI]
3.0 - 13.5 GHz Low Power UltraCMOS Divide-by-4 Prescaler; 3.0 - 13.5 GHz的低功耗的UltraCMOS除以4分频器
| 型号： | PE9309-00 |
| 厂家： | 
Peregrine Semiconductor |
| 描述： | 3.0 - 13.5 GHz Low Power UltraCMOS Divide-by-4 Prescaler |
| 文件： | 总6页 (文件大小：219K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Preliminary Specification
PE9309
3.0 - 13.5 GHz Low Power UltraCMOS™
Divide-by-4 Prescaler
Product Description
The PE9309 is a high-performance dynamic UltraCMOS™
prescaler with a fixed divide ratio of 4. Its operating frequency
range is 3.0 GHz to 13.5 GHz. The PE9309 operates on a single
supply with a frequency-selecting bias resistor and draws only
16 mA. It is packaged in a small 8-lead Flat Pack and is also
available in Die form for Hybrid application.
Features
• High-frequency operation: up to 13.5 GHz
• Fixed divide ratio of 4
• Low-power operation:16 mA typical @
2.6V
• Small package: 8-lead Formed Flat pack
• Available as Die
The PE9309 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance of
GaAs with the economy and integration of conventional CMOS.
Typical Industries
Figure 2. Package Type
8-lead CSOIC
•
•
•
•
•
•
•
Medical
Automotive
Telecom Infrastructure
Test Instrumentation
Down-hole oil/gas
Military
Screening available for commercial
space applications
Figure 1. Functional Schematic Diagram
SET
SET
D
Q
Q
D
Q
Q
ESD
ESD
Output Buffer
Chip Boundary
Table 1. Electrical Specifications (ZS = ZL = 50 Ω) -40° C ≤ TA ≤ 85° C, unless otherwise specified
Parameter
Conditions
Minimum
Typical
Maximum
Units
Frequency
3.0
13.5
GHz
Output Power (Pout)
Input Power (Pin)
0.75 GHz ≤ Fout ≤ 3.375 GHz
3.0 GHz ≤ Fin < 13.5 GHz
0
0
dBm
dBm
7
Document No. 70-0241-04 │ www.psemi.com
©2007-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 6
PE9309
Preliminary Specification
Figure 3. Pin Configuration (Top View)
Table 4. Absolute Maximum Ratings
Symbol Parameter/Conditions Min
Max
Units
VBYPS
1
2
3
4
8
7
6
5
RBIAS
VDD
TST
DC Supply voltage
3.0
V
Storage temperature
range
-65
-40
150
85
°C
°C
VBYPS
RF IN
GND
VDD
9309
Operating temperature
range
TOP
RF OUT
NC
Top View
ESD voltage (Human
Body Model)
VESD
PINMAX
250
14
V
Maximum input power
dBm
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted
to the limits in the Operating Ranges table.
Operation between operating range maximum and
absolute maximum for extended periods may reduce
reliability.
GND
Side View
Table 2. Pin Descriptions
Pin No. Pin Name
Description
Device Functional Considerations
1
2
3
4
5
6
7
8
VBYPS
VBYPS
IN
Prescaler Supply Bypass
Prescaler Supply Bypass
RF Input
The PE9309 divides a 3.0 GHz to 13.5 GHz input
signal by four, producing a 750 MHz to 3.375 GHz
output signal. In order for the prescaler to work
properly, several conditions need to be adhered to.
It is crucial that pins 1, 2 and 7 be supplied with
bypass capacitors to ground. In addition, the output
signal (pins 6) needs to be ac coupled via an
external capacitor as shown in the test circuit in
Figure 5.
GND
NC
Ground
Not Connected
OUT
VDD
RF Output.
Supply Voltage
RBIAS
Frequency-Selecting Bias Resistor
Bottom of the package is Ground.
Connecting the bottom of the package to
ground is required
The input frequency range is selected by the value
of RBIAS according to Figure 4.
GND
GND
The ground pattern on the board should be made as
wide as possible to minimize ground impedance.
Table 3. Operating Ranges
Parameter
Min
Typ
Max
Units
The bottom of the package is the primary ground
connection and it needs to be soldered to the PCB
ground.
Supply Voltage (VDD
)
2.45
2.6
2.75
V
Supply Current (IDD
)
6
23
mA
Figure 4. Frequency versus RBIAS
15
14
Electrostatic Discharge (ESD) Precautions
Lower Freq Lim
13
12
11
10
9
When handling this UltraCMOS™ device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Optimal Freq Lim
Upper Freq Lim
8
7
6
5
4
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
3
2
0
5
10
15
20
25
30
35
40
45
50
55
60
RBIAS (KOhm)
©2007-2009 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0241-04 │ UltraCMOS™ RFIC Solutions
Page 2 of 6
PE9309
Preliminary Specification
Figure 5. Test Circuit Block Diagram
RBIAS
10 pF
RBIAS
VDD
1
8
7
6
5
VBYPS
VBYPS
IN
2
3
4
0.01µF
10 pF
VDD
9309
OUT
50ꢀ
10 pF
0.01µF
T Line*
GND
NC
Spectrum Analyzer
50ꢀ
6.8 pF
RF Source
T Line*
GND
Side View
*T Line = Transmission Line
Figure 6. High Frequency System Application
The wideband frequency of operation of the PE9309 makes it an ideal part for use in a DBS
down converter system.
BASEBAND
OUTPUT
FM
DEMOD
INPUT
BPF
SAW
AGC
st
DBS 1 IF
DIVIDE BY 4
PE97632
LOW NOISE
PLL SYNTH
9309
LPF
Document No. 70-0241-04 │ www.psemi.com
©2007-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 3 of 6
PE9309
Preliminary Specification
Figure 7. Evaluation Board Layouts
Peregrine Specification 101-0392
Evaluation Kit
The Ceramic SOIC Prescaler Evaluation Board was
designed to help customers evaluate the PE9309
divide-by-4 prescaler. On this board, the device input
(pin 3) is connected to the SMA connector J5 through a
50 ꢀ transmission line. The device output (pin 6) is
connected to SMA connector J6 through a 50 ꢀ
transmission line.
J4 provides DC power to the device via pin 7. J2
powers U2. Multiple decoupling capacitors
(C4,6,13,16=10pF, C3,5,14,15=0.01uF) are used. One
out of eight different resistors for RBIAS is selected by
toggling SW1, SW2 and SW3 according to the table
shown in Figure 8. Jumper on J3 should be on to lower
setting (1 and 2). It is the responsibility of the customer
to determine proper supply decoupling for their design
application. The board is constructed using 4 layers.
The top and bottom layers are comprised of Rogers low
loss 4350 material having a core thickness of 0.010";
while the internal layers are comprised of FR-4. The
overall board thickness is 0.062".
Applications Support
If you have a problem with your evaluation kit or if you
have applications questions call (858) 731-9400 and
ask for applications support. You may also contact us
by fax or e-mail:
Fax: (858) 731-9499
E-Mail: help@psemi.com
Figure 8. Evaluation Board Schematic
Peregrine Specification 102-0468
VDD
1
VDD2
U2
VDD1
ADG708_16LEAD_TSSOP
J2
2
J4
J3
HEADER
HEADER 2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDD1
A0
A1
A2
A0
EN
VSS
S1
S2
S3
S4
D
A1
A2
SW3 SW2 SW1 Rbias
1
2
3
+
+
1
2
1
2
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
5.6K
C11
C8
10µF
10µF
8.2K
GND
VDD
S5
12.0K
18.0K
27.0K
39.0K
56.0K
82.0K
Hi Z
0
OHM
R16
R8
R9
5.6K
8.2K
27.0K
R12
R10
R11
39.0K
56.0K
82.0K
12.0K
18.0K
R13
R14
S6
VDD1
S7
R15
X
S8
C5
C6
0.01uF
10pF
VDD1
10pF
VDD2
C13
VDD1
0.01uF
C14
VDD1
R22
DNI
R21
R18
DNI
DNI
0
OHM
J1
R20
CA1
DNI
DNI
4
3
2
1
C3
C4
10pF
2
3
4
5
10
C15
C16
R24
R25
R26
DNI
A2
A1
A0
0.01uF
9
8
7
0.01uF
10pF
DNI
DNI
U1
Prescaler
1
8
7
6
5
J5
J6
VBYPS RBIAS
2
3
4
R2
VBYPS
IN
VDD
OUT
NC
C7
1
1
DNI
GND
6.8pF
R3
R4
DNI
R6
R5
DNI
DNI
DNI
VDD2
C9
10pF
C10
0.01uF
J7
J8
50 OHM
PCB MOUNTING HOLES
1
1
MT1
MT2
MT3
MT4
NOTES:
1. USE 101-0392-01 PCB
2. CAUTION:
CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE
TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD)
3. ALL TRANSMISION LINES ARE:
35MIL WIDTH, 14MIL GAPS, 20MIL CORE DIELECTRIC
3.48 Er AND 2.8MIL Cu THICKNESS.
©2007-2009 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0241-04 │ UltraCMOS™ RFIC Solutions
Page 4 of 6
PE9309
Preliminary Specification
Figure 9. Package Drawing
8-lead CSOIC
.380 / .410
.210 / .250
Pin 1
.180 SQ MAX
.050 TYP
.150 TYP
TOP VIEW
.015 TYP
.005 Typ .070 Max
SIDE VIEW
ALL DIMENSIONS ARE IN INCHES
DRAWINGS ARE NOT TO SCALE
Table 5. Ordering Information
Order
Code
Part
Marking
Screening
Specification
Shipping
Method
Description
Package
9309-01
9309-11
9309-99
9309-00
9309
PE9309-08CFPJ-B Engineering Samples
8-lead FLAT PACK
8-lead FLAT PACK
DIE
50 / Tray
9309
PE9309-08CFPJ-B, Production Units
DIE, Production Units
01-00151
01-00322
50 / Tray
PE9309A
PE9309-EK
100 / Waffle Pack
1 / Box
PE9309 Evaluation Kit
Evaluation Board
Notes: 1. Document 01-0015: Quality Requirements for Space Applications
2. Document 01-0032: Quality Requirements for the Evaluation of Semiconductor Dice for Space Applications
Document No. 70-0241-04 │ www.psemi.com
©2007-2009 Peregrine Semiconductor Corp. All rights reserved.
Page 5 of 6
PE9309
Preliminary Specification
Sales Offices
The Americas
Peregrine Semiconductor Corporation
Peregrine Semiconductor, Asia Pacific (APAC)
Shanghai, 200040, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
9380 Carroll Park Drive
San Diego, CA 92121
Tel: 858-731-9400
Fax: 858-731-9499
Peregrine Semiconductor, Korea
#B-2607, Kolon Tripolis, 210
Geumgok-dong, Bundang-gu, Seongnam-si
Gyeonggi-do, 463-943 South Korea
Tel: +82-31-728-3939
Europe
Peregrine Semiconductor Europe
Bâtiment Maine
Fax: +82-31-728-3940
13-15 rue des Quatre Vents
F-92380 Garches, France
Tel: +33-1-4741-9173
Fax : +33-1-4741-9173
Peregrine Semiconductor K.K., Japan
Teikoku Hotel Tower 10B-6
1-1-1 Uchisaiwai-cho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Hi-Rel and Defense Products
Americas:
Tel: 858-731-9453
Europe, Asia Pacific:
180 Rue Jean de Guiramand
13852 Aix-En-Provence Cedex 3, France
Tel: +33-4-4239-3361
Fax: +33-4-4239-7227
For a list of representatives in your area, please refer to our Web site at: www.psemi.com
Data Sheet Identification
Advance Information
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Preliminary Specification
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS, HaRP, MultiSwitch and DuNE are trademarks
of Peregrine Semiconductor Corp.
©2007-2009 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0241-04 │ UltraCMOS™ RFIC Solutions
Page 6 of 6
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