ASM805LCSA-T [PULSECORE]
2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, 0.150 INCH, SOIC-8;
| 型号： | ASM805LCSA-T |
| 厂家： | 
PulseCore Semiconductor |
| 描述： | 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, 0.150 INCH, SOIC-8 光电二极管 |
| 文件： | 总15页 (文件大小：549K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ASM690A/692A and ASM802L/802M and ASM805L
μP Power Supply Supervisor
With Battery Backup Switch
General Description
The ASM690A / ASM692A / ASM802L / ASM802M /
ASM805L offers complete single chip solutions for power
supply monitoring and control battery functions in
microprocessor systems. Each device implements four
functions: Reset control, watchdog monitoring, battery-
backup switching and powerfailure monitoring. In addition
to microprocessor reset under power-up and power-down
conditions, these devices provide battery-backup
switching to maintain control in power loss and brown-out
situations. Additional monitoring capabilities can provide
an early warning of unregulated power supply loss before
the voltage regulator drops out. The important features of
these four functions are:
No external components
Specified over full temperature range
Applications
Embedded control systems
Portable/Battery operated systems
Intelligent instruments
Wireless instruments
Wireless communication systems
PDAs and hand-held equipments
μP / μC power supply monitoring
Safety system
1.6 second watchdog timer to keep microprocessor
responsive
Typical Operating Circuit
4.40V or 4.65V VCC threshold for microprocessor
reset at power-up and power-down
SPDT (Single-pole, Double-throw) PMOS switch
connects backup power to RAM if VCC fails
1.25V threshold detector for power loss or general
purpose voltage monitoring
These features are pin-compatible with the industry
standard power-supply supervisors. Short-circuit and
thermal protection have also been added. The ASM690A
/ ASM802L / ASM805L generate a reset pulse when the
supply voltage drops below 4.65V and the ASM692A /
ASM802M generate a reset below 4.40V. The ASM802L /
ASM802M have power-fail accuracy to ±2%. The
ASM805L is the same as the ASM690A except that
RESET is provided instead of RESET.
Block Diagram
Features
Two precision supply-voltage monitor options
4.65V (ASM690A / ASM802L / ASM805L)
4.40V (ASM692A / ASM802M )
Battery-backup power switch on-chip
Watchdog timer: 1.6 second timeout
Power failure / low battery detection
Short circuit protection and thermal limiting
Small 8-pin SO and 8-pin PDIP packages
©2010 SCILLC. All rights reserved.
January 2010 – Rev. 2
Publication Order Number:
ASM690/D
ASM690A/692A and ASM802L/802M and ASM805L
Pin Configuration
Pin Description
Pin Number
ASM690A/
Name
Function
ASM692A
ASM802L/
ASM802M
ASM805L
Voltage supply for RAM. When VCC is above the reset threshold, VOUT
connects to VCC through a P-Channel MOS device. If VCC falls below the
reset threshold, this output will be connected to the backup supply at VBATT
(or VCC, whichever is higher) through the MOS switch to provide continuous
power to the CMOS RAM.
1
1
VOUT
2
3
2
3
VCC
+5V power supply input.
GND
Ground.
Power failure monitor input. PFI is connected to the internal power fail
comparator which is referenced to 1.25V. The power fail output (PFO) is
active LOW but remains HIGH if PFI is above 1.25V. If this feature is
unused, the PFI pin should be connected to GND or VOUT.
Power-fail output. PFO is active LOW whenever the PFI pin is less than
1.25V.
4
5
4
5
PFI
PFO
WDI
Watchdog input. The WDI input monitors microprocessor activity. An internal
timer is reset with each transition of the WDI input. If the WDI is held HIGH
or LOW for longer than the watchdog timeout period, typically 1.6 seconds,
RESET (or RESET) is asserted for the reset pulse width time, tRS, of
140ms, minimum.
6
7
6
Active-LOW reset output. When triggered by VCC falling below the reset
threshold or by watchdog timer timeout, RESET pulses low for the reset
pulse width tRS, typically 200ms. It will remain low if VCC is below the reset
-
RESET threshold (4.65V in ASM690A / ASM802L and 4.4V in the ASM692A /
ASM802L) and remains low for 200ms after VCC rises above the reset
threshold.
-
7
8
RESET Active-HIGH reset output. The inverse of RESET.
Auxiliary power or backup-battery input. VBATT should be connected to GND
8
VBATT
if the function is not used. The input has about 40mV of hysteresis to
prevent rapid toggling between VCC and VBATT.
Rev. 2 | Page 2 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Detailed Description
Application Information
Microprocessor Interface
It is important to initialize a microprocessor to a known
state in response to specific events that could create
code execution errors and “lock-up”. The reset output of
these supervisory circuits send a reset pulse to the
microprocessor in response to power-up, power-
down/power-loss or a watchdog time-out.
The ASM690 has logic-LOW RESET output while the
ASM805 has an inverted logic-HIGH RESET output.
Microprocessors with bidirectional reset pins can pose a
problem when the supervisory circuit and the
microprocessor output pins attempt to go to opposite
logic states. The problem can be resolved by placing a
4.7kΩ resistor between the RESET output and the
microprocessor reset pin. This is shown in Figure 2.
Since the series resistor limits drive capabilities, the reset
signal to other devices should be buffered.
RESET/RESET Timing
Power-up reset occurs when a rising VCC reaches the
reset threshold, VRT, forcing a reset condition in which
the reset output is asserted in the appropriate logic state
for the duration of tRS. The reset pulse width, tRS, is
typically around 200ms and is LOW for the ASM690A,
ASM692A, ASM802 and HIGH for the ASM805L. Figure
1 shows the reset pin timing.
Power-loss or “brown-out” reset occurs when VCC dips
below the reset threshold resulting in a reset assertion for
the duration of tRS. The reset signal remains asserted as
long as VCC is between VRT and 1.1V, the lowest VCC for
which these devices can provide a guaranteed logic-low
output. To ensure logic inputs connected to the ASM690A
/ ASM692A/ASM802 RESET pin are in a known state
when VCC is under 1.1V, a 100kΩ pull-down resistor at
RESET is needed: the logic-high ASM805L will need a
pull-up resistor to VCC.
Watchdog Timer
A Watchdog time-out reset occurs when a logic “1” or
logic “0” is continuously applied to the WDI pin for more
than 1.6 seconds. After the duration of the reset interval,
the watchdog timer starts a new 1.6 second timing
interval; the microprocessor must service the watchdog
input by changing states or by floating the WDI pin before
this interval is finished. If the WDI pin is held either HIGH
or LOW, a reset pulse will be triggered every 1.8 seconds
(the 1.6 second timing interval plus the reset pulse width
tRS).
Rev. 2 | Page 3 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Watchdog Input
As discussed in the Reset section, the Watchdog input is
used to monitor microprocessor activity. It can be used to
insure that the microprocessor is in
a continually
responsive state by requiring that the WDI pin be toggled
every second. If the WDI pin is not toggled within the 1.6
second window (minimum tWD + tRS), a reset pulse will be
asserted to return the microprocessor to the initial start-
up state. Pulses as short as 50ns can be applied to the
WDI pin. If this feature is not used, the WDI pin should be
open circuited or the logic placed into a high-impedance
state to allow the pin to float.
Backup-Battery Switchover
Table 1. Pin Connections in Battery Backup Mode
A power loss can be made less severe if the system RAM
contents are preserved. This is achieved in the
ASM690/692/802/805 by switching from the failed VCC to
an alternate power source connected at VBATT when VCC
is less than the reset threshold voltage (VCC < VRT), and
VCC is less than VBATT. The VOUT pin is normally
connected to VCC through a 2Ω PMOS switch but a
brown-out or loss of VCC will cause a switchover to VBATT
by means of a 20Ω PMOS switch. Although both
conditions (VCC < VRT and VCC < VBATT) must occur for
the switchover to VBATT to occur, VOUT will be switched
back to VCC when VCC exceeds VRT irrespective of the
voltage at VBATT. It should be noted that an internal
device diode (D1 in Figure 3) will be forward biased if
VBATT exceeds VCC by more than a diode drop when VCC
is switched to VOUT. Because of this it is recommended
that VBATT be no greater than VRT +0.6V.
Pin
Connection
Connected to VBATT through internal
PMOS switch
VOUT
VBATT
Connected to VOUT
Disabled
PFI
Logic-LOW
PFO
RESET
WDI
Logic-LOW (except on ASM805 where
it is HIGH)
Watchdog timer disabled
During the backup power mode, the internal circuitry of
the supervisory circuit draws power from the battery
supply. While VCC is still alive, the comparator circuits
remain alive and the current drawn by the device is
typically 35μA. When VCC drops more than 1.1V below
VBATT, the internal switchover comparator, the PFI
comparator and WDI comparator will shut off, reducing
the quiescent current drawn by the IC to less than 1μA.
Condition
SW1/SW2
Open
SW3/SW4
Closed
Closed
Open
VCC > Reset Threshold
Backup Power Sources - Batteries
VCC < Reset Threshold
VCC > VBATT
Open
Battery voltage selection is important to insure that the
battery does not discharge through the parasitic device
diode D1 (see Figure 3) when VCC is less than VBATT and
VCC >VRT.
VCC < Reset Threshold
VCC < VBATT
Closed
ASM690A/802A/805L Reset Threshold = 4.65V
ASM692A /ASM802M Reset Threshold = 4.4V
Rev. 2 | Page 4 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Table 2: Maximum Battery Voltages
Part Number
MAXIMUM Battery Voltage (V)
ASM690A
ASM802L
ASM805L
ASM692A
ASM802M
4.80
4.80
4.80
4.55
4.55
Although most batteries that meet the requirements of
Table 2 are acceptable, lithium batteries are very
effective backup source due to their high-energy density
and very low self-discharge rates.
Battery replacement while Powered
Batteries can be replaced even when the device is in a
powered state as long as VCC remains above the reset
threshold voltage VRT. In the ASM devices, a floating
VBATT pin will not cause a powersupply switchover as can
occur in some other supervisory circuits. If VBATT is not
used, the pin should be grounded.
Backup Power Sources - SuperCap™
Capacitor storage, with very high values of capacitance,
can be used as a back-up power source instead of
batteries. SuperCap™ are capacitors with capacities in
the fractional farad range. A 0.1 farad SuperCap™ would
provide a useful backup power source. Like the battery
supply, it is important that the capacitor voltage remain
below the maximum voltages shown in Table 2. Although
the circuit of Figure 4 shows the most simple way to
connect the SuperCap™, this circuit cannot insure that an
over voltage condition will not occur since the capacitor
will ultimately charge up to VCC. To insure that an over
voltage condition does not occur, the circuit of Figure 5 is
preferred. In this circuit configuration, the diode-resistor
pair clamps the capacitor voltage at one diode drop below
VCC. VCC itself should be regulated within ±5% of 5V for
the ASM692A/802M or within ±10% of 5V for the
ASM690A/802L/805L to insure that the storage
capacitordoes not achieve an over voltage state.
Operation without a Backup Power Source
When operating without a back-up power source, the
VBATT pin should be connected to GND and VOUT should
be connected to VCC, since power source switchover will
not occur. Connecting VOUT to VCC eliminates the voltage
drop due to the ON-resistance of the PMOS switch.
Note: SuperCapTM is a trademark of Baknor Industries
Rev. 2 | Page 5 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
excessive loading on the PFO pin. The calculations for
the correct values of resistors to set the hysteresis
Power-Fail Comparator
thresholds are given in Figure 7. A capacitor can be
added to offer additional noise rejection by low-pass
filtering.
The Power Fail feature is an independent voltage
monitoring function that can be used for any number of
monitoring activities. The PFI function can provide an
early sensing of power supply failure by sensing the
voltage of the unregulated DC ahead of the regulated
supply sensing seen by the backup-battery switchover
circuitry. The PFI pin is compared to a 1.25V internal
reference. If the voltage at the PFI pin is less than this
reference voltage, the PFO pin goes low. By sensing the
voltage of the raw DC power supply, the microprocessor
system can prepare for imminent power-loss, especially if
the battery backup supply is not enabled. The input
voltage at the PFI pin results from a simple resistor
voltage divider as shown in Figure 6.
Monitoring Capabilities of the Power-fail Input:
Although designed for power supply failure monitoring,
the PFI pin can be used for monitoring any voltage
condition that can be scaled by means of a resistive
divider. An example is the negative power supply monitor
configured in Figure 8. In this case a good negative
supply will hold the PFI pin below 1.25V and the PFO pin
will be at logic “0”. As the negative voltage declines, the
voltage at the PFI pin will rise until it exceeds 1.25V and
the PFO pin will go to logic “1”.
Power Fail Hysteresis
A noise margin can be added to the simple monitoring
circuit of Figure 6 by adding positive feedback from the
PFO pin. The circuit of Figure 7 adds this positive
“latching” effect by means of an additional resistor R3
connected between PFO and PFI which helps in pulling
PFI in the direction of PFO and eliminating an indecision
at the trip point. Resistor R3 is normally about 10 times
higher in resistance than R2 to keep the hysteresis band
reasonable and should be larger than 10kΩ to avoid
Rev. 2 | Page 6 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Rev. 2 | Page 7 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Absolute Maximum Ratings1
Parameter
Min
Max
Unit
Pin Terminal Voltage with Respect to Ground
VCC
-0.3
-0.3
6.0
6.0
V
V
VBATT
All other inputs2
-0.3
VCC + 0.3
200
V
Input Current at VCC
Input Current at VBATT
mA
mA
50
Input Current at GND
Output Current
VOUT
20
mA
Short circuit protected
All other inputs
20
mA
Rate of Rise: VBATT and VCC
100
V/μs
Continuous Power Dissipation
Plastic DIP (derate 9mW/°C above 70°C)
SO (derate 5.9mW/°C above 70°C)
Operating Temperature Range (C Devices)
Operating Temperature Range (E Devices)
800
500
70
mW
mW
°C
0
-40
85
°C
Storage Temperature Range
Lead Temperature (Soldering, 10 sec)
ESD rating
-65
160
300
°C
°C
HBM
MM
1
100
KV
V
Notes: 1. These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for prolonged time periods
may affect device reliability.
2. The input voltage limits on PFI and WDI may be exceeded if the current is limited to less than 10mA.
Rev. 2 | Page 8 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Electrical Characteristics
Unless other wise noted, VCC = 4.75V to 5.5V for the ASM690A / ASM802L / ASM805L and VCC = 4.5V to 5.5V for the
ASM692A / ASM802M;VBATT = 2.8V; and TA = TMIN to TMAX
.
Parameter
SYMBOL
Conditions
Min
TYP
Max
Unit
VCC, VBATT Voltage
1.1
5.5
V
Range1
Supply Current
Excluding IOUT
IS
35
100
μA
TA = 25°C
1.5
ISUPPLY in Battery
Backup Mode
VCC = 0V, VBATT = 2.8V
μA
(Excluding IOUT)
TA =TMIN to TMAX
5.0
VBATT Standby
Current2
TA = 25°C
TA =TMIN to TMAX
-0.1
-1.0
0.02
0.02
5.5V>VCC>VBATT + 0.2V
IOUT = 5mA
μA
VCC-
VCC-0.025 0.010
VCC-0.25
VOUT Output
V
VCC-
0.10
VBATT
-
IOUT = 50mA
VOUT in Battery
Backup Mode
IOUT=250μA, VCC < VBATT - 0.2V
VBATT- 0.1
V
0.001
Battery Switch
Threshold,
VCC to VBATT
Battery Switch over
Hysteresis
Power Up
Power Down
20
-20
VCC < VRT
mV
mV
40
ASM690A/802L/805L
ASM692A, ASM802M
ASM802L, TA = 25°C, VCC falling
ASM802M, TA=25°C, VCC falling
4.50
4.25
4.55
4.30
4.65
4.40
4.75
4.50
4.70
4.45
Reset Threshold
VRT
tRS
V
Reset Threshold
Hysteresis
40
mV
ms
Reset Pulse Width
140
200
280
ISOURCE = 800μA
ISINK = 3.2mA
VCC - 1.5
0.4
0.3
0.3
ASM69_AC,ASM802_C,VCC=1.0V,ISINK=50μA
ASM69_AE,ASM802_E,VCC=1.2V,ISINK=100μA
ASM805LC, ISOURCE=4μA, VCC = 1.1V
ASM805LE, ISOURCE=4μA, VCC = 1.2V
ASM805L, ISOURCE=800μA
Reset Output
Voltage
V
0.8
0.9
VCC - 1.5
ASM805L, ISINK=3.2mA
0.4
Watchdog Timeout
WDI Pulse Width
tWD
tWP
1.00
50
1.60
2.25
sec
VIL = 0.4V, VIH = 0.8VCC
WDI = VCC
WDI = 0V
ns
μA
μA
50
-50
150
0.8
WDI Input Current
-150
VCC = 5V, Logic LOW
V
WDI Input
Threshold3
VCC = 5V, Logic HIGH
3.5
Notes: 1. If VCC or VBATT is 0V, the other must be greater than 2.0V.
2. Battery charging-current is “-”. Battery discharge current is “+”.
3. WDI is guaranteed to be in an intermediate level state if WDI is floating and VCC is within the operating voltage range.
WDI input impedance is 50 kΩ. WDI is biased to 0.3VCC
.
Rev. 2 | Page 9 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Parameter
SYMBOL
Conditions
ASM69_A, ASM805L, VCC = 5V
ASM802_C/E, VCC = 5V
Min
1.20
1.225
TYP
1.25
1.250
Max
1.30
1.275
Unit
PFI Input Threshold
V
PFI Input Current
-25
0.01
25
nA
V
PFO Output
Voltage
ISOURCE = 800μA
ISINK = 3.2mA
VCC - 1.5
0.4
Rev. 2 | Page 10 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Package Dimensions
8-lead PDIP Package
Rev. 2 | Page 11 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
8-lead (150-mil) SOIC Package
Rev. 2 | Page 12 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Ordering Information - Tin - Lead Devices
Reset Threshold (V)
Temperature (°C)
Pins-Package
Package Marking
Part Number
ASM690A
ASM690ACPA
ASM690ACSA
ASM690AEPA
ASM690AESA
ASM692A
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM690ACPA
ASM690ACSA
ASM690AEPA
ASM690AESA
-40 to +85
-40 to +85
8-Plastic DIP
8-SO
ASM692ACPA
ASM692ACSA
ASM692AEPA
ASM692AESA
ASM802L
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM692ACPA
ASM692ACSA
ASM692AEPA
ASM692AESA
-40 to +85
-40 to +85
8-Plastic DIP
8-SO
ASM802LCPA
ASM802LCSA
ASM802LEPA
ASM802LESA
ASM802M
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM802LCPA
ASM802LCSA
ASM802LEPA
ASM802LESA
-40 to +85
-40 to +85
8-Plastic DIP
8-SO
ASM802MCPA
ASM802MCSA
ASM802MEPA
ASM802MESA
ASM805L
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM802MCPA
ASM802MCSA
ASM802MEPA
ASM802MESA
-40 to +85
-40 to +85
8-Plastic DIP
8-SO
ASM805LCPA
ASM805LCSA
ASM805LEPA
ASM805LESA
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM805LCPA
ASM805LCSA
ASM805LEPA
ASM805LESA
-40 to +85
8-Plastic DIP
-40 to +85
8-SO
Note: For parts to be packed in Tape and Reel, add “-T” at the end of the part number. ON Semiconductor lead free parts are RoHS compliant.
Rev. 2 | Page 13 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Ordering Information - Lead Free Devices
Part Number
ASM690A
Reset Threshold(V)
Temperature(°C)
Pins-Package
Package Marking
ASM690ACPAF
ASM690ACSAF
ASM690AEPAF
ASM690AESAF
ASM692A
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM690ACPAF
ASM690ACSAF
ASM690AEPAF
ASM690AESAF
-40 to +85
-40 to +85
8-Plastic DIP
8-SO
ASM692ACPAF
ASM692ACSAF
ASM692AEPAF
ASM692AESAF
ASM802L
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM692ACPAF
ASM692ACSAF
ASM692AEPAF
ASM692AESAF
-40 to +85
-40 to +85
8-Plastic DIP
8-SO
ASM802LCPAF
ASM802LCSAF
ASM802LEPAF
ASM802LESAF
ASM802M
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM802LCPAF
ASM802LCSAF
ASM802LEPAF
ASM802LESAF
-40 to +85
-40 to +85
8-Plastic DIP
8-SO
ASM802MCPAF
ASM802MCSAF
ASM802MEPAF
ASM802MESAF
ASM805L
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
4.25 to 4.50
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM802MCPAF
ASM802MCSAF
ASM802MEPAF
ASM802MESAF
-40 to +85
-40 to +85
8-Plastic DIP
8-SO
ASM805LCPAF
ASM805LCSAF
ASM805LEPAF
ASM805LESAF
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
4.5 to 4.75
0 to +70
0 to +70
8-Plastic DIP
8-SO
ASM805LCPAF
ASM805LCSAF
ASM805LEPAF
ASM805LESAF
-40 to +85
8-Plastic DIP
-40 to +85
8-SO
Note: For parts to be packed in Tape and Reel, add “-T” at the end of the part number. ON Semiconductor lead free parts are RoHS compliant.
Rev. 2 | Page 14 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any
products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising
out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical”
parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating
parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the
rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or
use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
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