P2005A-08TT [PULSECORE]
Clock Generator, 32MHz, CMOS, PDSO8, TSSOP-8;![P2005A-08TT](http://pdffile.icpdf.com/pdf2/p00240/img/icpdf/P2005S-08TT_1451213_icpdf.jpg)
型号: | P2005A-08TT |
厂家: | ![]() |
描述: | Clock Generator, 32MHz, CMOS, PDSO8, TSSOP-8 时钟 光电二极管 外围集成电路 晶体 |
文件: | 总10页 (文件大小:459K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
October 2003
rev 1.0
P2005A/S
Low Frequency EMI Reduction IC
Features
deviations ranging form ±0.6% to ±3.0%. Refer
Frequency Deviation Selections Table. The P2005X
reduces electromagnetic interference (EMI) at the clock
source, allowing system wide reduction of EMI of down
stream clock and data dependent signals. The P2005X
allows significant system cost savings by reducing the
number of circuit board layers ferrite beads, shielding
and other passive components that are traditionally
required to pass EMI regulations.
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FCC approved method of EMI attenuation.
Provides up to 15dB of EMI suppression.
Generates a 1X or ½ X low EMI spread spectrum
clock of the input frequency.
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Input frequency range: 8MHz to 32MHz.
Internal loop filter minimizes external components
and board space.
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Frequency deviation:
o
o
P2005A: ± 1% to ± 3%
P2005S: ± 0.6% to ± 1.8%
The P2005X uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
SSON# control pin for spread spectrum enable
and disable options.
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Low cycle-to-cycle jitter.
3.3V or 5V operating voltage range.
16mA output drives.
The P2005X modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
TTL or CMOS compatible outputs.
Ultra-low power CMOS design.
Available in 8-pin SOIC and TSSOP.
Product Description
The P2005X is a versatile spread spectrum frequency
modulator designed specifically for input clock
frequencies from 8MHz to 32MHz. Refer Output
Frequency Selection Table. The P2005X can generate an
EMI reduced clock from crystal, ceramic resonator, or
system clock. The P2005X offers various percentage
Applications
The P2005X is targeted towards EMI management for
high-speed digital applications such as PC peripheral
devices, consumer electronics and embedded controller
systems.
VDD
DIV2
SSON#
SR0
Block Diagram
PLL
Modulation
XIN
Crystal
Oscillator
Frequency
Divider
Output
Divider
Phase
Detector
Loop
Filter
VCO
XOUT
Feedback
Divider
MODOUT
VSS
Alliance Semiconductor
2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
October 2003
P2005X
rev 1.0
Pin Configuration
1
2
3
4
8
7
6
5
XIN /CLK
XOUT
VDD
ModOUT
P2005X
SSON#
SR0
DIV2
VSS
Pin Description
Pin
Pin#
Type
Description
Name
1
2
XIN/CLK
XOUT
I
Connect to crystal or clock.
Crystal output.
O
Digital logic input used to select normal output mode or divide-by-two output mode.
When this pin is HIGH, the frequency of the output clock is the same as the input
clock frequency. When it is tied low, the output frequency is half the input clock
frequency. This pin has an internal pull-up resistor.
3
DIV2
I
4
5
VSS
SR0
P
I
Ground to entire chip. Connect to system ground.
Digital logic input used to select Spreading Range Refer Modulation Output and
Spreading Range Selection Table. This pin has an internal pull-up resistor.
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread
Spectrum function enabled when LOW, disabled when HIGH. This pin has an internal
pull-low resistor.
6
SSON#
I
7
8
ModOUT
VDD
O
P
Spread spectrum clock output.
Power supply for the entire chip (+3.3V or 5.0V)
Output Frequency Selections
Input Frequency
8 MHz
4 MHz
8 MHz
12 MHz 16 MHz 20 MHz 24 MHz 28 MHz 32 MHz
6 MHz 8 MHz 10 MHz 12 MHz 14 MHz 16 MHz
12 MHz 16 MHz 20 MHz 24 MHz 28 MHz 32 MHz
0 (1/2 X)
DIV2
Output
Frequency
1 (1X)
Frequency Deviation Selections as a Function of Input Frequency
Input Frequency Range
Modulation
Rate (KHz)
P/N
SR0
8 MHz
± 3.0%
± 2.5%
± 1.8%
± 1.5%
12 MHz
± 2.5%
± 2.0%
± 1.5%
± 1.2%
16 MHz
± 2.0%
± 1.8%
± 1.2%
± 1.1%
20 MHz
± 1.8%
± 1.5%
± 1.1%
± 0.9%
24 MHz
± 1.5%
± 1.3%
± 0.9%
± 0.8%
28 MHz
± 1.5%
± 1.3%
± 0.9%
± 0.8%
32 MHz
± 1.3%
± 1.0%
± 0.8%
± 0.6%
0
1
0
1
P2005A
P2005S
(XIN/20) * 62.5
General purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
October 2003
rev 1.0
P2005X
Spread Spectrum
The Output Frequency Selection Table and the Frequency Deviations Selections Table illustrate the two
possible spread spectrum options. The optimal setting should minimize system EMI to the fullest without
affecting system performance. The spreading is described as a percentage deviation of the center frequency
(Note: The center frequency is the frequency of the external reference input on CLKIN, Pin1).
Example:
The P2005X is designed for communications, digital video and imaging applications. It is not only optimized for
operation in the 8MHz – 32MHz range, but its output frequency can be extended down to one half of the input
clock frequency using the divide-by-two feature. This feature extends low frequency as low as to 4MHz. Setting
Pin 3 low (DIV2 = 0; Divide-by-two mode) sets the output frequency (ModOUT) to half the frequency of the input
clock (CLKIN). This is a simple way to generate a spread spectrum modulated low frequency clock when only a
higher frequency signal is available. If you want the output frequency to be the same as the input, you can either
set DIV2=1 or leave it unconnected.
Selecting the P2005X’s spread options is a matter of either setting SR0=1 or SR0=0. Setting SR0=0 set as a
lower modulation spread, while setting it to 1 introduces a wider spectral spread in the output clock. Refer
Modulation output and Spreading Selections Tables. The example given in the figure below shows the device
set to the divide-by-two mode (DIV2=0) with a lower spectrum range (SR0=0). The versatility provided by
allowing both clock division and spread spectrum on one chip is already proving to be a popular solution among
leading system manufacturers.
P2005X Application Schematic
+3.3V
8.832MHz Crystal
1
2
3
4
8
7
6
5
CLKIN
VDD
MODOUT
XOUT
DIV2
VSS
0.1µF
Modulated 4.416MHz is
connected to CLK input
pin of the system
SSON#
SR0
P2005X
General purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
October 2003
rev 1.0
P2005X
EMC Software Simulation
By using Alliance’s proprietary EMC simulation software – EMI-Lator®, radiated system level EMI analysis can
be made easier, allowing quantitative measure on the benefits of Alliance’s EMI reduction products. The
simulation engine of this EMC software has already been characterized to correlate with the electrical
characteristics of Alliance EMI reduction ICs. The figure below is an illustration of this simulation result.
Please visit our website at www.alsc.com for information on how to obtain a free copy and demonstration of
EMI-Lator ®.
Simulation results From EMI-Lator®
General purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
October 2003
rev 1.0
P2005X
Absolute Maximum Ratings
Symbol
Parameter
Rating
-0.5 to + 7.0
-65 to +125
0 to 70
Unit
VDD, VIN
TSTG
Voltage on any pin with respect to GND
Storage temperature
V
°C
°C
TA
Operating temperature
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
VIL
VIH
Input low voltage
Input high voltage
GND – 0.3
2.0
-
-
0.8
V
V
VDD + 0.3
Input low current (pull-up resistors on inputs SR0, SR1,
CP0 and CP1)
IIL
-
-
-35
µA
IIH
Input high current (pull-down resistor on input SSON#)
XOUT Output Low Current (@ 0.4V, VDD = 3.3V)
XOUT Output High Current (@ 2.5V, VDD = 3.3V)
Output low voltage (VDD = 3.3V, IOL = 20mA)
Output high voltage (VDD = 3.3V, IOH = 20mA)
-
-
-
3
3
-
35
-
µA
IXOL
IXOH
VOL
VOH
mA
-
0.4
-
V
V
2.5
-
Dynamic supply current normal mode (3.3V, and 15pF
loading)
ICC
6.0
7.0
8.3
mA
IDD
Static supply current standby mode
Operating voltage
-
3.1
-
0.6
3.3
-
5.5
-
mA
V
VDD
tON
Power up time (first locked clock cycle after power up)
Clock output impedance
0.18
50
mS
Ω
ZOUT
-
-
General purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
October 2003
rev 1.0
P2005X
AC Electrical Characteristics
Symbol
Parameter
Min Typ Max Unit
fIN
Input frequency
8
4
-
-
32
32
MHz
MHz
ns
fOUT
tLH*
tHL*
tJC
Output frequency
Output rise time (measured at 0.8V to 2.0V)
Output fall time (measured at 2.0V to 0.8V)
Jitter (cycle to cycle)
0.7
0.6
-
0.9
0.8
-
1.1
1.0
360
55
ns
ps
tD
Output duty cycle
45
50
%
*tLH and tHL are measured into a capacitive load of 15pF
General purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
October 2003
rev 1.0
P2005X
Package Information
8-Pin SOIC
H
E
D
A2
A
C
θ
e
A1
L
B
Symbol Dimensions in inches Dimensions in millimeters
Min
Max
0.071
0.010
0.069
0.020
0.01
Min
1.45
0.10
1.35
0.31
0.10
4.72
3.75
Max
1.80
0.25
1.75
0.51
0.25
5.12
4.15
A
A1
A2
B
0.057
0.004
0.053
0.012
0.004
0.186
0.148
C
D
E
0.202
0.164
e
0.050 BSC
1.27 BSC
H
L
0.224
0.012
0°
0.248
0.028
8°
5.70
0.30
0°
6.30
0.70
8°
θ
General purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
October 2003
rev 1.0
P2005X
8-Pin TSSOP
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions in inches
Dimensions in millimeters
Symbol
Min
Max
Min
Max
1.10
0.15
1.05
0.30
0.20
3.10
4.50
A
A1
A2
B
0.047
0.002
0.031
0.007
0.004
0.114
0.169
0.006
0.041
0.012
0.008
0.122
0.177
0.05
0.80
0.19
0.09
2.90
4.30
C
D
E
e
0.026 BSC
0.65 BSC
H
L
0.244
0.018
0°
0.260
0.030
8°
6.20
0.45
0°
6.60
0.75
8°
θ
General purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
October 2003
P2005X
rev 1.0
Ordering Codes
Part Number
P2005X-08ST
P2005X-08SR
P2005X-08TT
P2005X-08TR
Marking
P2005X
P2005X
P2005X
P2005X
Package type
8 PIN SOIC, TUBE
Qty/reel
2,500
Temperature
0°C To 70°C
0°C To 70°C
0°C To 70°C
0°C To 70°C
8-PIN SOIC, TAPE AND REEL
8-PIN TSSOP, TUBE
8-PIN TSSOP, TAPE AND REEL
2,500
General purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
October 2003
rev 1.0
P2005X
Licensed under U.S Patent Nos 5,488,627 and 5,631,921
Alliance Semiconductor Corporation
2595, Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
Copyright © Alliance Semiconductor
All Rights Reserved
Preliminary Information
Part Number: P2005X
Document Version: v1.0
Fax: 408-855-4999
www.alsc.com
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are
trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their
respective companies. Alliance reserves the right to make changes to this document and its products at any time without
notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein
represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this
data at any time, without notice. If the product described herein is under development, significant changes to these
specifications are possible. The information in this product data sheet is intended to be general descriptive information for
potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or
customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product
described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products
including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual
property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance).
All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of
products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any
other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical
components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant
injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer
assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
General purpose EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
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