P2042AF-08SR [PULSECORE]
LCD Panel EMI Reduction IC; 液晶面板降低EMI IC型号: | P2042AF-08SR |
厂家: | PulseCore Semiconductor |
描述: | LCD Panel EMI Reduction IC |
文件: | 总9页 (文件大小:345K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
August 2007
rev 1.5
P2042A
LCD Panel EMI Reduction IC
Features
interference (EMI) at the clock source, allowing system
wide reduction of EMI of down stream clock and data
dependent signals. The P2042A allows significant system
cost savings by reducing the number of circuit board
•
•
•
FCC approved method of EMI attenuation.
Provides up to 15dB of EMI suppression.
Generates a low EMI spread spectrum clock of
the input frequency.
layers ferrite beads,
shielding and other passive
components that are traditionally required to pass EMI
regulations.
•
•
Input frequency range: 30MHz to 110MHz.
Optimized for 32.5MHz, 54MHz, 65MHz and
108MHz pixel clock frequencies.
Internal loop filter minimizes external components
and board space.
The P2042A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
•
•
•
Eight selectable high spread ranges up to ±
1.9%.
The P2042A modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
SSON# control pin for spread spectrum enable
and disable options.
•
•
•
•
Low cycle-to-cycle jitter.
3.3V ± 0.3V operating range.
Low power CMOS design.
Supports most mobile graphic accelerator and
LCD timing controller specifications.
Available in 8-pin SOIC and TSSOP Packages.
•
Applications
Product Description
The P2042A is targeted towards digital flat panel
applications for notebook PCs, palm-size PCs, office
automation equipments and LCD monitors.
The P2042A is a versatile spread spectrum frequency
modulator designed specifically for digital flat panel
applications. The P2042A reduces electromagnetic
Block Diagram
VDD
SSON#
SR0 CP1 CP0
PLL
Modulation
CLKIN
Frequency
Divider
Output
Divider
Phase
Detector
Loop
Filter
VCO
Feedback
Divider
ModOUT
VSS
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008 • Tel: 408-879-9077 • Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
August 2007
rev 1.5
P2042A
Pin Configuration
8
7
6
5
CLKIN
CP0
VDD
1
2
3
4
SR0
P2042A
ModOUT
SSON#
CP1
VSS
Pin Description
Pin
Pin#
Type
Description
Name
1
2
CLKIN
CP0
I
I
External reference frequency input. Connect to externally generated reference signal.
Digital logic input used to select charge pump current. This pin has an internal pull-up
resistor. Refer Modulation Selection Table.
Digital logic input used to select charge pump current. This pin has an internal pull-up
resistor. Refer Modulation Selection Table.
3
4
CP1
VSS
I
P
Ground to entire chip. Connect to system ground.
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread
Spectrum function enabled when LOW, disabled when HIGH.
This pin has an internal pull-low resistor.
5
SSON#
I
6
7
8
ModOUT
SR0
O
I
Spread spectrum clock output.
Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.
Power supply for the entire chip
VDD
P
Modulation Selection
CP0 CP1 SR0
Spreading Range (±%)
Modulation Rate
(KHz)
32.5MHz
0.56
54MHz
65MHz
1.00
1.56
1.00
1.56
0.66
1.02
0.34
0.54
81MHz
108MHz
0.80
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1.05
1.68
1.05
1.68
0.81
1.29
0.45
0.71
0.98
1.48
0.92
1.48
0.40
0.74
0.05
0.36
1.94
1.22
1.36
0.67
1.92
1.06
(FIN /40) * 62.49
KHz
1.24
0.27
1.91
0.43
0.91
0.15
1.47
0.21
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Notice: The information in this document is subject to change without notice.
August 2007
rev 1.5
P2042A
Spread Spectrum Selection
The Modulation Selection Table defines the possible spread spectrum options. The optimal setting should minimize system
EMI to the fullest without affecting system performance. The spreading is described as a percentage deviation of the center
frequency. (Note: The center frequency is the frequency of the external reference input on CLKIN, pin1).
For example, P2042A is designed for high-resolution, flat panel applications and is able to support an XGA (1024 x 768) flat
panel operating at 65MHz (FIN) clock speed. A spreading selection of CP0=0, CP1=1 and SR0=0 provides a percentage
deviation of ±1.00% from FIN. This results in the frequency on ModOUT being swept from 65.65 to 64.35MHz at a modulation
rate of 101.54KHz. Refer Modulation Selection Table. The example in the following illustration is a common EMI reduction
method for a notebook LCD panel and has already been implemented by most of the leading OEM and mobile graphic
accelerator manufacturers.
Application Schematic for Mobile LCD Graphics Controllers
Modulated 65MHz signal with
±1.00% deviation and
modulation rate of 101.54KHz.
This signal is connected back to
the spread spectrum input pin
(SSIN) of the graphics
+3.3V
65MHz from graphics accelerator
VDD
CLKIN
1
2
3
4
8
SR0
CP0
CP1
VSS
7
6
0.1µF
accelerator.
ModOUT
SSON#
5
Digital control for the SS enable
or disable
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LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
August 2007
rev 1.5
P2042A
Absolute Maximum Ratings
Symbol
Parameter
Rating
-0.5 to +4.6
-65 to +125
-40 to +85
260
Unit
V
VDD, VIN
TSTG
TA
Voltage on any pin with respect to Ground
Storage temperature
°C
Operating temperature
°C
Ts
Max. Soldering Temperature (10 sec)
Junction Temperature
°C
TJ
150
°C
TDV
2
KV
Static Discharge Voltage (As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Symbol
Parameter
Min
3.0
0
Typ
Max
3.6
Unit
VDD
Supply Voltage with respect to Ground
3.3
V
Commercial
Operating
+70
TA
°C
temperature
Industrial
-40
+85
SOIC
82.39
Commercial
Industrial
TSSOP
SOIC
79.8
97.39
94.8
Junction
temperature
TJ
°C
TSSOP
SOIC
156.5
124
θJC
°C/W
TSSOP
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Notice: The information in this document is subject to change without notice.
August 2007
rev 1.5
P2042A
DC Electrical Characteristics
Symbol
Parameter
Min
VSS - 0.3
2.0
Typ
Max
Unit
VIL
VIH
Input low voltage
0.8
V
Input high voltage
Input low current
VDD + 0.3
-35
V
IIL
µA
(pull-up resistor on inputs CP0, CP1 and SR0)
IIH
VOL
VOH
IDD
Input high current (pull-down resistor on input SSON#)
35
µA
V
Output low voltage (VDD = 3.3 V, IOL = 20 mA)
Output high voltage (VDD = 3.3 V, IOL = 20 mA)
Static supply current standby mode
Dynamic supply current (3.3V and 10pF loading)
Operating voltage
0.4
2.5
V
0.6
16
mA
mA
V
ICC
9
22
VDD
tON
3.0
3.3
0.18
50
3.6
Power-up time (first locked cycle after power up)
Clock output impedance
mS
Ω
ZOUT
AC Electrical Characteristics
Symbol
Parameter
Min
30
Typ
Max
110
110
1.1
Unit
MHz
MHz
nS
fIN
fOUT
tLH*
tHL*
tJC
Input frequency
Output frequency
65
65
30
Output rise time (measured at 0.8V to 2.0V)
Output fall time (measured at 2.0V to 0.8V)
Jitter (cycle to cycle)
0.7
0.6
0.9
0.8
1.0
nS
360
55
pS
tD
Output duty cycle
45
50
%
*tLH and tHL are measured into a capacitive load of 15pF
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Notice: The information in this document is subject to change without notice.
August 2007
rev 1.5
P2042A
Package Information
8-lead SOIC Package
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
0.010
0.069
0.059
0.020
0.010
Min
0.10
1.35
1.25
0.31
0.18
Max
0.25
1.75
1.50
0.51
0.25
A1
A
0.004
0.053
0.049
0.012
0.007
A2
B
C
D
E
0.193 BSC
0.154 BSC
0.050 BSC
0.236 BSC
4.90 BSC
3.91 BSC
1.27 BSC
6.00 BSC
e
H
L
0.016
0°
0.050
8°
0.41
0°
1.27
8°
θ
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Notice: The information in this document is subject to change without notice.
August 2007
rev 1.5
P2042A
8-lead TSSOP
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
Min
Max
A
A1
A2
B
0.043
0.006
0.037
0.012
0.008
0.122
0.177
1.10
0.002
0.033
0.008
0.004
0.114
0.169
0.05
0.85
0.19
0.09
2.90
4.30
0.15
0.95
0.30
0.20
3.10
4.50
c
D
E
e
0.026 BSC
0.252 BSC
0.65 BSC
6.40 BSC
H
L
0.020
0°
0.028
8°
0.50
0°
0.70
8°
θ
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Notice: The information in this document is subject to change without notice.
August 2007
rev 1.5
P2042A
Ordering Information
Part Number
P2042AF-08ST
P2042AF-08SR
P2042AF-08TT
P2042AF-08TR
P2042AG-08ST
P2042AG-08SR
P2042AG-08TT
P2042AG-08TR
I2042AF-08ST
I2042AF-08SR
I2042AF-08TT
I2042AF-08TR
I2042AG-08ST
I2042AG-08SR
I2042AG-08TT
I2042AG-08TR
Marking
Package Type
8-Pin SOIC, TUBE, Pb Free
Temperature
P2042AF
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
P2042AF
P2042AF
P2042AF
P2042AG
P2042AG
P2042AG
P2042AG
I2042AF
I2042AF
I2042AF
I2042AF
I2042AG
I2042AG
I2042AG
I2042AG
8-Pin SOIC, TAPE & REEL, Pb Free
8-Pin TSSOP, TUBE, Pb Free
8-Pin TSSOP, TAPE & REEL, Pb Free
8-Pin SOIC, TUBE, Green
8-Pin SOIC, TAPE & REEL, Green
8-Pin TSSOP, TUBE, Green
8-Pin TSSOP, TAPE & REEL, Green
8-Pin SOIC, TUBE, Pb Free
Commercial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
8-Pin SOIC, TAPE & REEL, Pb Free
8-Pin TSSOP, TUBE, Pb Free
8-Pin TSSOP, TAPE & REEL, Pb Free
8-Pin SOIC, TUBE, Green
8-Pin SOIC, TAPE & REEL, Green
8-Pin TSSOP, TUBE, Green
8-Pin TSSOP, TAPE & REEL, Green
Device Ordering Information
P 2 0 4 2 A F -
8
ST
SR - SOIC, T/R
TT – TSSOP, TUBE
TR - TSSOP, T/R
ST – SOIC, TUBE
Pin Count
F = LEAD FREE AND RoHS COMPLIANT PART
G = GREEN PACKAGE, LEAD FREE, and RoHS
Deviation (%) and Spread option Identifier
DEVICE NUMBER
P = Commercial Temperature Range (0°C to 70°C)
I = Industrial Temperature Range (-40°C to 85°C)
Licensed under U.S Patent Nos 5,488,627 and 5,631,921
LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
August 2007
rev 1.5
P2042A
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200
Campbell, CA 95008
Copyright © PulseCore Semiconductor
All Rights Reserved
Part Number: P2042A
Document Version: 1.5
Tel: 408-879-9077
Fax: 408-879-9018
www.pulsecoresemi.com
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to PulseCore Semiconductor, dated 11-11-2003
© Copyright 2006 PulseCore Semiconductor Corporation. All rights reserved. Our logo and name are trademarks or registered
trademarks of PulseCore Semiconductor. All other brand and product names may be the trademarks of their respective
companies. PulseCore reserves the right to make changes to this document and its products at any time without notice.
PulseCore assumes no responsibility for any errors that may appear in this document. The data contained herein represents
PulseCore’s best data and/or estimates at the time of issuance. PulseCore reserves the right to change or correct this data at
any time, without notice. If the product described herein is under development, significant changes to these specifications are
possible. The information in this product data sheet is intended to be general descriptive information for potential customers
and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. PulseCore does
not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims
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to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed
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where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of
PulseCore products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to
indemnify PulseCore against all claims arising from such use.
LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
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