AND711AST-EO [PURDY]
Optoelectronic Device;型号: | AND711AST-EO |
厂家: | PURDY ELECTRONICS CORPORATION |
描述: | Optoelectronic Device |
文件: | 总3页 (文件大小:58K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AND711AST-30/-EO
240 x 64 Dots
Intelligent Graphic Display
The AND711AST-30/-EO is a full dot matrix LCD module
including an LCD controller and display RAM. This device
can display graphic patterns and symbols and is suitable for
a message display for various instruments such as business
machine terminals.
Absolute Maximum Ratings
Features
• Super twist
• 40 character x 8 line capability
Item
Symbol
VDD
Rating
7.0
Unit
• Excellent readability and high contrast ratio
• 8-bit parallel bus for read/write data by CPU interface
• Built-in LCD controller and display RAM (8k byte)
• Character mode, graphic mode, and character and graphic
combination mode
Supply Voltage
V
VEE
-15
EL Drive Voltage
(fEL = 500 Hz)
VEL
Vrms
130
• Various attribute functions
VIN
Top
Tstg
fEL
–.3 ≤VIN ≤ +.3
0 to +50
-20 to +70
1
Input Voltage
V
°C
˚C
• Wide operating temperatures range (0°C to + 50°C)
• Compact and easily mounted on any equipment
• User-selectable font–6 x 8 or 8 x 8
Operating Temperature
Storage Temperature
EL Driving Freq. (EO)
• Available with EL backlighting attached (-EO option)
kHz
Dot Matrix Dimensions
Electrical Characteristics (TA = 25°C)
Item
Symbol Min.
Typ.
5.0
Max. Unit
VDD
VEE
4.75
5.25
V
Supply Voltage
–5.75
–8.5
–11.5
High Level In Voltage
(VDD = 5.0V)
VIN
VIL
2.8
–
–
–
5
V
Low Level In Voltage
(VDD = 5.0V)
0.8
Mechanical Characteristics
High Level Output
Volt.
(VDD = 5.0V)
VDD
–0.3
VOH
–
–
–
V
Item
Outline
Dimensions
Specification
180 (W) x 65 (H) x 12 (D)
240 (W) x 64 (H)
Unit
Low Level Output Volt.
(VDD = 5.0V)
mm
VOL
–
0.3
V
Number of Dots
IDD
IEE
IEL
–
–
–
–
–
–
13.0
2.0
21
40 x 8 (320) Characters
6 x 8 dot format, alpha-numeric
mA
# of Characters
Power Consumption(1)
Viewing Area
Bezel Opening
Dot Size
132 (W) x 39 (H)
132 (W) x 39 (H)
0.49 (W) x 0.49 (H)
0.53 (W) x 0.53 (H)
I20/150 (ST/EO)
mm
mm
mm
mm
gram
(2)
1. All dots on. (VDD = .5V, VEE = –8.5V, VEL=110, fEL = 500 Hz or at Typ.)
2. mA rms
Dot Pitch
Weight (approx.)
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94086
Tel:408.523.8200 • Fax:408.733.1287 • email@purdyelectronics.com • www.purdyelectronics.com
3-16
12/23/98
AND711AST-30/-EO
Intelligent Graphics Display
Optical Characteristics (TA = 25˚C, φ = 0°, θ = 0)
Power Supply
Item
Symbol
Right to Left
Up & Down
K
Min.
Typ. Max.
Unit
The LCD panel is driven by the voltage VDD–VEE, so an
adjustable VEE is required for contrast control and
temperature compensation.
–
–
80
55
–
–
Viewing Angle
degree
Contrast
Turn On
Turn Off
2.5
-
4.8
200
-
-
Temperature Variations
Ton
350
ms
ms
VDD–VEE
VDD–VEE (EO option)
Temperature
0°C
Toff
-
250
300
14.6
13.5
11.6
14.1
13.0
11.1
Note: Refer to Applications Section for definitions of viewing
angle, contrast ratio, response time (on and off) and
luminance.
+25°C
+50°C
Connector Pin Assignment
Example of Variable Negative Voltage Supply
Pin No. Signal
Function
Frame Ground (connected to metal bezel)
Ground (signal)
VDD
1
2
3
FGND
GND
VDD
GND
LCD Module
R1
TR
Power Supply for logic (5V)
VEE
R2
VEE
4
5
6
7
Power Supply for LCD Drive (–8.5 3V)
R1 = 10k, R2 = 10k, TR 2SA1102 or equivalent
WR
RD
CE
Data Write
Data Read
Chip Enable
Timing Relationships and Diagram
Signal Timing Relationships
WR = “L”, C/D = “H”: Command Write
WR = “L”, C/D = “L”: Data Write
RD = “L”, C/D = “H”: Status Read
RD = “L”, C/D = “L”: Data Read
8
C/D
NC
Item
C/D Set Up Time
C/D Hold Time
Symbol
tCDS
Min.
100
10
Max.
Unit
–
–
9
No connection
tCDH
10
11
12
13
14
15
16
17
18
RESET Controller Reset (Active Pullup Required)
CE, RD, WR
Pulse Width
tCE, tRD, tWR
80
–
D0
D1
D2
D3
D4
D5
D6
D7
Data Input/Output
Data Input/Output
Data Input/Output
Data Input/Output
Data Input/Output
Data Input/Output
Data Input/Output
Data Input/Output
ns
tDS
tDH
tACC
tOH
Data Set Up Time
Data Hold Time
Access Time
80
40
–
–
–
150
50
Output Hold Time
10
Timing Diagram
C/D
tCDH
tCDS
Font select. Open or connect to VDD: 6 x 8 dot
Connect to ground: 8 x 8 dot
19
20
FS
CE
tCP,tRD,tWP
NC
No connection
RD, WR
tDS
D0-D7
(WRITE)
tDH
D0-D7
(READ)
tACC
tOH
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94086
Tel:408.523.8200 • Fax:408.733.1287 • email@purdyelectronics.com • www.purdyelectronics.com
12/23/98
3-17
AND711AST-30/-EO
Intelligent Graphics Display
Block Diagram
Because signal lines are directly connected
to C-MOS and are not pull-up or pull-down
internally, except RESET which is pull-up to
VDD, you must guard all signals from
external noise.
8
D0-D7
I/O0-I/O7
A0-A12
D0-D7
13
WR
RD
AD0-AD12
T6963C
R/W
CE
RAM
(8K byte)
CE
C/D
RESET
ED
X-Driver
80
X-Driver
80
X-Driver
80
HSCP
FR
Control Lines
LP
CDATA
64
LCD Panel
240 x 64 Dots
Y-Driver
VEL
VEL
EL Backlight
Dimensional Outline
Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94086
Tel:408.523.8200 • Fax:408.733.1287 • email@purdyelectronics.com • www.purdyelectronics.com
3-18
12/23/98
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