概述
规格参数
数据手册P3C1041-12TI 概述
HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM 高速256K ×16 （ 4 MEG ）静态CMOS RAM SRAM
P3C1041-12TI 规格参数
| 是否无铅： | 含铅 | 是否Rohs认证： | 不符合 |
| 生命周期： | Active | 零件包装代码： | TSOP2 |
| 包装说明： | TSOP2, | 针数： | 44 |
| Reach Compliance Code： | compliant | ECCN代码： | 3A991.B.2.A |
| HTS代码： | 8542.32.00.41 | 风险等级： | 5.84 |
| Is Samacsys： | N | 最长访问时间： | 12 ns |
| JESD-30 代码： | R-PDSO-G44 | JESD-609代码： | e0 |
| 长度： | 18.415 mm | 内存密度： | 4194304 bit |
| 内存集成电路类型： | STANDARD SRAM | 内存宽度： | 16 |
| 功能数量： | 1 | 端子数量： | 44 |
| 字数： | 262144 words | 字数代码： | 256000 |
| 工作模式： | ASYNCHRONOUS | 最高工作温度： | 85 °C |
| 最低工作温度： | -40 °C | 组织： | 256KX16 |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | TSOP2 |
| 封装形状： | RECTANGULAR | 封装形式： | SMALL OUTLINE, THIN PROFILE |
| 并行/串行： | PARALLEL | 峰值回流温度（摄氏度）： | NOT SPECIFIED |
| 认证状态： | Not Qualified | 座面最大高度： | 1.1938 mm |
| 最大供电电压 (Vsup)： | 3.6 V | 最小供电电压 (Vsup)： | 3 V |
| 标称供电电压 (Vsup)： | 3.3 V | 表面贴装： | YES |
| 技术： | CMOS | 温度等级： | INDUSTRIAL |
| 端子面层： | TIN LEAD | 端子形式： | GULL WING |
| 端子节距： | 0.8 mm | 端子位置： | DUAL |
| 处于峰值回流温度下的最长时间： | NOT SPECIFIED | 宽度： | 10.16 mm |
| Base Number Matches： | 1 |
P3C1041-12TI 数据手册
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PDF下载P3C1041
HIGH SPEED 256K x 16 (4 MEG)
STATIC CMOS RAM
FEATURES
Easy Memory Expansion Using CE and OE
High Speed (Equal Access and Cycle Times)
— 10/12/15/20 ns (Commercial)
— 12/15/20 ns (Industrial)
Low Power
Inputs
Fully TTL Compatible Inputs and Outputs
Advanced CMOS Technology
Fast tOE
— 325 mW (max.)
Automatic Power Down when deselected
Packages
Single 3.3V ± 0.3V Power Supply
2.0V Data Retention
—44-Pin SOJ, TSOP II
DESCRIPTION
The P3C1041 device provides asynchronous operation
with matching access and cycle times. Memory loca-
tions are specified on address pinsA0 toA17. Reading is
accomplished by device selection (CE and output en-
abling (OE) while write enable (WE) remains HIGH. By
presenting the address under these conditions, the data
in the addressed memory location is presented on the
data input/output pins. The input/output pins stay in the
HIGH Z state when either CE or OE is HIGH or WE is
LOW.
The P3C1041 is a 262,144 words by 16 bits high-speed
CMOS static RAM. The CMOS memory requires no
clocks or refreshing, and has equal access and cycle
times. Inputs are fully TTL-compatible. The RAM oper-
ates from a single 3.3V ± 0.3V tolerance power
supply.
Access times as fast as 10 nanoseconds permit greatly
enhanced system operating speeds. CMOS is utilized
to reduce power consumption to a low level. The P3C1041
is a member of a family of PACE RAM™ products offer-
ing fast access times.
Package options for the P3C1041 include 44-pin SOJ
and TSOP packages.
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAM
SOJ
TSOPII
Document # SRAM130 REV OR
Revised October 2005
1
P3C1041
MAXIMUMRATINGS(1)
Symbol
Parameter
Value
Unit
Symbol
Parameter
Value
Unit
VCC
Power Supply Pin with
Respect to GND
–0.5 to +4.6
V
TBIAS
TemperatureUnder
Bias
–55 to +125
°C
TerminalVoltagewith
Respect to GND
–0.5 to
TSTG
IOUT
StorageTemperature
DCOutputCurrent
–65 to +150
20
°C
mA
VTERM
TA
VCC +0.5
V
OperatingTemperature
–55 to +125 °C
CAPACITANCES(4)
RECOMMENDED OPERATING
VCC = 3.3V, TA = 25°C, f = 1.0MHz
TEMPERATURE AND SUPPLY VOLTAGE
Ambient
VCC
Grade(2)
GND
Parameter
Typ.
Symbol
Conditions
Unit
Temperature
–40°C to +85°C
0°C to +70°C
VIN = 0V
pF
pF
CIN
Input Capacitance
Output Capacitance
8
8
0V
0V
3.3V ± 0.3V
3.3V ± 0.3V
Industrial
Commercial
VOUT = 0V
COUT
DC ELECTRICAL CHARACTERISTICS
Overrecommendedoperatingtemperatureandsupplyvoltage(2)
P3C1041
Symbol
Parameter
Test Conditions
Unit
Min
Max
VIH
VIL
2.0
–0.3(3)
VCC +0.3
Input High Voltage
Input Low Voltage
V
V
0.8
VOL
Output Low Voltage
(TTL Load)
IOL = +8 mA, VCC = Min.
IOH = –4 mA, VCC = Min.
0.4
V
VOH
Output High Voltage
(TTL Load)
2.4
-1
V
+1
+1
µA
VCC = Max.
VIN = GND to VCC
ILI
Input Leakage Current
Output Leakage Current
µA
-1
VCC = Max.,
CE = VIH,
ILO
VOUT = GND to VCC
___
40
10
mA
CE ≥ VIH
VCC= Max,
f = Max., Outputs Open
VIN ≥ VIH orVIN ≤ VIL
Standby Power Supply
ISB
Current (TTL Input Levels)
___
mA
CE ≥ VCC - 0.2V
VCC= Max,
Standby Power Supply
Current
ISB1
f = 0, Outputs Open
VIN ≥ VCC - 0.3V or
VIN ≤ 0.3V
(CMOS Input Levels)
Document # SRAM130 REV OR
Page 2 of 10
P3C1041
POWER DISSIPATION CHARACTERISTICS VS. SPEED
Temperature
Symbol
Parameter
Unit
Range
–12 –15 –20
–10
90
N/A
mA
mA
Commercial
Industrial
75
85
80
ICC
Dynamic Operating Current*
85
95
90
*VCC = 3.6V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V. CE = VIL, OE = VIH.
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(VCC = 3.3V ± 0.3V, All Temperature Ranges)(2)
-10
-12
-15
-20
Min Max
Sym.
Parameter
Unit
Min
Max
Max
Min
Max
Min
tRC
tAA
12
10
15
ReadCycleTime
20
20
ns
ns
12
12
Address Access Time
10
10
15
15
tAC
20
ns
Chip Enable Access Time
OutputHoldfromAddressChange
Chip Enable to Output in Low Z
ns
ns
3
3
3
3
3
3
3
3
tOH
tLZ
tHZ
tOE
8
8
ns
ns
Chip Disable to Output in High Z
Output Enable Low to Data Valid
5
5
6
6
7
7
tOLZ
tOHZ
tPU
ns
ns
ns
Output Enable Low to Low Z
Output Enable High to High Z
Chip Enable to Power Up Time
0
0
0
0
0
0
0
8
0
5
6
7
Chip Disable to Power Down Time
Byte Enable to Data Valid
tPD
tBE
tLZBE
tHZBE
ns
ns
10
5
12
6
15
7
20
8
0
0
Byte Enable to Low Z
Byte Disable to High Z
0
0
ns
ns
6
6
7
8
Document # SRAM130 REV OR
Page 3 of 10
P3C1041
TIMING WAVEFORM OF READ CYCLE NO. 1
TIMING WAVEFORM OF READ CYCLE NO. 2 (OE CONTROLLED)(5,6)
Notes:
1. Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM rating conditions for extended
periods may affect reliability.
4. This parameter is sampled and not 100% tested.
5. WE is HIGH for READ cycle.
6. CE is LOW and OE is LOW for READ cycle.
7. ADDRESSmustbevalidpriorto,orcoincidentwithCE transitionLOW.
8. Transition is measured ± 200 mV from steady state voltage prior to
change, with loading as specified in Figure 1. This parameter is
sampled and not 100% tested.
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with VIL not more negative than –2.0V and
9. Read Cycle Time is measured from the last valid address to the first
transitioning address.
VIH ≤ VCC + 0.5V, are permissible for pulse widths up to 20ns.
Document # SRAM130 REV OR
Page 4 of 10
P3C1041
AC CHARACTERISTICS—WRITE CYCLE
(VCC = 3.3V ± 0.3V, All Temperature Ranges)(2)
-10
-12
-15
-20
Parameter
Unit
Sym.
Max
Min
10
7
Max
Min
12
8
Max
Min
15
Min
20
Max
tWC
tCW
Write Cycle Time
ns
ns
Chip Enable Time to End of
Write
10
10
tAW
tAS
Address Valid to End of Write
7
8
10
10
ns
Address Set-up Time to Write
Start
Write Pulse Width
0
7
0
5
0
8
0
6
0
10
0
0
10
0
ns
ns
ns
ns
tWP
tAH
tDW
AddressHoldTime
Data Valid to End of Write
7
8
tDH
tWZ
DataHoldTime
0
0
0
0
ns
ns
Write Enable to Output in High Z
5
6
7
8
tOW
Output Active from End of Write
5
3
5
3
0
3
0
3
ns
ns
tLZWE WE High to Low Z
tBW Byte Enable to End of Write
7
8
10
10
ns
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (CE CONTROLLED)
Document # SRAM130 REV OR
Page 5 of 10
P3C1041
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (BLE OR BHE CONTROLLED)
TIMING WAVEFORM OF WRITE CYCLE NO. 3 (WE CONTROLLED, OE LOW)
Document # SRAM130 REV OR
Page 6 of 10
P3C1041
AC TEST CONDITIONS
InputPulseLevels
GND to 3.0V
Input Rise and Fall Times
InputTimingReferenceLevel
OutputTimingReferenceLevel
OutputLoad
3ns
1.5V
1.5V
See Figures 1 and 2
Figure 1. Output Load
Figure2. TheveninEquivalent
* including scope and test fixture.
Note:
Because of the ultra-high speed of the P3C1041, care must be taken
when testing this device; an inadequate setup can cause a normal
functioning part to be rejected as faulty. Long high-inductance leads
that cause supply bounce must be avoided by bringing the VCC and
ground planes directly up to the contactor fingers. A 0.01 µF high
frequency capacitor is also required between VCC and ground. To avoid
signal reflections, proper termination must be used; for example, a 50Ω
test environment should be terminated into a 50Ω load with 1.73V
(Thevenin Voltage) at the comparator input, and a 116Ω resistor must
be used in series with DOUT to match 166Ω (Thevenin Resistance).
TRUTH TABLE
CE OE W E BLE BHE I/O0 - I/O7
I/O8 - I/O15
High Z
DOUT
Power
Standby
Active
Active
Active
Mode
H
L
X
L
X
H
X
L
X
L
High Z
DOUT
Power-down
Read All Bits
L
L
L
L
H
H
L
H
L
DOUT
High Z
DOUT
Read Lower Bits Only
Read Upper Bits Only
Write All Bits
H
High Z
L
L
L
L
X
X
X
H
L
L
L
L
L
H
L
DIN
DIN
DIN
High Z
DIN
Active
Active
Active
Active
Write Lower Bits Only
L
H
H
X
High Z
High Z
Write Upper Bits Only
Selected, Outputs Disabled
X
High Z
Document # SRAM130 REV OR
Page 7 of 10
P3C1041
ORDERING INFORMATION
Document # SRAM130 REV OR
Page 8 of 10
P3C1041
SOJ SMALL OUTLINE IC PACKAGE
Pkg #
J8
# Pins
44 (400 mil)
Symbol
Min
Max
0.148
-
0.023
0.013
1.130
A
A1
b
0.128
0.082
0.013
0.007
1.120
C
D
e
0.050 BSC
E
0.435
0.395
0.445
0.405
E1
E2
Q
0.370 BSC
0.025
-
TSOP II THIN SMALL OUTLINE PACKAGE
Pkg #
# Pins
Symbol
T2
44
Min
Max
A
A2
b
0.039
0.033
0.012
0.396
0.721
0.047
0.042
0.016
0.404
0.729
D
E
e
HD
0.0315 BSC
0.462 0.470
Document # SRAM130 REV OR
Page 9 of 10
P3C1041
REVISIONS
DOCUMENTNUMBER:
DOCUMENTTITLE:
SRAM130
P3C1041 HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM
ORIG. OF
CHANGE
ISSUE
REV.
DESCRIPTIONOFCHANGE
DATE
OR
Oct-05
JDB
NewDataSheet
Document # SRAM130 REV OR
Page 10 of 10
P3C1041-12TI 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| P3C1041-15JC | PYRAMID | HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM | 获取价格 |
|
| P3C1041-15JI | PYRAMID | HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM | 获取价格 |
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| P3C1041-15TC | PYRAMID | HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM | 获取价格 |
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| P3C1041-15TI | PYRAMID | HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM | 获取价格 |
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| P3C1041-20JC | PYRAMID | HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM | 获取价格 |
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| P3C1041-20JI | PYRAMID | HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM | 获取价格 |
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| P3C1041-20TC | PYRAMID | HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM | 获取价格 |
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| P3C1041-20TI | PYRAMID | HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM | 获取价格 |
|
| P3C1256 | PYRAMID | HIGH SPEED 32K x 8 3.3V STATIC CMOS RAM | 获取价格 |
|
| P3C1256-12JC | ETC | x8 SRAM | 获取价格 |
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