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APL2020 PLL Module
型号:   APL2020
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描述:   PLL Module
文件大小 :   47 K    1 页
Logo:   
品牌   ASB [ ADVANCED SEMICONDUCTOR BUSINESS INC. ]
购买 :   
   
100%
Preliminary
Features
dBm Output Level at 2020 MHz
5
Channel Step Size : 100 kHz
2
nd
Harmonic : < -20 dBc
Spurious Level : < -70 dBc
Lock Time : < 10 ms
mA Current Consumption
30
plerow
TM
APL2020
PLL Module
Description
The plerow
TM
PLL synthesizer module was
des igned for use in wireless and wireline
systems in a wide range of frequency from
50 MHz to 6 GHz. ASB’ PLL provides ex-
s
ceptionally low spurious and phase noise
performance with fast locking time and low
current consumption. All products are avail-
able in a surface-mount type package.
Specifications
Parameter
Frequency Range
Output Power
Supply Voltage
Current Consumption
Channel Step Size
2 Harmonics
Spurious Level
Lock Time
Reference Frequency
Reference Input Level
Phase Noise (C / N)
@ 1 kHz
@ 10 kHz
@ 100 kHz
Output Impedance
Operating Temp. Range
Package Type & Size
°C
mm
-40
dBc/Hz
-
-103
-120
50
25
SMT, 19.0W×19.0L×5.8H
85
nd
Unit
MHz
dBm
V
mA
kHz
dBc
dBc
ms
MHz
dBm
Min.
1970
3
4.75
Typical
2020
5
5.0
30
100
Max.
2070
7
5.25
Website: www.asb.co.kr
E- mail: sales@asb.co.kr
-20
-70
Tel: (82) 42-528-7223
Fax: (82) 42-528-7222
ASB Inc., 4th Fl. Venture Town
Bldg., 367-17 Goijeong-Dong,
Seo-Gu, Daejon 302-716, Korea
More Information
3
10
-5
0
10
5
1) Measurement conditions are as follows: T = 25°C, V
CC
= 5 V, Freq. = 2020 MHz, 50 ohm system.
Outline Drawing
Top View
Bottom View
Pin Configuration
D
A
E
F
I
C
B
Side View
1/1
www.asb.co.kr
1
2
3
4
9
13
15
16
Others
CLOCK
DATA
ENABLE
OSC IN
VCC (VCO)
RF OUT
VCP (PLL)
LOCK DETECT
Ground
Dimension (mm)
A
19.0
B
C
D
E
F
G
H
I
19.0
5.8
1.5
0.5
1.75
1.35
15.0
0.9
H
G
Tolerance:
±
0.2
March 2007
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