电子元器件数据表 IC PDF查询
English 中文版
  品牌   我要上传
型号:  
描述:
AT17F16  TRC101  
ML4622 Fiber Optic Data Quantizer
型号:   ML4622
PDF文件: 下载PDF文件   鼠标右键选目标另存为
网页直接浏览   不需安装PDF阅读软件
在线打开PDF文件   需安装PDF阅读软件
描述:   Fiber Optic Data Quantizer
文件大小 :   116 K    8 页
Logo:   
品牌   MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
购买 :   
  浏览型号ML4622的Datasheet PDF文件第2页 浏览型号ML4622的Datasheet PDF文件第3页 浏览型号ML4622的Datasheet PDF文件第4页 浏览型号ML4622的Datasheet PDF文件第5页 浏览型号ML4622的Datasheet PDF文件第6页 浏览型号ML4622的Datasheet PDF文件第7页 浏览型号ML4622的Datasheet PDF文件第8页  
100%
January 1997
ML4622, ML4624
Fiber Optic Data Quantizer
GENERAL DESCRIPTION
The ML4622 and ML4624 data quantizers are low noise,
wideband, bipolar monolithic ICs designed specifically for
signal recovery applications in fiberoptic receiver systems.
They contain a wideband limiting amplifier which is
capable of accepting an input signal as low as 2mV
P-P
with a 55dB dynamic range. This high level of sensitivity
is achieved by using a DC restoration feedback loop
which nulls any offset voltage produced in the limiting
amplifier.
The output stage is a high speed comparator circuit with
both TTL and ECL outputs. An enable pin is included for
added control.
The Link Detect circuit provides a Link Monitor function
with a user selectable reference voltage. This circuit
monitors the peaks of the input signal and provides a
logic level output indicating when the input falls below
an acceptable level. This output can be used to disable
the quantizer and/or drive an LED, providing a visible link
status.
FEATURES
Data rates up to 40MHz or 80MBd
Can be powered by either +5V providing TTL or raised
ECL level outputs or –5.2V providing ECL levels
s
Low noise design: 25µV RMS over bandwidth
s
Adjustable Link Monitor function with hystersis
s
Wide 55dB input dynamic range
s
Low power design
s
ML4624 is pin compatible with the ML4621
s
s
APPLICATIONS
s
s
s
IEEE 802.3 10BASE-FL Receiver
IEEE 802.5 fiber optic token ring, 4 and 16mbps
Fiber Optic Data Communications and
Telecommunications Receivers
ML4622/ML4624 BLOCK DIAGRAM
CF1
BIAS
CF2
ECL+
ECL–
V
IN
+
AMP
V
IN
ECL
CMP
TTL
CMP
TTL OUT
CMP ENABLE
V
DC
V
CC
TTL*
V
CC
GND
V
REF
REF
GND TTL
V
TH
ADJ
THRESH
GEN
LINK DETECT
TTL LINK MON
C
TIMER
*ML4624 ONLY
1
首页 - - 友情链接
Copyright© 2001 - 2014 ICPDF All Rights Reserved ICPDF.COM

粤公网安备 44030402000629号


粤ICP备13051289号-7