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ADC0808CCV レP Compatible 8-Bit A/D Converter with 8-Channel Multiplexer
型号:   ADC0808CCV
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描述:   レP Compatible 8-Bit A/D Converter with 8-Channel Multiplexer
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品牌   MICRO-LINEAR [ MICRO LINEAR CORPORATION ]
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May 1997
ML2258*
µP Compatible 8-Bit A/D Converter
with 8-Channel Multiplexer
GENERAL DESCRIPTION
The ML2258 combines an 8-bit A/D converter, 8-channel
analog multiplexer, and a microprocessor compatible 8-
bit parallel interface and control logic in a single
monolithic device.
Easy interface to microprocessors is provided by the
latched and decoded multiplexer address inputs and
latched three-state outputs.
The device is suitable for a wide range of applications
from process and machine control to consumer,
automotive, and telecommunication applications.
The ML2258 is an enhanced, pin-compatible, second
source for the industry standard ADC0808/ADC0809. The
ML2258 enhancements are faster conversion time, true
sample and hold function, superior power supply
rejection, wider reference range, and a double buffered
data bus as well as faster digital timing. All parameters
are guaranteed over temperature with a power supply
voltage of 5V ±10%.
FEATURES
s
s
s
s
s
s
s
s
s
s
s
s
s
s
Conversion time
Total unadjusted error
No missing codes
Sample and hold
6.6µs
±1/2LSB or ±1LSB
390ns acquisition
Capable of digitizing a 5V, 50kHz sine wave
8-input multiplexer
0V to 5V analog input range with single 5V
power supply
Operates ratiometrically or with up to 5V
voltage reference
No zero-or full-scale adjust required
Analog input protection
25mA per input min
Low power dissipation
3mA max
TTL and CMOS compatible digital inputs and outputs
Standard 28-pin DIP or surface mount PCC
Superior pin compatible replacement for ADC0808 and
ADC0809
BLOCK DIAGRAM
* Some Packages Are End Of Life As Of August 1, 2000
START
CLOCK
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
8-CHANNEL
MULTIPLEXER
A/D WITH
SAMPLE HOLD
CONTROL & TIMING
END OF CONVERSION
(INTERRUPT)
S.A.R.
COMPARATOR
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
THREE
STATE
OUTPUT
LATCH
BUFFER
SWITCH TREE
ADDR0
ADDR1
ADDR2
ADDRESS
LATCH ENABLE
V
CC
GND +V
REF
ADDRESS
LATCH
AND
DECODER
CAPACITOR/
RESISTOR
ARRAY
–V
REF
OUTPUT
ENABLE
1
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