5962-8873903QA [RAYTHEON]
Multiplier, 8-Bit, CMOS, CDIP40,;
| 型号： | 5962-8873903QA |
| 厂家： | 
RAYTHEON COMPANY |
| 描述： | Multiplier, 8-Bit, CMOS, CDIP40, CD 输入元件 外围集成电路 |
| 文件： | 总16页 (文件大小：126K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
REVISIONS
LTR
A
DESCRIPTION
DATE (YR-MO-DA)
91-10-18
APPROVED
Changes to 1.2.1. Made technical changes to table I. Added a square chip
carrier package to 1.2.2. Changes to figure 1 and figure 4. Added vendor
CAGE number 59621 for the square chip carrier package.
Monica L. Poelking
B
Added device types 05 through 08. Made technical changes to table I. Added
CAGE number 65896 for device types 05 through 08. Editorial changes
throughout.
92-06-19
Tim Noh
C
D
E
F
Changes made in accordance with NOR 5962-R310-92
Changes made in accordance with NOR 5962-R113-93
Changes made in accordance with NOR 5962-R199-96
Updated boilerplate and made editorial changes throughout. - LTG
Updated boilerplate to MIL-PRF-38535 requirements. - CFS
92-09-11
93-03-29
96-09-25
00-05-30
05-08-15
Monica L. Poelking
Monica L. Poelking
Monica L. Poelking
Monica L. Poelking
Thomas M. Hess
G
REV
SHEET
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SHEET
15
REV STATUS
OF SHEETS
PMIC N/A
REV
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2
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PREPARED BY
Phu Nguyen
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
CHECKED BY
Tim H. Noh
STANDARD
MICROCIRCUIT
DRAWING
APPROVED BY
Monica L. Poelking
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
MICROCIRCUIT, DIGITAL, CMOS, 8 X 8
MULTIPLIER, MONOLITHIC SILICON
DRAWING APPROVAL DATE
88-11-07
AMSC N/A
REVISION LEVEL
G
SIZE
A
CAGE CODE
5962-88739
67268
SHEET
1
OF
15
DSCC FORM 2233
APR 97
5962-E415-05
1. SCOPE
1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in
accordance with MIL-PRF-38535, appendix A.
1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example:
5962-88739
01
Q
X
Drawing number
Device type
(see 1.2.1)
Case outline
(see 1.2.2)
Lead finish
(see 1.2.3)
1.2.1 Device type(s). The device type(s) identify the circuit function as follows:
Device type
Generic number
Circuit function
Multiply time
01
02
03
04
05
06
07
08
TMC208KV
TMC208KV1
TMC28KUV
TMC28KUV1
LMU0860
LMU0845
LMU8U60
LMU8U45
Two’s complement 8 x 8 multiplier
Two’s complement 8 x 8 multiplier
Unsigned magnitude 8 x 8 multiplier
Unsigned magnitude 8 x 8 multiplier
Two’s complement 8 x 8 multiplier
Two’s complement 8 x 8 multiplier
Unsigned magnitude 8 x 8 multiplier
Unsigned magnitude 8 x 8 multiplier
70 ns
50 ns
70 ns
50 ns
60 ns
45 ns
60 ns
45 ns
1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
Descriptive designator
Terminals
Package style
Q
X
GDIP1-T40 or CDIP2-T40
CQCC1-N44
40
44
Dual-in-line
Square leadless chip carrier
1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.
1.3 Absolute maximum ratings.
Supply voltage range (VDD)............................................................................................ -0.5 V dc to +7.0 V dc
DC voltage applied to outputs:
Devices 01, 02, 03, 04 ............................................................................................... -0.5 V dc to VDD +0.5 V dc
Devices 05, 06, 07, 08 ............................................................................................... -3.0 V dc to +7.0 V dc
DC input voltage:
Devices 01, 02, 03, 04 ............................................................................................... -0.5 V dc to VDD +0.5 V dc
Devices 05, 06, 07, 08 ............................................................................................... -3.0 V dc to +7.0 V dc
Maximum power dissipation (PD) ................................................................................... 550 mW 1/
Lead temperature (soldering 10 seconds) ..................................................................... 300°C
Junction temperature (TJ) .............................................................................................. 175°C
Thermal resistance, junction to case (θJC) ..................................................................... See MIL-STD-1835
Storage temperature range (TSTG) ................................................................................. -65°C to +150°C
________
1/ Must withstand the added PD due to short circuit test; e.g., IOS
.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
2
DSCC FORM 2234
APR 97
1.4 Recommended operating conditions.
Supply voltage (VDD) .................................................................................................. 4.5 V dc to 5.5 V dc
Output high current (IOH) ............................................................................................ -2.0 mA maximum
Output low current (IOL):
Devices 01, 02, 03, 04............................................................................................ 4.0 mA maximum
Devices 05, 06, 07, 08............................................................................................ 8.0 mA maximum
Input high voltage (VIH)............................................................................................... 2.0 V minimum
Input low voltage (VIL)................................................................................................. 0.8 V maximum
Case operating temperature range (TC) ..................................................................... -55°C to +125°C
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535
-
Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883
MIL-STD-1835
-
-
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103
MIL-HDBK-780
-
-
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or http://assist.daps.dla.mil or
from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-
JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer
Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-
PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying
activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan
may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device.
These modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-
PRF-38535 is required to identify when the QML flow option is used.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
3
DSCC FORM 2234
APR 97
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535, appendix A and herein.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Input/output data format. The input/output data format shall be as specified on figure 2.
3.2.4 Block diagram. The block diagram shall be as specified on figure 3.
3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4.
3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are
as specified in table I and shall apply over the full case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are described in table I.
3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed
in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN
number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device.
3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance
to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a "Q" or "QML" certification mark in
accordance with MIL-PRF-38535 to identify when the QML flow option is used.
3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an
approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to
listing as an approved source of supply shall affirm that the manufacturer's product meets the requirements of MIL-PRF-38535,
appendix A and the requirements herein.
3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided
with each lot of microcircuits delivered to this drawing.
3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing.
3.9 Verification and review. DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's
facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the
reviewer.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
4
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics.
Conditions
-55°C ≤ TC ≤ +125°C
4.5 V ≤ VDD ≤ 5.5 V 1/
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
V
Test
Symbol
Min
2.0
3/
Max
Input high voltage
VIH
VDD = 5.5 V
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
01,02
03,04
05,06
07,08
01,02
03,04
05,06
07,08
01,02
03,04
05,06
07,08
01,02
03,04
05,06
07,08
01,02
03,04
05,06
07,08
01,02
03,04
05,06
07,08
01,02
03,04
05,06
07,08
01,02
03,04
05,06
07,08
01,02
03,04
05,06
07,08
2.0
Input low voltage
VIL
VOH
VOL
IIL
VDD = 5.5 V
0.8
3/
V
V
0.8
High level output voltage
Low level output voltage
Input low current
VDD = 4.5 V, IOH = -2.0 mA
2.4
2.4
VDD = 4.5 V
IOL = 4.0 mA
IOL = 8.0 mA
0.4
0.5
V
VDD = 5.5 V
VIN = 0.0 V
-10
µA
µA
µA
µA
mA
-20
Input high current
IIH
VDD = 5.5 V
VIN = VDD
+10
+20
-40
Output leakage current, low
IOZL
IOZH
IOS
VDD = 5.5 V
VIN = 0.0 V
-20
Output leakage current,
high
VDD = 5.5 V
VIN = VDD
+40
+20
-100
-125
Output short circuit current
2/ 3/
VDD = 5.5 V
See footnotes at end of table.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
5
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Conditions
-55°C ≤ TC ≤ +125°C
4.5 V ≤ VDD ≤ 5.5 V 1/
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
mA
Test
Symbol
Min
Max
Supply current, quiescent
IDDQ
VDD = 5.5 V
VIN = 0.0 V
4/
1, 2, 3
1, 2, 3
01,02
03,04
05,06
07,08
01,02
03,04
01,02
03,04
05,06
07,08
All
5.0
1.0
10
Supply current, dynamic
IDDU
VDD = 5.5 V, TRIM, TRIL =
5.0 V, f = 2 MHz
VDD = 5.5 V, TRIM, TRIL =
5.0 V, f = 20 MHz 3/
VDD = 5.5 V, TRIM, TRIL =
5.0 V, f = 5 MHz
f = 1.0 MHz
mA
mA
100
24
IDD
1, 2, 3
4
Input capacitance
CIN
10
10
pF
pF
TC = 25°C
Output capacitance
COUT
4
All
All
See 4.3.1c
Functional testing 5/
VDD = 4.5 V to 5.5 V
See 4.3.1d
7, 8
Multiply time
tMPY
See figure 4 5/
VDD = 4.5 V
9, 10, 11
10
01,03
02,04
05,07
06,08
01,03
02,04
05,06
07,08
01,03
02,04
05,06
07,08
All
70
50
60
45
45
30
22
ns
ns
ns
CL = 20 pF minimum
9, 10, 11
9, 10, 11
9, 10, 11
10
Output delay
Input setup time
tD
9, 10, 11
tS
9, 10, 11
10
30
25
15
9, 10, 11
Input hold time 3/
tH
9, 10, 11
9, 10, 11
0
ns
ns
Clock pulse width, high
tPWH
01,02
03,04
05,07
06,08
15
9, 10, 11
9, 10, 11
20
15
See footnotes at end of table.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
6
DSCC FORM 2234
APR 97
TABLE I. Electrical performance characteristics - Continued.
Conditions
-55°C ≤ TC ≤ +125°C
4.5 V ≤ VDD ≤ 5.5 V 1/
unless otherwise specified
Group A
subgroups
Device
type
Limits
Unit
ns
Test
Symbol
Min
15
Max
Clock pulse width, low
tPWL
See figure 4. 5/
VDD = 4.5 V
9, 10, 11
01,02
03,04
05,07
06,08
01,03
02,04
05,06
07,08
01,03
02,04
05,06
07,08
CL = 20 pF minimum 3/
9, 10, 11
9, 10, 11
9, 10, 11
10
20
15
Three-state output
enable time
tENA
See figure 4. 5/
VDD = 4.5 V
45
25
24
ns
ns
CL = 20 pF minimum
9, 10, 11
Three-state output
disable time
tDIS
9, 10, 11
10
45
25
22
9, 10, 11
1/ Unless otherwise specified, all testing shall be conducted under worst case conditions.
2/ One output to ground, 1 second duration maximum, output high.
3/ Guaranteed, if not tested, to the specified limits.
4/ Tested with all inputs within 0.1 V of VDD or ground, no load.
5/ All transitions are measured at a 1.5 V level except tDIS or tENA
.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
7
DSCC FORM 2234
APR 97
Device types
Case outline
All
Q
Terminal number
Terminal symbol
Terminal number
Terminal symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
P10
P9
P8
CLK P
TRIM
TRIL
P7
P6
P5
P4
P3
P2
P1
P0
X0
X1
X2
X3
X4
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
X6
X7
CLK X
CLK Y
RND
Y0
Y1
Y2
Y3
VDD
Y4
GND
Y5
Y6
Y7
P15
P14
P13
P12
P11
X5
Device types
Case outline
All
X
Terminal number
Terminal symbol
Terminal number
Terminal symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
P10
P9
P8
CLK P
TRIM
NC
TRIL
P7
P6
P5
P4
P3
P2
P1
P0
X0
NC
X1
X2
X3
X4
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
X6
X7
CLK X
CLK Y
RND
NC
Y0
Y1
Y2
Y3
VDD
Y4
GND
Y5
Y6
Y7
NC
P15
P14
P13
P12
P11
X5
FIGURE 1. Terminal connections.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
SHEET
G
8
DSCC FORM 2234
APR 97
Device types 01, 02, 05, and 06
Device types 01, 02, 05, and 06
FIGURE 2. Input/output data format.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
9
DSCC FORM 2234
APR 97
Device types 03, 04, 07, and 08
Device types 03, 04, 07, and 08
FIGURE 2. Input/output data format - Continued.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
10
DSCC FORM 2234
APR 97
Device types 01, 02, 05, and 06
Device types 03, 04, 07, and 08
FIGURE 3. Block diagram.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-88739
A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
11
DSCC FORM 2234
APR 97
FIGURE 4. Test circuit and switching waveforms.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
12
DSCC FORM 2234
APR 97
4. VERIFICATION
4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535,
appendix A.
4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices
prior to quality conformance inspection. The following additional criteria shall apply:
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify
the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method
1015 of MIL-STD-883.
(2) TA = +125°C, minimum.
b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter
tests prior to burn-in are optional at the discretion of the manufacturer.
TABLE II. Electrical test requirements.
MIL-STD-883 test requirements
Subgroups
(in accordance with
MIL-STD-883, method 5005,
table I)
Interim electrical parameters
(method 5004)
---
Final electrical test parameters
(method 5004)
1*, 2, 3, 7*, 8, 9, 10, 11
1, 2, 3, 4, 7, 8, 9, 10, 11
1, 2, 7, 9
Group A test requirements
(method 5005)
Groups C and D end-point
electrical parameters
(method 5005)
* PDA applies to subgroups 1 and 7.
4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-
883 including groups A, B, C, and D inspections. The following additional criteria shall apply.
4.3.1 Group A inspection.
a. Tests shall be as specified in table II herein.
b. Subgroups 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.
c. Subgroup 4 (CIN measurement) shall be measured only for the initial test and after process or design changes which
may affect input capacitance. A minimum sample size of 5 devices with zero rejects shall be required.
d. Subgroups 7 and 8 shall include verification of the functionality of the device.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
13
DSCC FORM 2234
APR 97
4.3.2 Groups C and D inspections.
a. End-point electrical parameters shall be as specified in table II herein.
b. Steady-state life test conditions, method 1005 of MIL-STD-883.
(1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1005 of MIL-STD-883.
(2) TA = +125°C, minimum.
(3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A.
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.2 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-
prepared specification or drawing.
6.3 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for
the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.4 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system
application requires configuration control and the applicable SMD. DSCC will maintain a record of users and this list will be
used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC
5962) should contact DSCC-VA, telephone (614) 692-0544.
6.5 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43218-3990, or telephone
(614) 692-0547.
6.6 Approved sources of supply. Approved sources of supply are listed in MIL-HDBK-103. The vendors listed in MIL-
HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by
DSCC-VA.
6.7 Pin descriptions. See table III.
SIZE
STANDARD
5962-88739
A
MICROCIRCUIT DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
14
DSCC FORM 2234
APR 97
TABLE III. Pin descriptions.
Pin
VDD, GND
X7-0
Description
The devices operate from a single +5.0 V supply. All power and ground lines must be connected.
Devices 01, 02, 05, and 06 have two 8-bit two’s complement data inputs labeled X and Y.
Y7-0
Devices 03, 04, 07, and 08 have two 8-bit unsigned magnitude data inputs labeled X and Y. The
most significant bits (MSB’s) X7 and Y7, carry the sign information for the two’s complement
notation in devices 01, 02, 05, and 06. The remaining bits are X6-0 and Y6-0 with X0 and Y0 the
LSB’s. The input and output formats for fractional and integer two’s complement, and fractional
and integer unsigned magnitude notations are shown on figure 2.
P15-0
Devices 01, 02, 05, and 06 have a 16-bit two’s complement output which is the product of the two
input X and Y values. Devices 03, 04, 07, and 08 have a 16-bit unsigned magnitude output which
is the product of the two input X and Y values. This output is divided into two 8-bit output words,
the MSP and LSP. The MSB of both the MSP and LSP is the sign bit in devices 01, 02, 05,
and06. The input and output formats for fractional and integer two’s complement, and fractional
and integer unsigned magnitude notations are shown on figure 2. Note that since +1 cannot be
exactly represented in fractional two’s complement notation, some provision for handling the case
(-1)∗(-1) must be made. Devices 01, 02, 05, and 06 output a –1 in this case. As a result, external
error handling provisions may be required.
CLK X,
CLK Y,
CLK P
These devices have three clock lines, one for each input register (CLK X and CLK Y) and one for
the product register (CLK P). Data present at the inputs of these registers are loaded into the
registers on the rising edge of the appropriate clock. In devices 01, 02, 05, and 06, the RND input
is registered and clocked in on the rising edge of the logical OR of both CLK X and CLK Y.
Special attention to the clock signals is required if normally high clock signals are used. Problems
with loading this control signal can be avoided by the use of normally low clocks. In devices 03,
04, 07, and 08, the RND input is registered and clocked in on the rising edge of CLK X.
TRIM, TRIL
RND
TRIM and TRIL are the three-state enable lines for the MSP and LSP. The output driver is in the
high impedance state when TRIM or TRIL is high, and enabled when low. TRIM and TRIL are not
registered.
When RND (round) is high, one is added to the MSB of the LSP. A one will be added to the P6 bit
in devices 01, 02, 05, and 06, or the P7 bit in devices 03, 04, 07, and 08. Note that rounding
always occurs in the positive direction. In some applications, this may introduce a systematic
bias. The RND input is registered and used when a rounded 8-bit product is desired.
SIZE
STANDARD
MICROCIRCUIT DRAWING
5962-88739
A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
REVISION LEVEL
G
SHEET
15
DSCC FORM 2234
APR 97
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 05-08-15
Approved sources of supply for SMD 5962-88739 are listed below for immediate acquisition information only and shall
be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised
to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate
of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next
dated revision of MIL-HDBK-103 and QML-38535. DSCC maintains an online database of all current sources of
supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
Vendor
similar
number
PIN 2/
5962-8873901QA
5962-8873901XA
5962-8873902QA
5962-8873902XA
5962-8873903QA
5962-8873903XA
5962-8873904QA
5962-8873904XA
5962-8873905QA
5962-8873905XA
5962-8873906QA
5962-8873906XA
5962-8873907QA
5962-8873907XA
5962-8873908QA
5962-8873908XA
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
0C7V7
TMC208K
TMC208KC2V
TMC208K
TMC208KC2V1
TMC208KU
TMC208KU
TMC208KU
TMC208KU
TMC208K
TMC208K
TMC208K
TMC208K
TMC208KU
TMC208KU
TMC208KU
TMC208KU
1/ The lead finish shown for each PIN representing a hermetic
package is the most readily available from the manufacturer
listed for that part. If the desired lead finish is not listed
contact the vendor to determine its availability.
2/ Caution. Do not use this number for item acquisition. Items
acquired to this number may not satisfy the performance
requirements of this drawing.
3/ Not available from an approved source of supply.
Vendor CAGE
number
Vendor name
and address
0C7V7
QP Semiconductor
2945 Oakmead Village Court
Santa Clara, CA 95051
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
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