2SK1629-E 概述
Silicon N Channel MOS FET 硅N沟道MOS FET 功率场效应晶体管
2SK1629-E 规格参数
是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Obsolete | 零件包装代码: | TO-3PL |
包装说明: | FLANGE MOUNT, R-PSFM-T3 | 针数: | 4 |
Reach Compliance Code: | compliant | Factory Lead Time: | 1 week |
风险等级: | 5.36 | Is Samacsys: | N |
配置: | SINGLE WITH BUILT-IN DIODE | 最小漏源击穿电压: | 500 V |
最大漏极电流 (Abs) (ID): | 30 A | 最大漏极电流 (ID): | 30 A |
最大漏源导通电阻: | 0.27 Ω | FET 技术: | METAL-OXIDE SEMICONDUCTOR |
JEDEC-95代码: | TO-3 | JESD-30 代码: | R-PSFM-T3 |
JESD-609代码: | e2 | 湿度敏感等级: | 1 |
元件数量: | 1 | 端子数量: | 3 |
工作模式: | ENHANCEMENT MODE | 最高工作温度: | 150 °C |
封装主体材料: | PLASTIC/EPOXY | 封装形状: | RECTANGULAR |
封装形式: | FLANGE MOUNT | 峰值回流温度(摄氏度): | NOT SPECIFIED |
极性/信道类型: | N-CHANNEL | 最大功率耗散 (Abs): | 200 W |
最大脉冲漏极电流 (IDM): | 120 A | 认证状态: | Not Qualified |
子类别: | FET General Purpose Power | 表面贴装: | NO |
端子面层: | TIN COPPER | 端子形式: | THROUGH-HOLE |
端子位置: | SINGLE | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
晶体管应用: | SWITCHING | 晶体管元件材料: | SILICON |
Base Number Matches: | 1 |
2SK1629-E 数据手册
通过下载2SK1629-E数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载2SK1628, 2SK1629
Silicon N Channel MOS FET
REJ03G0960-0300
Rev.3.00
May 15, 2006
Application
High speed power switching
Features
•
•
•
•
•
Low on-resistance
High speed switching
Low drive current
No secondary breakdown
Suitable for switching regulator and DC-DC converter
Outline
RENESAS Package code: PRSS0004ZF-A
(Package name: TO-3PL)
D
G
1. Gate
2. Drain
3. Source
S
1
2
3
Rev.3.00 May 15, 2006 page 1 of 6
2SK1628, 2SK1629
Absolute Maximum Ratings
(Ta = 25°C)
Item
Symbol
Ratings
450
Unit
Drain to source voltage
2SK1628
2SK1629
VDSS
V
500
Gate to source voltage
Drain current
VGSS
±30
V
A
ID
30
1
Drain peak current
ID(pulse)
*
120
A
Body to drain diode reverse drain current
Channel dissipation
IDR
30
A
Pch*2
Tch
200
W
°C
°C
Channel temperature
150
Storage temperature
Tstg
–55 to +150
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at TC = 25°C
Electrical Characteristics
(Ta = 25°C)
Item
Symbol
Min
450
500
±30
—
Typ
Max
Unit
Test conditions
Drain to source
breakdown voltage
2SK1628
2SK1629
V(BR)DSS
—
—
V
ID = 10 mA, VGS = 0
Gate to source breakdown voltage
Gate to source leak current
V(BR)GSS
IGSS
—
—
—
—
V
IG = ±100 µA, VDS = 0
VGS = ±25 V, VDS = 0
VDS = 360 V, VGS = 0
VDS = 400 V, VGS = 0
ID = 1 mA, VDS = 10 V
ID = 15 A, VGS = 10 V *3
±10
250
µA
µA
Zero gate voltage drain 2SK1628
IDSS
—
current
2SK1629
Gate to source cutoff voltage
VGS(off)
RDS(on)
2.0
—
—
12
—
—
—
—
—
—
—
—
—
—
0.20
0.22
20
3.0
0.25
0.27
—
V
Static drain to source on 2SK1628
Ω
state resistance
2SK1629
Forward transfer admittance
Input capacitance
|yfs|
Ciss
Coss
Crss
td(on)
tr
S
ID = 15 A, VDS = 10 V *3
VDS = 10 V, VGS = 0,
f = 1 MHz
2800
780
90
—
pF
pF
pF
ns
ns
ns
ns
V
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
—
—
32
—
ID = 15 A, VGS = 10 V,
RL = 2 Ω
140
200
100
1.1
—
Turn-off delay time
Fall time
td(off)
tf
—
—
Body to drain diode forward voltage
VDF
trr
—
IF = 30 A, VGS = 0
Body to drain diode reverse recovery
time
600
—
ns
IF = 30 A, VGS = 0,
diF/dt = 100 A/µs
Note: 3. Pulse test
Rev.3.00 May 15, 2006 page 2 of 6
2SK1628, 2SK1629
Main Characteristics
Power vs. Temperature Derating
Maximum Safe Operation Area
300
200
100
0
500
200
100
50
20
10
5
Operation in
this area is
limited by RDS (on)
2
1
2SK1629
Ta = 25°C
2SK1628
0.5
1
3
10
30
100 300 1000
0
50
100
150
Case Temperature Tc (°C)
Drain to Source Voltage VDS (V)
Typical Output Characteristics
Typical Transfer Characteristics
50
40
30
20
10
0
20
16
12
8
Pulse Test
6 V
10 V
7 V
VDS = 20 V
Pulse Test
5 V
Tc = 75°C
4
25°C
VGS = 4 V
40
–25°C
0
0
10
20
30
50
0
2
4
6
8
10
Drain to Source Voltage VDS (V)
Gate to Source Voltage VGS (V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Static Drain to Source on State Resistance
vs. Drain Current
10
5
Pulse Test
Pulse Test
8
6
4
2
0
2
1
0.5
ID = 20 A
VGS = 10 V
15 V
0.2
10 A
5 A
0.1
0.05
0
4
8
12
16
20
1
2
5
10
20
50 100
Gate to Source Voltage VGS (V)
Drain Current ID (A)
Rev.3.00 May 15, 2006 page 3 of 6
2SK1628, 2SK1629
Forward Transfer Admittance
vs. Drain Current
Static Drain to Source on State
Resistance vs. Temperature
50
1.0
0.8
0.6
0.4
0.2
0
VDS = 20 V
Pulse Test
–25°C
TC = 25°C
75°C
VGS = 10 V
Pulse Test
20
10
5
ID = 20 A
10 A
2
5 A
1.0
0.5
–40
0
40
80
120
160
0.2
0.5 1.0
2
5
10
20
Case Temperature TC (°C)
Drain Current ID (A)
Body to Drain Diode Reverse
Recovery Time
Typical Capacitance
vs. Drain to Source Voltage
10,000
5,000
2,000
VGS = 0
f = 1 MHz
di/dt = 100 A/µs, Ta = 25°C
VGS = 0
Pulse Test
Ciss
1,000
100
10
1,000
500
Coss
200
Crss
30
100
50
0.5 1.0
2
5
10
20
50
0
10
20
40
50
Reverse Drain Current IDR (A)
Drain to Source Voltage VDS (V)
Dynamic Input Characteristics
VDD = 100 V
Switching Characteristics
500
400
300
200
100
20
500
200
td (off)
250 V
400 V
16
12
8
100
50
tf
VDS
VGS
tr
td (on)
20
•
VGS = 10 V VDD = 30 V
ID = 20 A
•
V DD = 400 V
250 V
4
PW = 2 µs, duty < 1%
10
5
100 V
0
0.5 1.0
2
5
10
20
50
0
40
80
120
160
200
Gate Charge Qg (nc)
Drain Current ID (A)
Rev.3.00 May 15, 2006 page 4 of 6
2SK1628, 2SK1629
Reverse Drain Current vs.
Source to Drain Voltage
20
16
12
8
Pulse Test
5 V, 10 V
4
VGS = 0, –10 V
0
0.4
0.8
1.2
1.6
2.0
Source to Drain Voltage VSD (V)
Normalized Transient Thermal Impedance vs. Pulse Width
3
TC = 25°C
D = 1
1
0.5
0.3
0.2
θch–c (t) = γS (t) • θch–c
θch–c = 0.625°C/W, TC = 25°C
0.1
PDM
C/W
PW
T
D =
0.03
0.01
PW
T
1 Shot Pulse
10 µ
0.01
100 µ
1 m
10 m
100 m
1
10
Pulse Width PW (S)
Switching Time Test Circuit
Vin Monitor
Waveforms
90 %
Vout Monitor
RL
Vin
10 %
10 %
D.U.T
10 %
Vout
50 Ω
90 %
d (off)
90 %
t
.
t
Vin = 10 V
VDD = 30 V
.
t
t
f
d (on)
r
Rev.3.00 May 15, 2006 page 5 of 6
2SK1628, 2SK1629
Package Dimensions
Package Name
TO-3PL
JEITA Package Code
RENESAS Code
PRSS0004ZF-A
Previous Code
MASS[Typ.]
9.9g
Unit: mm
TO-3PL / TO-3PLV
5.0 0.2
20.0 0.3
φ3.3 0.2
1.4
3.0
2.2
1.2
+0.25
–0.1
+0.25
–0.1
0.6
2.8 0.2
5.45 0.5
1.0
5.45 0.5
3.8
7.4
Ordering Information
Part Name
Quantity
Shipping Container
2SK1628-E
2SK1629-E
500 pcs
500 pcs
Box (Case)
Box (Case)
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
Rev.3.00 May 15, 2006 page 6 of 6
Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
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Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
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http://www.renesas.com
Refer to "http://www.renesas.com/en/network" for the latest and detailed information.
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Colophon .6.0
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