5962-9073103MEA [RENESAS]
QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, CDIP16;
| 型号： | 5962-9073103MEA |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, CDIP16 CD |
| 文件： | 总10页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG411/883, DG412/883
DG413/883
Monolithic Quad SPST CMOS Analog Switches
June 1994
Features
Description
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
The DG411/883 series monolithic CMOS analog switches
are drop-in replacements for the popular DG211 and DG212
series devices. They include four independent single pole
throw (SPST) analog switches, and TTL and CMOS compat-
ible digital inputs.
• ON-Resistance <35Ω Max
• Low Power Consumption (PD <35µW)
• Fast Switching Action
- tON <175ns
These switches feature lower analog ON resistance (<35Ω)
and faster switch time (tON <175ns) compared to the DG211
or DG212. Charge injection has been reduced, simplifying
sample and hold applications.
- tOFF <145ns
• Low Charge Injection
The improvements in the DG411/883 series are made possi-
ble by using a high voltage silicon-gate process. An epitaxial
layer prevents the latch-up associated with older CMOS
technologies. The 44V maximum voltage range permits con-
trolling 40VP-P signals. Power supplies may be single-ended
from +5V to +34V, or split from ±5V to ±20V.
• Upgrade from DG211/DG212
• TTL, CMOS Compatible
• Single or Split Supply Operation
Applications
• Audio Switching
The four switches are bilateral, equally matched for AC or bidi-
rectional signals. The ON resistance variation with analog sig-
nals is quite low over a ±15V analog input range. The
switches in the DG411/883 and DG412/883 are identical, dif-
fering only in the polarity of the selection logic. Two of the
switches in the DG413/883 (#1 and #4) use the logic of the
DG211 and DG411/883 (i.e. a logic “0” turns the switch ON)
and the other two switches use DG212 and DG412/883 posi-
tive logic. This permits independent control of turn-on and
turn-off times for SPDT configurations, permitting “break-
before-make” or “make-before-break” operation with a mini-
mum of external logic.
• Battery Operated Systems
• Data Acquisition
• Hi-Rel Systems
• Sample and Hold Circuits
• Communication Systems
• Automatic Test Equipment
Ordering Information
PART NUMBER
DG411AK/883
DG412AK/883
DG413AK/883
TEMP. RANGE
PACKAGE
16 Lead CerDIP
16 Lead CerDIP
16 Lead CerDIP
o
o
-55 C to +125 C
o
o
-55 C to +125 C
o
o
-55 C to +125 C
Functional Diagrams Four SPST Switches per Package Switches Shown for Logic “1” Input
DG411/883 DG412/883 DG413/883
Pinout
DG411/883, DG412/883,
DG413/883 (CERDIP)
TOP VIEW
S1
S1
S1
IN1
IN1
IN1
IN1
D1
1
2
3
4
5
6
7
8
16 IN2
15 D2
14 S2
13 V+
12 VL
11 S3
10 D3
D1
S2
D1
S2
D1
S2
S1
IN2
IN3
IN2
IN3
IN2
IN3
V-
D2
S3
D2
S3
D2
S3
GND
S4
D3
S4
D3
S4
D3
S4
D4
9
IN3
IN4
IN4
IN4
IN4
D4
D4
D4
(NC) NO CONNECTION
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 512043
File Number 3681
407-727-9207 | Copyright © Intersil Corporation 1999
4-49
DG411/883, DG412/883, DG413/883
TRUTH TABLE
Pin Description
DG411/
883
DG412/
883
PIN
1
SYMBOL
IN
DESCRIPTION
DG413/883
Logic Control for Switch 1
1
SWITCH
SWITCH
2, 3
LOGIC
SWITCH
ON
SWITCH
OFF
1, 4
OFF
ON
2
D
Drain (Output) Terminal for Switch 1
Source (Input) Terminal for Switch 1
Negative Power Supply Terminal
Ground Terminal (Logic Common)
Source (Input) Terminal for Switch 4
Drain (Output) Terminal for Switch 4
Logic Control for Switch 4
1
0
1
ON
3
S
1
OFF
ON
OFF
4
V-
NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V.
5
GND
6
S
4
7
D
4
8
IN
IN
4
3
9
Logic Control for Switch 3
10
11
12
13
14
15
16
D
Drain (Output) Terminal for Switch 3
Source (Input) Terminal for Switch 3
Logic Reference Voltage
3
S
3
L
V
V+
Positive Power Supply Terminal (Substrate)
Source (Input) Terminal for Switch 2
Drain (Output) Terminal for Switch 2
Logic Control for Switch 2
S
2
D
2
IN
2
Spec Number 512043
4-50
Specifications DG411/883, DG412/883, DG413/883
Absolute Maximum Ratings
Thermal Information
V+ to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V Thermal Resistance (Note 3)
θ
θ
JA
JC
o
o
GND to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V
CerDIP Package . . . . . . . . . . . . . . . . . . .
85 C/W
24 C/W
o
V (Note 2) . . . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) to (V+) +0.3V Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C
L
o
o
Digital Inputs, V , V (Note 2) . . . . . (V-) -2V to (V+) + 2V or 30mA, Operating Temperature (A Suffix) . . . . . . . . . . . . . .-55 C to +125 C
S
D
Whichever Occurs First
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . .30mA
Current, S or D (Pulsed 1ms, 10% Duty Cycle) . . . . . . . . . . .100mA
o
o
Storage Temperature Range (A Suffix) . . . . . . . . . -65 C to +125 C
o
Lead Temperature (Soldering 10s). . . . . . . . . . . . . . . . . . . . +300 C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V Max
Operating Temperature Range. . . . . . . . . . . . . . . . -55 C to +125 C
Input Low Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V Max
Input High Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V Min
Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .≤20ns
o
o
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: V+ = +15V, V- = -15V, V = 5V, GND = 0V, Unless Otherwise Specified
L
LIMITS
SUBGROUP TEMPERATURE MIN MAX UNITS
GROUP A
PARAMETERS
Drain-to-Source
SYMBOL
CONDITIONS
o
o
R
V+ = +13.5V,
V- = -13.5V,
V
= 0.8V
1, 3
+25 C, -55 C
0
35
Ω
DS(ON)
IN
ON Resistance
I
V
= -10mA,
o
S
DG411/883
2
1, 3
2
+125 C
0
0
0
0
0
0
0
0
0
0
0
45
35
Ω
Ω
= ±8.5V
D
o
o
DG412/883
V
V
= 2.4V
+25 C, -55 C
IN
IN
o
+125 C
45
Ω
o
o
DG413/883
DG411/883
DG412/883
DG413/883
= 0.8V or
1, 3
2
+25 C, -55 C
35
Ω
2.4V (Note 1)
o
+125 C
45
Ω
o
o
V+ = +10.8V,
V- = -0V,
V
V
V
= 0.8V
1, 3
2
+25 C, -55 C
80
Ω
IN
IN
IN
o
+125 C
100
80
Ω
I
= -10mA,
S
o
o
= 2.4V
1, 3
2
+25 C, -55 C
Ω
V
8.0V
= 3.0V and
D
o
+125 C
100
80
Ω
o
o
= 0.8V or
1, 3
2
+25 C, -55 C
Ω
2.4V (Note 1)
o
+125 C
100
Ω
o
Source OFF Leakage Current
DG411/883
I
V+ = 16.5V,
V- = -16.5V,
V
V
V
= 2.4V
1
+25 C
-0.25 +0.25
-20 +20
-0.25 +0.25
-20 +20
-0.25 +0.25
-20 +20
-0.25 +0.25
-20 +20
-0.25 +0.25
-20 +20
-0.25 +0.25
-20 +20
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
S(OFF)
IN
IN
IN
o
o
2, 3
1
+125 C, -55 C
V
V
= -15.5V,
= 15.5V
D
S
o
DG412/883
= 0.8V
+25 C
o
o
2, 3
1
+125 C, -55 C
o
DG413/883
DG411/883
DG412/883
DG413/883
= 0.8V or
+25 C
2.4V (Note 1)
o
o
2, 3
1
+125 C, -55 C
o
V+ = 16.5V,
V- = -16.5V,
V
V
V
= 2.4V
+25 C
IN
IN
IN
o
o
2, 3
1
+125 C, -55 C
V
V
= 15.5V,
= -15.5V
D
S
o
= 0.8V
+25 C
o
o
2, 3
1
+125 C, -55 C
o
= 0.8V or
+25 C
2.4V (Note 1)
o
o
2, 3
+125 C, -55 C
Spec Number 512043
4-51
Specifications DG411/883, DG412/883, DG413/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
Device Tested at: V+ = +15V, V- = -15V, V = 5V, GND = 0V, Unless Otherwise Specified
L
LIMITS
MAX UNITS
GROUP A
SUBGROUP TEMPERATURE MIN
PARAMETERS
Drain OFF Leakage Current
DG411/883
SYMBOL
CONDITIONS
o
I
V+ = 16.5V,
V- = -16.5V,
V
V
V
= 2.4V
1
2, 3
1
+25 C
-0.25 +0.25
-20 +20
-0.25 +0.25
-20 +20
-0.25 +0.25
-20 +20
-0.25 +0.25
-20 +20
-0.25 +0.25
-20 +20
-0.25 +0.25
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
µA
D(OFF)
IN
IN
IN
o
o
+125 C, -55 C
V
V
= -15.5V,
= 15.5V
D
S
o
DG412/883
= 0.8V
+25 C
o
o
2, 3
1
+125 C, -55 C
o
DG413/883
DG411/883
DG412/883
DG413/883
= 0.8V or
+25 C
2.4V (Note 1)
o
o
2, 3
1
+125 C, -55 C
o
V+ = 16.5V,
V- = -16.5V,
V
V
V
= 2.4V
+25 C
IN
IN
IN
o
o
2, 3
1
+125 C, -55 C
V
V
= 15.5V,
= -15.5V
D
S
o
= 0.8V
+25 C
o
o
2, 3
1
+125 C, -55 C
o
= 0.8V or
+25 C
2.4V (Note 1)
o
o
2, 3
1
+125 C, -55 C
-20
-0.4
-40
+20
+0.4
+40
+0.4
+40
+0.4
+40
+0.5
o
Channel ON Leakage Current
DG411/883
I
V+ = 16.5V,
V- = -16.5V,
V
V
V
= 0.8V
+25 C
D(ON) +
IN
IN
IN
I
o
o
S(ON)
2, 3
1
+125 C, -55 C
V
= V = ±15.5V
D
S
o
DG412/883
= 2.4V
+25 C
-0.4
-40
o
o
2, 3
1
+125 C, -55 C
o
DG413/883
= 0.8V or
+25 C
-0.4
-40
2.4V (Note 1)
o
o
2, 3
1, 2, 3
+125 C, -55 C
o
o
Input Current with V Low
I
Input Under Test = 0.8V,
All Others = 2.4V
+25 C, +125 C,
-0.5
IN
IL
o
-55 C
o
o
Input Current with V High
I
Input Under Test = 2.4V,
All Others = 0.8V
1, 2, 3
+25 C, +125 C,
-0.5
+0.5
µA
IN
IH
o
-55 C
o
Positive Supply Current
Negative Supply Current
Logic Supply Current
Ground Current
I+
I-
V+ = 16.5V, V- = -16.5,
1
+25 C
-
-
-
-
+1.0
+5.0
+1.0
+5.0
µA
µA
µA
µA
V
= 0Vor 5.0V
o
o
IN
2, 3
1
+125 C, -55 C
o
V+ = 13.2V, V- = 0V,
= 0Vor 5.0V
+25 C
V
o
o
IN
2, 3
+125 C, -55 C
V = 5.25V
L
o
V+ = 16.5V, V- = -16.5,
1
+25 C
-1.0
-5.0
-1.0
-5.0
-
-
-
-
µA
µA
µA
µA
V
= 0V or 5.0V
o
o
IN
2, 3
1
+125 C, -55 C
o
V+ = 13.2V, V- = 0V,
= 0V or 5.0V
+25 C
V
o
o
IN
2, 3
+125 C, -55 C
V = 5.25V
L
o
I
V+ = 16.5V, V- = -16.5,
1
+25 C
-
-
-
-
+1.0
+5.0
+1.0
+5.0
µA
µA
µA
µA
L
V
= 0V or 5.0V
o
o
IN
2, 3
1
+125 C, -55 C
o
V+ = 13.2V, V- = 0V,
= 0V or 5.0V
+25 C
V
o
o
IN
2, 3
+125 C, -55 C
V = 5.25V
L
o
I
V+ = 16.5V, V- = -16.5,
1
+25 C
-1.0
-5.0
-1.0
-5.0
-
-
-
-
µA
µA
µA
µA
GND
V
= 0V or 5.0V
o
o
IN
2, 3
1
+125 C, -55 C
o
V+ = 13.2V, V- = 0V,
= 0V or 5.0V
+25 C
V
o
o
IN
2, 3
+125 C, -55 C
V = 5.25V
L
Spec Number 512043
4-52
Specifications DG411/883, DG412/883, DG413/883
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
Device Tested at: V+ = +15V, V- = -15V, V = 5V, GND = 0V, Unless Otherwise Specified
L
LIMITS
SUBGROUP TEMPERATURE MIN MAX UNITS
GROUP A
PARAMETERS
Turn ON Time
SYMBOL
CONDITIONS
o
o
t
C = 35pF, V = ±10V,
9, 11
10
+25 C, -55 C
0
0
0
0
175
240
250
400
ns
ns
ns
ns
ON
L
S
R = 300Ω
o
L
+125 C
o
o
V+ = 12V, V- = 0V,
9, 11
10
+25 C, -55 C
C = 35pF, V = +8V,
o
L
S
+125 C
R = 300Ω
L
o
o
Turn OFF Time
t
C = 35pF, V = ±10V,
9, 11
10
+25 C, -55 C
0
0
0
0
145
160
125
140
ns
ns
ns
ns
OFF
L
S
R = 300Ω
o
L
+125 C
o
o
V+ = 12V, V- = 0V,
9, 11
10
+25 C, -55 C
C = 35pF, V = +8V,
o
L
S
+125 C
R = 300Ω
L
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (NOTE 1)
Device Tested at: V+ = +15V, V- = -15V, V = 5V, GND = 0V, Unless Otherwise Specified
L
LIMITS
MAX UNITS
GROUP A
SUBGROUP TEMPERATURE MIN
PARAMETERS
Charge Injection
SYMBOL
CONDITIONS
See Figure 2, V = 0V, R = 0Ω,
o
Q
9
9
+25 C
-100
+100
pC
pC
pC
pC
G
G
o
T
= +25 C, C = 10nF
o
A
L
+25 C
o
See Figure 2,
= 6V, R = 0Ω, T = +25 C
+25 C
-100
+100
o
V
o
G
G
A
+25 C
C = 10nF, V+ = 12V, V- = 0V
L
NOTES:
1. V = Input Voltage to Perform Proper Function.
IN
2. Signals on S , D or IN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
X
X
X
3. All leads soldered or welded to PC board.
4. Parameters listed in Table 3 are controlled via design or process and are not directly tested at final production. These parameters are lab
characterized upon initial design release or upon design changes. These parameters are guaranteed by characterization based upon
data from multiple production runs which reflect lot to lot and within lot variation.
TABLE 4. ELECTRICAL TEST REQUIREMENTS
MIL-STD-883 TEST REQUIREMENTS
Interim Electrical Parameters (Pre Burn-In)
Final Electrical Test Parameters
Group A Test Requirements
SUBGROUPS (SEE TABLES 1 AND 2)
1
1 (Note 1), 2, 3, 9, 10, 11
1, 2, 3, 9, 10, 11
1
Groups C and D Endpoints
NOTE:
1. PDA applies to Subgroup 1 only.
Spec Number 512043
4-53
DG411/883, DG412/883, DG413/883
Die Characteristics
DIE DIMENSIONS:
2760µm x 1780µm x 485 ± 25µm
METALLIZATION:
Type: SiAl
Thickness: 12kÅ ± 1kÅ
GLASSIVATION:
Type: Nitride
Thickness: 8kÅ ± 1kÅ
WORST CASE CURRENT DENSITY:
1.5 x 105A/cm2
Metallization Mask Layout
DG411/883, DG412/883, DG413/883
D1
2
IN1
1
IN2
16
15
D2
S2
14
3
S1
13
12
V+ SUBSTRATE
VL
4
5
V-
GND
11
S3
6
7
S4
10
D3
9
8
D4
IN4
IN3
Spec Number 512043
4-54
DG411/883, DG412/883, DG413/883
Test Circuits
V+
VO is the steady state output with the switch on.
Feedthrough via switch capacitance may result in spikes at
the leading and trailing edge of the output waveform.
RG
D1
VO
tR < 20ns (10% to 90% VIN
)
tF < 20ns (90% to 10% VIN
)
VG
CL
3V
0V
LOGIC
INPUT
V-
50%
VIN = 3V
tOFF
GND
SWITCH
INPUT
VS
0V
FIGURE 2A.
VO
0.9 VO
0.9 VO
SWITCH
OUTPUT
tON
∆VO
NOTE: Logic input waveform is inverted for switches that have
the opposite logic sense.
0V
INX
FIGURE 1A.
OFF
OFF
ON
ON
+5V
+15V
VL
V+
SWITCH
OUTPUT
D1
OFF
OFF
Q = ∆VO x CL
SWITCH
INPUT
S1
VO
INX
IN1
IN dependent on switch configuration input polarity determined by
X
sense of switch.
CL
RL
LOGIC
INPUT
V-
-15V
FIGURE 2B.
GND
FIGURE 2. CHARGE INJECTION
Repeat test for all IN and S.
For load conditions, see Specifications C (includes fixture and
L
stray capacitance)
R
L
-----------------------------------
V
= V
O
S
R
L + R
DS (ON)
FIGURE 1B.
FIGURE 1. SWITCHING TIME
Spec Number 512043
4-55
DG411/883, DG412/883, DG413/883
Burn-In Circuit
DG411/883, DG412/883, DG413/883 CERAMIC DIP
IN2
D2
S2
IN1
D1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
R2
R1
S1
V+
VL
S3
V-
V-
V+
VL
C1
D1
D2
C2
GND
S4
D3
IN3
D4
VA
IN4
C3
D3
R4
R4
Typical Schematic Diagram (Typical Channel)
V+
S
V-
VL
V+
INX
D
GND
V-
Spec Number 512043
4-56
DG411/883, DG412/883, DG413/883
Ceramic Dual-In-Line Frit Seal Packages (CerDIP)
c1 LEAD FINISH
F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A)
16 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
-D-
E
-A-
INCHES
MIN
MILLIMETERS
BASE
(c)
METAL
SYMBOL
MAX
0.200
0.026
0.023
0.065
0.045
0.018
0.015
0.840
0.310
MIN
-
MAX
5.08
0.66
0.58
1.65
1.14
0.46
0.38
21.34
7.87
NOTES
b1
A
b
-
-
M
M
0.014
0.014
0.045
0.023
0.008
0.008
-
0.36
0.36
1.14
0.58
0.20
0.20
-
2
-B-
(b)
b1
b2
b3
c
3
SECTION A-A
S
S
S
D
bbb
C A - B
D
-
4
BASE
PLANE
Q
2
A
-C-
SEATING
PLANE
c1
D
3
L
α
5
S1
b2
eA
A A
e
E
0.220
5.59
5
eA/2
b
C A - B
c
e
0.100 BSC
2.54 BSC
-
eA
eA/2
L
0.300 BSC
0.150 BSC
7.62 BSC
3.81 BSC
-
M
S
S
M
S
S
D
ccc
D
aaa
C A - B
-
NOTES:
0.125
0.200
0.060
-
3.18
5.08
1.52
-
-
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
Q
0.015
0.005
0.38
0.13
6
S1
7
o
o
o
o
90
105
90
105
-
α
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
aaa
bbb
ccc
M
-
-
-
-
0.015
0.030
0.010
0.0015
-
-
-
-
0.38
0.76
0.25
0.038
-
-
-
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
2, 3
8
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
N
16
16
Rev. 0 4/94
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
EUROPE
ASIA
Intersil Corporation
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
Intersil (Taiwan) Ltd.
Taiwan Limited
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 727-9207
FAX: (407) 724-7240
Spec Number 512043
4-57
DG411, DG412
DG413
DESIGN INFORMATION
July 1999
Monolithic Quad SPST CMOS Analog Switches
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application
and design information only. No guarantee is implied.
Typical Performance Curves
ON-RESISTANCE vs V AND POWER SUPPLY VOLTAGE
SWITCHING TIME vs TEMPERATURE
V+ = 15V, V- = -15V
D
50
240
210
180
150
120
90
A: ±5V
B: ±8V
45
V
L = 5V, VS = 10V
A
C: ±10V
D: ±12V
40
E: ±15V
F: ±20V
35
B
30
tON
C
25
D
tOFF
E
20
15
10
5
F
60
30
TA = +25oC
15 20
0
0
-20
-15
-10
-5
0
5
10
-55 -35
-15
5
25
45
65
85
105
125
DRAIN VOLTAGE (V)
TEMPERATURE (oC)
LEAKAGE CURRENT vs ANALOG VOLTAGE
V+ = 15V, V- = -15V
SUPPLY CURRENT vs INPUT SWITCHING FREQUENCY
40
100mA
V+ = 15V, V- = -15V
VL = 5V
V
L = 5V, TA = 25oC
30
20
10mA
1mA
ID(OFF)
10
I+, I-
0
100µA
10µA
1µA
IS(OFF)
4SW
-10
-20
-30
-40
-50
-60
ID + S(ON)
IL
4SW
1SW
100nA
10nA
1SW
10
100
1K
10K
100K
1M
10M
-15
-10
-5
0
5
10
15
DRAIN OR SOURCE VOLTAGE (V)
FREQUENCY (Hz)
CHARGE INJECTION vs ANALOG VOLTAGE (V )
CHARGE INJECTION vs ANALOG VOLTAGE (V )
S
D
100
140
V+ = 15V, V- = -15V
VL = 5V
V+ = 15V, V- = -15V
120
100
80
V
L = 5V
CL = 10nF
80
60
40
20
0
CL = 1nF
60
CL = 10nF
40
20
0
-20
-40
-60
CL = 1nF
-20
-40
-60
-15
-10
-5
0
5
10
15
-15
-10
-5
0
5
10
15
SOURCE VOLTAGE (V)
DRAIN VOLTAGE (V)
Spec Number 512043
4-58
相关型号：
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