CD4016BFMS [RENESAS]
QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, CDIP14, FRIT SEALED, DIP-14;
| 型号： | CD4016BFMS |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, CDIP14, FRIT SEALED, DIP-14 CD |
| 文件： | 总10页 (文件大小：201K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD4016BMS
CMOS Quad Bilateral Switch
November 1994
Features
Applications
• Transmission or Multiplexing of Analog or Digital Signals
• High Voltage Type (20V Rating)
• Analog Signal Switching/Multiplexing
• Signal Gating
• 20V Digital or ±10V Peak-to-Peak Switching
• 280Ω Typical On-State Resistance for 15V Operation
• Squelch Control
• Chopper
• Switch On-State Resistance Matched to Within 10Ω • Modulator
Typ. Over 15V Signal Input Range
• Demodulator
• High On/Off Output Voltage Ratio: 65dB Typ. at FIS =
10kHz, RL = 10kΩ
• Commutating Switch
• Digital Signal Switching/Multiplexing
• CMOS Logic Implementation
• High Degree of Linearity: <0.5% Distortion Typ. at FIS
= 1kHz, VIS = 5Vp-p, VDD-VSS ≥ 10V, RL = 10kΩ
• Extremely Low Off State Switch Leakage Resulting in
Very Low Offset Current and High Effective Off State
Resistance: 100pA Typ. at VDD-VSS = 18V, TA = 25oC
• Analog to Digital & Digital to Analog Conversion
• Digital Control of Frequency, Impedance, Phase, and
Analog Signal Gain
• Extremely High Control Input Impedance (Control cir-
cuit Isolated from Signal Circuit: 1012Ω Typ.
Description
• Low Crosstalk Between Switches: -50dB Typ. at FIS =
0.9MHz, RL = 1kΩ
CD4016BMS Series types are quad bilateral switches intended
for the transmission or multiplexing of analog or digital signals.
Each of the four independent bilateral switches has a single con-
trol signal input which simultaneously biases both the p and n
device in a given switch on or off.
• Matched
Control
Input
to
Signal
Output
Capacitance: Reduces Output Signal Transients
• Frequency Response, Switch On = 40MHz (Typ.)
• 100% Tested for Quiescent Current at 20V
The CD4016BMS is supplied in these 14 lead outline packages:
Braze Seal DIP
Frit Seal DIP
H4Q
H1B
• Maximum Control Input Current of 1µA at 18V Over Full
Package Temperature Range; 100nA at 18V at +25oC
• 5V, 10V and 15V Parametric Ratings
Ceramic Flatpack H3W
Pinout
Functional Diagram
CD4016BMS
TOP VIEW
14
13
12
11
10
9
IN/OUT
SIG A
1
2
3
4
5
6
7
VDD
SW
A
SIG A IN
SIG A OUT
SIG B IN
1
2
3
4
5
6
7
14 VDD
OUT/IN
CONTROL A
CONTROL D
13 CONTROL A
12 CONTROL D
11 SIG D IN
OUT/IN
SIG B
SW
D
IN/OUT
IN/OUT
SIG D
SIG B OUT
CONTROL B
CONTROL C
VSS
SW
B
10 SIG D OUT
CONTROL B
CONTROL C
VSS
OUT/IN
9
8
SIG C OUT
SIG C IN
OUT/IN
SIG C
SW
C
8
IN/OUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
File Number 3296
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-733
Specifications CD4016BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Thermal Resistance . . . . . . . . . . . . . . . .
Ceramic DIP and FRIT Package . . . . . 80 C/W
Flatpack Package . . . . . . . . . . . . . . . . 70 C/W
θ
θ
jc
ja
o
o
20 C/W
o
o
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
20 C/W
o
Maximum Package Power Dissipation (PD) at +125 C
o
o
o
o
Operating Temperature Range. . . . . . . . . . . . . . . . -55 C to +125 C
Package Types D, F, K, H
For TA = -55 C to +100 C (Package Type D, F, K) . . . . . . 500mW
o
o
For TA = +100 C to +125 C (Package Type D, F, K) . . . . .Derate
o
o
o
Storage Temperature Range (TSTG) . . . . . . . . . . . -65 C to +150 C
Linearity at 12mW/ C to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
o
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265 C
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
o
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
MIN MAX UNITS
GROUP A
SUBGROUPS
PARAMETER
SYMBOL
CONDITIONS (NOTE 1)
TEMPERATURE
o
Supply Current
IDD
VDD = 20V, VIN = VDD or GND
1
+25 C
-
0.5
50
µA
µA
µA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
nA
V
o
2
+125 C
-
o
VDD = 18V, VIN = VDD or GND
3
-55 C
-
0.5
-
o
Input Leakage Current
Input Leakage Current
IIL
IIH
VC = VDD or GND
VDD = 20
1
+25 C
-100
o
2
+125 C
-1000
-
o
VDD = 18V
VDD = 20
3
-55 C
-100
-
o
VC = VDD or GND
1
+25 C
-
100
1000
100
-
o
2
+125 C
-
o
VDD = 18V
3
-55 C
-
o
Input/Output Leakage
Current (Switch Off)
IOZL
IOZH
VDD = 18V, VC = 0V, VIS = 18V,
VOS = 0V
1
+25 C
-100
o
2
+125 C
-1000
-
o
3
-55 C
-100
-
o
Input/Output Leakage
Current (Switch Off)
VDD = 18V, VIS = 18V, VOS = 0V
1
+25 C
-
100
1000
100
-0.7
2.8
660
960
600
2000
2600
1870
400
600
360
850
1230
775
o
2
+125 C
-
o
3
-55 C
-
o
N Threshold Voltage
P Threshold Voltage
VNTH
VPTH
VDD = 10V, ISS = -10µA
VSS = 0V, IDD = 10µA
1
+25 C
-2.8
o
1
+25 C
0.7
V
o
On-State Resistance
RL = 10K Returned to
VDD-VSS/2
RON10
VIS = VDD or VSS, VDD = 10V
1
+25 C
-
-
-
-
-
-
-
-
-
-
-
-
Ω
o
2
+125 C
Ω
o
3
-55 C
Ω
o
RON10
RON15
RON15
F
VIS = 4.75V or 5.75V, VDD = 10V
VIS = VDD or VSS, VDD = 15V
VIS = 7.25 or 7.75, VDD = 15V
1
+25 C
Ω
o
2
+125 C
Ω
o
3
-55 C
Ω
o
1
+25 C
Ω
o
2
+125 C
Ω
o
3
-55 C
Ω
o
1
+25 C
Ω
o
2
3
+125 C
Ω
o
-55 C
Ω
o
Functional
(Note 3)
VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
7
+25 C
VOH > VOL <
VDD/2 VDD/2
V
o
7
+25 C
o
8A
+125 C
o
8B
-55 C
o
o
o
Switch Threshold
RL = 100K to VDD
SWTHRH5 VDD = 5V, VC = 1.5V, VIS = GND
SWTHRH15 VDD = 15V, VC = 2V, VIS = GND
1, 2, 3
1, 2, 3
+25 C, +125 C, -55 C 4.1
-
-
V
V
o
o
o
+25 C, +125 C, -55 C 14.1
7-734
Specifications CD4016BMS
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
GROUP A
LIMITS
MIN MAX UNITS
PARAMETER
SYMBOL
CONDITIONS (NOTE 1)
SUBGROUPS
TEMPERATURE
o
Input Voltage Control,
Low (Note 2)
VILC
VDD = 5V, VOS = VDD, VIS = VSS,
and VDD = 5V, VOS = VSS, VIS =
VDD, |IIS| < 10µA
1
2
3
1
+25 C
-
-
0.7
0.4
0.9
-
V
V
V
V
o
+125 C
o
-55 C
-
o
Control Input High
Voltage
(Note 2, Figure 12)
VIS = VSS, and
VIS = VDD
VIHC
VIHC
VDD = 5V, |IIS| = .16mA, 4.6V <
VOS < 0.4V
+25 C
3.5
o
VDD = 5V, |IIS| = .14mA, 4.6V <
VOS < 0.4V
2
3
1
2
3
+125 C
3.5
3.5
11
11
11
-
-
-
-
-
V
V
V
V
V
o
VDD = 5V, |IIS| = .25mA, 4.6V <
VOS < 0.4V
-55 C
o
VDD = 15V, |IIS| = 1.2mA, 13.5V <
VOS < 1.5V
+25 C
o
VDD = 15V, |IIS| = 1.1mA, 13.5V <
VOS < 1.5V
+125 C
o
VDD = 15V, |IIS| = 1.8mA, 13.5V <
VOS < 1.5V
-55 C
NOTES: 1. All voltages referenced to device GND, 100% testing being implemented.
2. Go/No Go test with limits applied to inputs
3. VDD = 2.8V/3V, RL = 100K to VDD
VDD = 20V/18V, RL = 10K to VDD
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
LIMITS
PARAMETER
SYMBOL
CONDITIONS
SUBGROUPS TEMPERATURE
MIN
MAX
UNITS
ns
o
Propagation Delay
Signal Input to Signal
Output
TPHL
TPLH
VDD = 5V, VIN = VDD or GND
(Notes 1, 2)
9
+25 C
-
-
100
135
o
o
10, 11
+125 C, -55 C
ns
o
Propagation Delay
Turn On
TPZH
TPZL
VDD = 5V, VIN = VDD or GND
(Notes 2, 3)
9
+25 C
-
-
70
95
ns
ns
o
o
10, 11
+125 C, -55 C
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
o
o
2. -55 C and +125 C limits guaranteed, 100% testing being implemented.
3. CL = 50pF, RL = 1K, TR, TF < 20ns.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
0.25
7.5
0.5
15
UNITS
µA
µA
µA
µA
µA
µA
V
o
o
IDD
VDD = 5V, VIN = VDD or GND
1, 2
-55 C, +25 C
-
-
-
-
-
-
-
-
-
o
+125 C
o
o
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
1, 2
1, 2
1, 2
-55 C, +25 C
o
+125 C
o
o
-55 C, +25 C
0.5
30
o
+125 C
o
o
Input Voltage Control,
Low
VILC
VDD = 10V, VOS = VDD, VIS =
VSSand VOS = VSS, VIS = VDD
|IIS| < 10µA
+25 C-55 C
0.7
0.4
0.9
o
+125 C
V
o
-55 C
V
7-735
Specifications CD4016BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
1, 2
TEMPERATURE
MIN
MAX
-
UNITS
V
o
o
Input Voltage Control,
High (See Figure 12)
VIHC
VDD = 10V, VIS = VDD or GND
+25 C-55 C
7
7
7
-
o
1, 2
+125 C
-
V
o
1, 2
-55 C
-
V
o
Propagation Delay Signal
Input to Signal Output
TPHL
TPLH
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
Any Input
1, 2, 3
1, 2, 3
1, 2, 4
1, 2, 4
1, 2
+25 C
40
30
40
30
7.5
ns
ns
ns
ns
pF
o
+25 C
-
o
Propagation Delay
Turn On
TPZH
TPZL
+25 C
-
o
+25 C
-
o
Input Capacitance
NOTES:
CIN
+25 C
-
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K. Input TR, TF < 20ns.
4. CL = 50pF, RL = 1K
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
NOTES
1, 4
TEMPERATURE
MIN
MAX
2.5
UNITS
o
VDD = 20V, VIN = VDD or GND
VDD = 10V, ISS = -10µA
+25 C
-
-2.8
-
µA
V
o
N Threshold Voltage
VNTH
1, 4
+25 C
-0.2
±1
o
N Threshold Voltage
Delta
∆VNTH VDD = 10V, ISS = -10µA
1, 4
+25 C
V
o
P Threshold Voltage
VPTH
VSS = 0V, IDD = 10µA
1, 4
1, 4
+25 C
0.2
-
2.8
V
V
o
P Threshold Voltage
Delta
∆VPTH VSS = 0V, IDD = 10µA
+25 C
±1
o
Functional
F
VDD = 18V, VIN = VDD or GND
1
+25 C
VOH >
VDD/2
VOL <
VDD/2
V
VDD = 3V, VIN = VDD or GND
VDD = 5V
o
Propagation Delay Time
TPHL
TPLH
1, 2, 3, 4
+25 C
-
1.35 x
ns
o
+25 C
Limit
o
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25 C limit.
4. Read and Record
O
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25 C
PARAMETER
Supply Current - SSI
ON Resistance
SYMBOL
DELTA LIMIT
IDD
±0.1µA
RONDEL10 ± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
Initial Test (Pre Burn-In)
Interim Test 1 (Post Burn-In)
Interim Test 2 (Post Burn-In)
PDA (Note 1)
METHOD
100% 5004
100% 5004
100% 5004
100% 5004
GROUP A SUBGROUPS
READ AND RECORD
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
1, 7, 9
1, 7, 9
1, 7, 9
1, 7, 9, Deltas
7-736
Specifications CD4016BMS
TABLE 6. APPLICABLE SUBGROUPS (Continued)
CONFORMANCE GROUP
Interim Test 3 (Post Burn-In)
PDA (Note 1)
METHOD
100% 5004
100% 5004
100% 5004
Sample 5005
Sample 5005
Sample 5005
Sample 5005
GROUP A SUBGROUPS
1, 7, 9
READ AND RECORD
IDD, IOL5, IOH5A
1, 7, 9, Deltas
Final Test
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 9
Group A
Group B
Subgroup B-5
Subgroup B-6
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
Group D
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
READ AND RECORD
CONFORMANCE GROUPS
METHOD
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
Group E Subgroup 2
5005
1, 7, 9
Table 4
1, 9
Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
Static Burn-In 1
Note 1
2, 3, 9, 10
1, 4-8, 11-13
14
Static Burn-In 2
Note 1
2, 3, 9, 10
-
7
7
7
1, 4-6, 8, 11-14
14
Dynamic Burn-
In Note 1
2, 3, 9, 10
5, 6, 12, 13
1, 4, 8, 11
Irradiation
Note 2
2, 3, 9, 10
1, 4-6, 8, 11-14
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
Schematic Diagram
VDD
CONTROL
VC
n
IN/OUT
OUT/IN
VSS
p
FIGURE 1. 1 OF 4 IDENTICAL SECTIONS
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
737
CD4016BMS
Typical Performance Characteristics
SUPPLY VOLTS: VDD = +15V; VSS = 0
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTS: VDD = +10V; VSS = 0
AMBIENT TEMPERATURE (TA) = +25oC
10kΩ
12.5
10.0
7.5
10
RL = 100kΩ
RL = 100kΩ
10kΩ
8
6
4
2
1kΩ
1kΩ
VIS
VIS
n
n
p
5.0
VC = VDD
p
VC = VDD
VOS
RL
10
VOS
RL
2.5
0
2.5
5.0
7.5
10.0
12.5
15.0
0
2
4
6
8
INPUT SIGNAL VOLTS (VIS)
INPUT SIGNAL VOLTS (VIS)
FIGURE2. TYPICALON-STATECHARACTERISTICSFOR1OF
4 SWITCHES WITH VDD = +15V, VSS = 0V
FIGURE3. TYPICALON-STATECHARACTERISTICSFOR1OF
4 SWITCHES WITH VDD = +10V, VSS = 0V
SUPPLY VOLTS: VDD = +5;V VSS = 0
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTS: VDD = +7.5 V; VSS = -7.5V
AMBIENT TEMPERATURE (TA) = +25oC
5
RL = 100kΩ
10kΩ
1kΩ
5
2.5
0
RL = 100kΩ
4
10kΩ
3
1kΩ
VIS
VIS
-2.5
-5
2
1
n
n
p
VC = VDD
p
VC = VDD
VOS
RL
VOS
RL
0
1
2
3
4
5
-7.5
-5
-2.5
0
2.5
5
7.5
INPUT SIGNAL VOLTS (VIS)
INPUT SIGNAL VOLTS (VIS)
FIGURE4. TYPICALON-STATECHARACTERISTICSFOR1OF
4 SWITCHES WITH VDD = +5V, VSS = 0V
FIGURE5. TYPICALON-STATECHARACTERISTICSFOR1OF
4 SWITCHES WITH VDD = +7.5V, VSS = -7.5V
SUPPLY VOLTS: VDD = +5V; VSS = -5V
SUPPLY VOLTS: VDD = +2.5V; VSS = -2.5V
AMBIENT TEMPERATURE (TA) = +25oC
6
AMBIENT TEMPERATURE (TA) = +25oC
3
10kΩ
4
RL = 100kΩ
2
1
RL = 100kΩ
10kΩ
1kΩ
2
1kΩ
0
0
VIS
VIS
-1
-2
n
n
-2
p
VC = VDD
p
VC = VDD
VOS
RL
-4
VOS
RL
-3
-2
-1
0
1
2
3
-4
-2
0
2
4
6
INPUT SIGNAL VOLTS (VIS)
INPUT SIGNAL VOLTS (VIS)
FIGURE6. TYPICALON-STATECHARACTERISTICSFOR1OF
4 SWITCHES WITH VDD = +5V, VSS = -5V
FIGURE7. TYPICALON-STATECHARACTERISTICSFOR1OF
4 SWITCHES WITH VDD = +2.5V, VSS = -2.5V
7-738
CD4016BMS
Typical Performance Characteristics (Continued)
SUPPLY VOLTS: VDD = +5V, VSS = -5V
CONTROL VOLTS (VC) = -5V
INPUT SIGNAL VOLTS (VIS) = 5VP-P SINE WAVE (1.77 RMS)
*LOAD CAPACITANCE (CL) = CFIXTURE+CMETER=2.3+2.5=4.8pF
FIXTURE AND METER NULLED OUT
CIOS (FIXTURE) = 0.8pF
6
4
RF VOLTMETER
BOONTON RADIO
MODEL 91-CA
SUPPLY VOLTS: VDD = +5V; VSS = -5V
-55oC
30
25
20
15
10
5
OR EQUIV.
p
n
VOS
+125oC
100kΩ
VIS
37
RL
CL
2
0
VC = VSS
10kΩ
39
VIS
LOAD RESISTANCE
41.5
45
1kΩ
(RL) = 1MΩ
VC = +5V
+125oC
-2
-4
n
p
VOS
-55oC
51
RL = 10k
0
10-1
2
4
2
4
6 8
2
4
2
4
2
4
6 81
10
INPUT SIGNAL FREQUENCY (fis) kHz
61802
61803
61804
-4
-2
0
2
4
6
INPUT SIGNAL VOLTS (VIS)
FIGURE 8. TYPICAL ON-STATE CHARACTERISTICS AS A
FIGURE 9. TYPICAL FEEDTHRU vs FREQUENCY - SWITCH
OFF
FUNCTION OF TEMPERATURE FOR
SWITCHES WITH VDD = +5V, VSS = -5V
1 OF 4
SUPPLY VOLTS: VDD = +5V; VSS = -5V
INPUT SIGNAL VOLTS (VIS) = 5Vp-p SINE WAVE (1.77RMS)
FIXTURE AND METER NULLED OUT
SUPPLY VOLTS:
VDD = +5V, VSS = -5V
INPUT SIGNAL VOLTS
(VIS) = 5Vp-p
SINE WAVE (1.77 RMS)
CONTROL VOLTS
(VC) = +5V
*LOAD CAPACITANCE
= (CFIX + CMETER) =
2.3 + 2.5 = 4.8pF
CIOS = 0.8pF
RF VOLTMETER
BOONTON RADIO
MODEL 91-CA
35.5
37
30
25
20
15
10
5
OR EQUIV.
p
VOS
RF VOLTMETER
BOONTON RADIO
MODEL 91-CA
OR EQUIV.
5V
VC = VDD
n
VIS
(RMS)
n
VIS (A)
RL
CL*
VC = VDD
39
p
1kΩ
1kΩ
-3dB
POINTS
2.0
1.5
1.0
0.5
LOAD RESISTANCE (RL) = 1MΩ
41.5
45
10kΩ
1kΩ
VC = VSS
n
p
VOS (B)
100kΩ
1kΩ
1kΩ
51
2
4
6
2
4
6
2
4
6
0.1
8 1
810
8 100
0
2
4 6 8104
INPUT SIGNAL FREQUENCY (FIS) MHz
10-1
1
10
102
103
INPUT SIGNAL FREQUENCY (fis) (kHz)
FIGURE 10. TYPICAL CROSSTALK BETWEEN SWITCH
CIRCUITS IN THE SAME PACKAGE
FIGURE 11. TYPICAL FREQUENCY RESPONSE - SWITCH ON
Iis
CD4016BMS
1 OF 4 SWITCHES
Vis
VOS
[
Vis - Vos ]
ron
=
[
]
Iis
FIGURE 12. DETERMINATION OF RON AS A TEST CONDITION FOR
CONTROL INPUT HIGH VOLTAGE (VIHC) SPECIFICATION
7-739
CD4016BMS
o
TYPICAL ON-STATE RESISTANCE CHARACTERISTICS, T = +25 C
A
LOAD CONDITIONS
SUPPLY
CONDITIONS
RL = 1kΩ
RL = 10kΩ
RL = 100kΩ
VDD
(V)
VSS
(V)
VALUE
Vis
(V)
VALUE
Vis
(V)
VALUE
Vis
(V)
CHARACTERISTICS*
RON
(Ω)
200
200
300
290
290
500
860
600
1.7k
200
200
290
260
310
600
590
720
232k
(Ω)
200
200
300
250
250
560
470
580
7k
(Ω)
180
200
320
240
300
610
450
800
33k
180
180
400
240
240
760
490
520
870k
+15
0
+15
0
+15
0
+15
0
RON (max.)
RON
+15
+10
0
0
+11
+10
0
+9.3
+10
0
+9.2
+10
0
RON (max.)
RON
+10
+5
0
0
+7.4
+5
+5.6
+5
+5.5
+5
0
0
0
RON (max.)
RON
+5
0
+4.2
+7.5
-7.5
±0.25
+5
+2.9
+7.5
-7.5
±0.25
+5
+2.7
+7.5
-7.5
±0.25
+5
+7.5
-7.5
200
200
280
250
250
580
450
520
300k
RON (max.)
RON
+7.5
+5
-7.5
-5
-5
-5
-5
RON (max.)
RON
+5
-5
±0.25
+2.5
-2.5
±0.25
±0.25
+2.5
-2.5
±0.25
±0.25
+2.5
-2.5
±0.25
+2.5
-2.5
RON (max.)
+2.5
-2.5
*Variation from perfect switch, ron = 0Ω
Typical Wave Response
FIGURE 13. TYPICAL SINE WAVE RESPONSE OF VDD = +7.5V,
VSS = -7.5V
FIGURE 14. TYPICAL SINE WAVE RESPONSE OF VDD = +5V,
VSS = -5V
Scale X = 0.2ms/Div Y = 2.0V/Div
VDD = VC = +7.5V, RL = 10KΩ
CL = 15pF
Scale X = 0.2ms/Div Y = 2.0V/Div
VDD = VC = +5V, RL = 10KΩ
CL = 15pF
fis = 1kHz VIS = 5Vp-p
Distortion = 0.2%
fis = 1kHz VIS = 5Vp-p
Distortion = 0.4%
7-740
CD4016BMS
Typical Wave Response (Continued)
FIGURE 15. TYPICAL SINE WAVE RESPONSE OF VDD = +2.5V,
VSS = -2.5V
FIGURE 16. TYPICAL SQUARE WAVE RESPONSE AT VDD = VC
= +15V, VSS = GND
Scale: X = 0.2ms/Div Y = 2.0V/Div
Scale: X = 100ns/Div Y = 5.0V/Div
FIGURE 17. TYPICAL SQUARE WAVE RESPONSE AT VDD = VC
= +10V, VSS = GND
FIGURE 18. TYPICAL SQUARE WAVE RESPONSE AT VDD = VC
= +5V, VSS = GND
Scale: X = 100ns/Div Y = 5.0V/Div
Scale: X = 100ns/Div Y = 2.0V/Div
+10V
0
VC
tr = tf = 20ns
VC
VDD = +10V
VOS WITH TEST UNIT
(1 SWITCH OF
CD4016BMS PLUGGED
IN TEST FIXTURE)
Vis
CD4016BMS
Vos
VOS FIXTURE ALONE
(NO UNIT. . .TERM
5 TO 3 OF SOCKET)
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
(a)
(b)
VC = 10V/Div
VOS = 0.2V/Div
t = 100ns/Div
FIGURE 19. CROSSTALK-CONTROL INPUT TO SIGNAL OUTPUT
7-741
CD4016BMS
REP
RATE
VC
VDD
tr = tf = 20ns
VDD
VDD
0
tr = tf = 20ns
VC
+10V
0
tr = tf = 20ns
Vis
Vos
CL
CD4016BMS
Vos
RL = 10KΩ
CD4016BMS
200KΩ
Vis = VDD
CL
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
VSS
VSS
FIGURE 20. PROPAGATION DELAY TIME SIGNAL INPUT (VIS)
TO SIGNAL OUTPUT (VOS)
FIGURE 21. MAXIMUM CONTROL-INPUT REPETITION RATE
MEASURED ON BOONTON CAPACITANCE
BRIDGE MODEL 75A (1MHz)
VC
(13)
(1)
±
Vos
VC = -5V
Vis
Vos
VSS = -5V
VDD = +5V
CD4016BMS
VSS
CIOS
I = 10µA
I
Vis = VDD
Cis
Cos
SWITCH THRESHOLD VOLTAGE IS DEFINED AS THE VOLTAGE
APPLIED TO A TRANSMISSION GATE CONTROL WHICH CAUSES
10µA OF TRANSMISSION GATE CURRENT
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
FIGURE 22. SWITCH THRESHOLD VOLTAGE
FIGURE 23. CAPACITANCE CIOS AND COS
VDD
VDD
0
VC
50%
VC
tr = tf = 20ns
tPZH
Vos
CD4016BMS
Vis = VDD OR VSS
Vos
Vos
RL TO VSS
Vis TO VDD
10%
10%
CL
RL
VSS
tPZL
ALL UNUSED TERMINALS
ARE CONNECTED TO VSS
RL TO VDD
Vis TO VSS
VSS
VDD
FIGURE 24. TURN-ON PROPAGATION DELAY CONTROL INPUT
Chip Dimensions and Pad Layout
METALLIZATION: Thickness: 11kÅ − 14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 i
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
-3
7-742
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