CD4098BKMS [RENESAS]
4000/14000/40000 SERIES, DUAL MONOSTABLE MULTIVIBRATOR, CDFP16, CERAMIC, FP-16;型号: | CD4098BKMS |
厂家: | RENESAS TECHNOLOGY CORP |
描述: | 4000/14000/40000 SERIES, DUAL MONOSTABLE MULTIVIBRATOR, CDFP16, CERAMIC, FP-16 CD |
文件: | 总11页 (文件大小:105K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
CD4098BMS
CMOS Dual Monostable Multivibrator
December 1992
Features
Description
• High Voltage Type (20V Rating)
CD4098BMS dual monostable multivibrator provides stable
retriggerable/resettable one shot operation for any fixed volt-
age timing application.
• Retriggerable/Resettable Capability
• Trigger and Reset Propagation Delays Independent of
RX, CX
An external resistor (RX) and an external capacitor (CX)
control the timing for the circuit. Adjustment of RX and CX
provides a wide range of output pulse widths from the Q and
Q terminals. The time delay from trigger input to output
transition (trigger propagation delay) and the time delay from
reset input to output transition (reset propagation delay) are
independent of RX and CX.
• Triggering from Leading or Trailing Edge
• Q and Q Buffered Outputs Available
• Separate Resets
• Wide Range of Output Pulse Widths
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Standardized Symmetrical Output Characteristics
Leading edge triggering (+TR) and trailing edge triggering
(-TR) inputs are provided for triggering from either edge of
an input pulse. An unused +TR input should be tied to VSS.
An unused -TR input should be tied to VDD. A RESET (on
low level) is provided for immediate termination of the output
pulse or to prevent output pulses when power is turned on.
An unused RESET input should be tied to VDD. However, if
an entire section of the CD4098BMS is not used, its RESET
should be tied to VSS. See Table 9.
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25oC
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
In normal operation the circuit triggers (extends the output
pulse one period) on the application of each new trigger
pulse. For operation in the non-retriggerable mode, Q is
connected to -TR when leading edge triggering (+TR) is
used or Q is connected to +TR when trailing edge triggering
(-TR) is used.
- 2.5V at VDD = 15V
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
The time period (T) for this multivibrator can be
approximated by: TX = 1/2RXCX for CX 3 0.01µF. Time
periods as a function of RX for values of CX and VDD are
given in Figure 8. Values of T vary from unit to unit and as a
function of voltage, temperature, and RXCX.
• Pulse Delay and Timing
• Pulse Shaping
Astable Multivibrator
The minimum value of external resistance, RX, is 5kΩ. The
maximum value of external capacitance, CX, is 100µF.
Figure 9 shows time periods as a function of CX for values of
RX and VDD.
Pinout
CD4098BMS
TOP VIEW
The output pulse width has variations of ±2.5% typically, over
the temperature range of -55oC to +125oC for CX = 1000pF
and RX = 100kΩ.
CX1
RXCX (1)
RESET (1)
+TR (1)
-TR (1)
Q1
1
2
3
4
5
6
7
8
16 VDD
For power supply variations of ±5%, the output pulse width
has variations of ±0.5% typically, for VDD = 10V and 15V
and ±1% typically, for VDD = 5V at CX = 1000pF and
RX = 5kΩ.
15 CX2
14 RXCX (2)
13 RESET (2)
12 +TR (2)
11 -TR (2)
10 Q2
The CD4098BMS is supplied in these 16-lead outline packages:
Braze Seal DIP
Frit Seal DIP
Ceramic Flatpack
H4T
H1F
H6W
Q1
9
Q2
VSS
TERMINALS 1, 8, 15 ARE ELECTRICALLY
CONNECTED INTERNALLY
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
File Number 3332
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-482
CD4098BMS
Functional Diagram
CX1
RX1
VDD
1
2 RXCX (1)
4
5
3
6
7
+TR
-TR
Q1
Q1
MONO 1
RESET
12
11
13
10
9
Q2
Q2
+TR
-TR
MONO 2
RESET
15
14 RXCX (2)
RX2
VDD
CX2
VDD = 16
VSS = 8
7-483
Specifications CD4098BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Thermal Resistance . . . . . . . . . . . . . . . .
Ceramic DIP and FRIT Package . . . . . 80 C/W
Flatpack Package . . . . . . . . . . . . . . . . 70 C/W
θ
θ
jc
ja
o
o
20 C/W
o
o
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
20 C/W
o
Maximum Package Power Dissipation (PD) at +125 C
o
o
o
o
Operating Temperature Range. . . . . . . . . . . . . . . . -55 C to +125 C
Package Types D, F, K, H
For TA = -55 C to +100 C (Package Type D, F, K) . . . . . . 500mW
o
o
For TA = +100 C to +125 C (Package Type D, F, K) . . . . .Derate
o
o
o
Storage Temperature Range (TSTG) . . . . . . . . . . . -65 C to +150 C
Linearity at 12mW/ C to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
o
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265 C
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
o
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
MIN MAX UNITS
GROUP A
SUBGROUPS
PARAMETER
Supply Current
SYMBOL
CONDITIONS (NOTE 1)
TEMPERATURE
o
IDD
VDD = 20V, VIN = VDD or GND
1
+25 C
-
2
200
2
µA
µA
µA
nA
nA
nA
nA
nA
nA
mV
V
o
2
+125 C
-
o
VDD = 18V, VIN = VDD or GND
3
-55 C
-
o
Input Leakage Current
Input Leakage Current
IIL
VIN = VDD or GND
VIN = VDD or GND
VDD = 20V
1
+25 C
-100
-
o
2
+125 C
-1000
-
o
VDD = 18V
VDD = 20V
3
-55 C
-100
-
o
IIH
1
+25 C
-
-
-
-
100
1000
100
50
-
o
2
+125 C
o
VDD = 18V
3
-55 C
o
o
o
Output Voltage
VOL15 VDD = 15V, No Load
VOH15 VDD = 15V, No Load (Note 3)
1, 2, 3
+25 C, +125 C, -55 C
o
o
o
Output Voltage
1, 2, 3
+25 C, +125 C, -55 C 14.95
o
Output Current (Sink)
Output Current (Sink)
Output Current (Sink)
IOL5
IOL10
IOL15
VDD = 5V, VOUT = 0.4V
VDD = 10V, VOUT = 0.5V
VDD = 15V, VOUT = 1.5V
1
+25 C
0.53
1.4
3.5
-
-
mA
mA
mA
mA
mA
mA
mA
V
o
1
+25 C
-
o
1
+25 C
-
o
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V
1
+25 C
-0.53
-1.8
-1.4
-3.5
-0.7
2.8
o
1
+25 C
-
o
1
+25 C
-
o
1
1
+25 C
-
o
N Threshold Voltage
P Threshold Voltage
Functional
VNTH
VPTH
F
VDD = 10V, ISS = -10µA
+25 C
-2.8
0.7
o
VSS = 0V, IDD = 10µA
1
+25 C
V
o
VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
VDD = 5V, VOH > 4.5V, VOL < 0.5V
7
+25 C
VOH > VOL <
VDD/2 VDD/2
V
o
7
+25 C
o
8A
8B
1, 2, 3
+125 C
o
-55 C
o
o
o
Input Voltage Low
(Note 2)
VIL
VIH
VIL
VIH
+25 C, +125 C, -55 C
-
1.5
V
V
V
V
o
o
o
Input Voltage High
(Note 2)
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
1, 2, 3
1, 2, 3
+25 C, +125 C, -55 C 3.5
-
4
-
o
o
o
Input Voltage Low
(Note 2)
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
+25 C, +125 C, -55 C
-
o
o
o
Input Voltage High
(Note 2)
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
+25 C, +125 C, -55 C
11
NOTES: 1. All voltages referenced to device GND, 100% testing being 3. Foraccuracy, voltageismeasureddifferentiallytoVDD. Limit
implemented.
is 0.050V max.
2. Go/No Go test with limits applied to inputs.
7-484
Specifications CD4098BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
GROUP A
LIMITS
MIN
PARAMETER
SYMBOL
CONDITIONS (NOTE 1, 2)
SUBGROUPS TEMPERATURE
MAX
500
675
200
270
UNITS
ns
o
Propagation Delay
+TR, -TR to Q, Q
TPHL1 VDD = 5V, VIN = VDD or GND
TPLH1 RX = 5K to 10KΩ, CX ≥ 15pF
9
+25 C
-
-
-
-
o
o
10, 11
9
+125 C, -55 C
ns
o
Transition Time
TTHL1 VDD = 5V, VIN = VDD or GND
RX = 5K to 10KΩ, CX = 15pF to
10,000pF
+25 C
ns
o
o
10, 11
+125 C, -55 C
ns
o
Transition Time
(Note 2)
TTLH1 VDD = 5V, VIN = VDD or GND
9
+25 C
-
-
200
270
ns
ns
RX = 5K to 10KΩ, CX ≥ 15pF
o
o
10, 11
+125 C, -55 C
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
o
o
2. -55 C and +125 C limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
1
UNITS
µA
o
o
IDD
VDD = 5V, VIN = VDD or GND
1, 2
-55 C, +25 C
-
-
-
-
-
-
-
o
+125 C
30
2
µA
o
o
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
1, 2
1, 2
-55 C, +25 C
µA
o
+125 C
60
2
µA
o
o
-55 C, +25 C
µA
o
+125 C
120
50
µA
o
o
Output Voltage
Output Voltage
Output Voltage
Output Voltage
Output Current (Sink)
VOL
VOL
VOH
VOH
IOL5
VDD = 5V, No Load
VDD = 10V, No Load
VDD = 5V, No Load
VDD = 10V, No Load
VDD = 5V, VOUT = 0.4V
1, 2
1, 2
1, 2
1, 2
1, 2
+25 C, +125 C,
mV
o
-55 C
o
o
+25 C, +125 C,
-
50
-
mV
V
o
-55 C
o
o
+25 C, +125 C,
4.95
9.95
o
-55 C
o
o
+25 C, +125 C,
-
V
o
-55 C
o
+125 C
0.36
-
-
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
o
-55 C
0.64
o
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Output Current (Source)
IOL10
IOL15
VDD = 10V, VOUT = 0.5V
VDD = 15V, VOUT = 1.5V
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
+125 C
0.9
-
o
-55 C
1.6
-
o
+125 C
2.4
-
o
-55 C
4.2
-
o
IOH5A VDD = 5V, VOUT = 4.6V
IOH5B VDD = 5V, VOUT = 2.5V
+125 C
-
-
-
-
-
-
-
-
-
-0.36
-0.64
-1.15
-2.0
-0.9
-1.6
-2.4
-4.2
3
o
-55 C
o
+125 C
o
-55 C
o
IOH10
IOH15
VDD = 10V, VOUT = 9.5V
VDD =15V, VOUT = 13.5V
+125 C
o
-55 C
o
+125 C
o
-55 C
o
o
Input Voltage Low
Input Voltage High
VIL
VDD = 10V, VOH > 9V, VOL <
1V
1, 2
1, 2
+25 C, +125 C,
o
-55 C
o
o
VIH
VDD = 10V, VOH > 9V, VOL <
1V
+25 C, +125 C,
+7
-
V
o
-55 C
7-485
Specifications CD4098BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
1, 2, 3, 4
1, 2, 3, 4
TEMPERATURE
MIN
MAX
250
UNITS
ns
o
Propagation Delay
+TR, -TR to Q, Q
CX ≥ 15pF
TPHL1 VDD = 10V
TPLH1
+25 C
-
-
o
VDD = 15V
+25 C
200
ns
o
Propagation Delay
Reset CX ≥ 15pF
TPHL2 VDD = 5V
1, 2, 3
+25 C
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
450
250
150
100
80
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
%
TPLH2
o
VDD = 10V
1, 2, 3, 4
1, 2, 3,4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3
+25 C
o
VDD = 15V
TTHL1 VDD = 10V
VDD = 15V
+25 C
o
Transition Time
CX = 15pF to 10,000pF
+25 C
o
+25 C
o
Transition Time
CX = 0.01µF to 0.1µF
TTLH2 VDD = 5V
+25 C
300
150
130
500
300
160
100
80
TTHL2
o
VDD = 10V
1, 2, 3, 5
1, 2, 3, 5
1, 2, 3
+25 C
o
VDD = 15V
TTHL3 VDD = 5V
VDD = 10V
+25 C
o
Transition Time
CX = 0.1µF to 1µF
+25 C
o
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 4
1, 2, 3, 5
1, 2, 3, 5
1, 2, 3, 5
1, 2, 3, 5
1, 2, 3, 5
1, 2, 3,5
1, 2, 3, 5
1, 2, 3, 5
1, 2, 3, 5
1, 2, 3, 6
1, 2, 3, 6
1, 2, 3, 6
1, 2
+25 C
o
VDD = 15V
+25 C
o
Transition Time
CX ≥ 15pF
TTLH1 VDD = 10V
VDD = 15V
+25 C
o
+25 C
o
Minimum Reset Pulse
Width, CX = 15pF
TW
TW
TW
TW
VDD = 5V
+25 C
200
80
o
VDD = 10V
VDD = 15V
VDD = 5V
+25 C
o
+25 C
60
o
Minimum Reset Pulse
Width, CX = 1000pF
+25 C
1200
600
500
50
o
VDD = 10V
VDD = 15V
VDD = 5V
+25 C
o
+25 C
o
Minimum Reset Pulse
Width, CX = 0.1µF
+25 C
o
VDD = 10V
VDD = 15V
VDD = 5V
+25 C
30
o
+25 C
20
o
Pulse Width Match Be-
tween Circuits in Same
Package
+25 C
10
o
VDD = 10V
VDD = 15V
VDD = 5V to 15V
+25 C
15
%
o
+25 C
15
%
o
Trigger Rise or Fall Time
TRTR
TFTR
+25 C
100
µs
o
Input Capacitance
NOTES:
CIN
Any Inputs
1, 2
+25 C
-
7.5
pF
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, inputs tR, tF < 20ns.
4. RX = 5K to 10MΩ.
5. RX = 100kΩ
6. RX = 10kΩ
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
N Threshold Voltage
SYMBOL
IDD
CONDITIONS
NOTES
1, 4
TEMPERATURE
MIN
-
MAX
7.5
UNITS
µA
o
VDD = 20V, VIN = VDD or GND
VDD = 10V, ISS = -10µA
+25 C
o
VNTH
1, 4
+25 C
-2.8
-0.2
V
7-486
Specifications CD4098BMS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
UNITS
o
N Threshold Voltage
Delta
∆VTN
VDD = 10V, ISS = -10µA
1, 4
+25 C
-
±1
V
o
P Threshold Voltage
VTP
VSS = 0V, IDD = 10µA
VSS = 0V, IDD = 10µA
1, 4
1, 4
+25 C
0.2
-
2.8
V
V
o
P Threshold Voltage
Delta
∆VTP
+25 C
±1
o
Functional
F
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
VDD = 5V
1
+25 C
VOH >
VDD/2
VOL <
VDD/2
V
o
Propagation Delay Time
TPHL
TPLH
1, 2, 3, 4
+25 C
-
1.35 x
ns
o
+25 C
Limit
o
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25 C limit.
4. Read and Record
o
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25 C
PARAMETER
Supply Current - MSI-1
Output Current (Sink)
Output Current (Source)
SYMBOL
IDD
DELTA LIMIT
± 0.2µA
IOL5
± 20% x Pre-Test Reading
± 20% x Pre-Test Reading
IOH5A
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
CONFORMANCE GROUP
Initial Test (Pre Burn-In)
Interim Test 1 (Post Burn-In)
Interim Test 2 (Post Burn-In)
PDA (Note 1)
METHOD
100% 5004
100% 5004
100% 5004
100% 5004
100% 5004
100% 5004
100% 5004
Sample 5005
Sample 5005
Sample 5005
Sample 5005
GROUP A SUBGROUPS
READ AND RECORD
IDD, IOL5, IOH5A
1, 7, 9
1, 7, 9
IDD, IOL5, IOH5A
IDD, IOL5, IOH5A
1, 7, 9
1, 7, 9, Deltas
Interim Test 3 (Post Burn-In)
PDA (Note 1)
1, 7, 9
IDD, IOL5, IOH5A
1, 7, 9, Deltas
Final Test
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 9
Group A
Group B
Subgroup B-5
Subgroup B-6
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
Group D
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
TEST
READ AND RECORD
MIL-STD-883
METHOD
CONFORMANCE GROUPS
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
Table 4
Group E Subgroup 2
5005
1, 7, 9
Table 4
1, 9
7-487
Specifications CD4098BMS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
Static Burn-In 1
Note 1
6, 7, 9, 10
1-5, 8, 11-15
16
Static Burn-In 2
Note 1
6, 7, 9, 10
1, 8, 15
1, 4, 8, 12, 15
1, 8, 15
2-5, 11-14, 16
2, 14, 16
Dynamic Burn-
In Note 1
-
6, 7, 9, 10
5, 11
3, 13
Irradiation
Note 2
2, 6, 7, 9, 10, 14
3-5, 11-13, 16
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V ± 0.5V
TABLE 9. FUNCTIONAL TERMINAL CONNECTIONS
VDD TO
TERM. NO.
VSS TO
TERM. NO.
INPUT PULSE TO
TERM. NO.
OTHER
CONNECTIONS
FUNCTION
MONO 1
MONO 2
MONO 1
MONO 2
MONO 1
MONO 2
MONO 1
MONO 2
Leading Edge Trigger/
Retriggerable
3, 5
11, 13
4
12
Leading Edge Trigger/
Non-Retriggerable
3
13
13
13
11
4
5
5
12
11
11
5-7
11-9
Trailing Edge Trigger/
Retriggerable
3
4
12
Trailing Edge Trigger/
Non-Retriggerable
3
4-6
12-10
Unused Section
NOTES:
5
3, 4
12, 13
1. A retriggerable one-shot multivibrator has an output pulse width which is extended one full time period (TX) after application of the last
trigger pulse. The minimum time between retriggering edges (or trigger and retrigger edges) is 40% of (TX).
2. A non-retriggerable one-shot multivibrator has a time period TX referenced from the application of the first trigger pulse.
INPUT PULSE TRAIN
RETRIGGERABLE MODE
PULSE WIDTH (+TR MODE)
TX
NON-RETRIGGERABLE MODE
PULSE WIDTH (-TR MODE)
TX
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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
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488
CD4098BMS
Logic Diagram
VDD
*
+TR
D
C
Q
4 (12)
*
5 (11)
R1 R2
-TR
VDD
*
3 (13)
RESET
*
2 (14)
RXCX
1 (15)
VSS
VDD
8
VSS
16
Q
6 (10)
7 (9)
Q
VDD
NOTE:
SCHEMATIC SHOWN IS 1
PACKAGE. TWO SETS OF TERMINAL
NUMBERS ARE SHOWN. TERMINALS
1, 8, AND 15 ARE ELECTRICALLY
CONNECTED INTERNALLY.
/
2 OF TOTAL
*ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
VSS
FIGURE 1. LOGIC DIAGRAM
Typical Performance Characteristics
AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
15.0
12.5
10.0
7.5
30
25
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
20
15
10V
10V
10
5
5.0
2.5
5V
5V
0
5
10
15
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
7-489
CD4098BMS
Typical Performance Characteristics (Continued)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15 -10 -5
AMBIENT TEMPERATURE (TA) = +25oC
-15
-10
-5
0
0
0
0
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-5
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-10
-15
-20
-25
-30
-5
-10V
-10V
-10
-15
-15V
-15V
FIGURE 4. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
FIGURE 5. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC
300
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 15V
200
200
SUPPLY VOLTAGE (VDD) = 5V
150
10V
100
100
15V
10V
5V
50
0
0
20
40
60
80
100 120
140
0
20
40
60
80
100
LOAD CAPACITANCE (CL) (pF)
LOAD CAPACITANCE (CL) (pF)
FIGURE 6. TYPICAL PROPAGATION DELAY TIME vs LOAD CA-
PACITANCE, TRIGGER INTO Q OUT (ALL VALUES
OF CX AND RX).
FIGURE 7. TRANSITION TIME vs LOAD CAPACITANCE FOR
RX = 5kΩ-10000kΩ AND CX = 15pF-10000pF
AMBIENT TEMPERATURE (TA) = +25oC
107
AMBIENT TEMPERATURE (TA) = +25oC
107
8
RX = 10KΩ
6
VDD = 3V
4
= 5V
= 10V, 15V, 18V
CX = 15pF
106
2
106
8
CX = 100pF
6
105
4
CX = 0.1 µF
2
105
CX = 1000pF
104
8
6
4
CX = 0.01µF
RX = 100KΩ
103
2
RX = 5KΩ
104
RX =1MΩ
8
6
4
VDD = 3V
= 5V
102
RX = 10MΩ
= 10V, 15V, 18V
2
VDD = 3V, 5V
VDD = 5V, 10V, 15V, 18V
103
10
10-1
2
4 68
2
4 68
10
2
4 6 8
102
2
4 6 8
103
2
4 68
104
24 68
105
24 68
1
10
102
103
104
105
106
10-1
1
106
PULSE WIDTH (PW) (µs)
PULSE WIDTH (PW) (µs)
FIGURE 8. TYPICAL EXTERNAL RESISTANCE vs PULSE
WIDTH
FIGURE 9. TYPICAL EXTERNAL CAPACITANCE vs PULSE
WIDTH
7-490
CD4098BMS
Typical Performance Characteristics (Continued)
105
8
6
4
AMBIENT TEMPERATURE (TA) = +25oC
CL = 50pF RX = 100KΩ
FREQUENCY = 100KHz
RISE TIME (tr), FALL (tf) = 20ns
2
104
8
6
4
2
SUPPLY VOLTAGE (VDD) = 5V
103
8
6
4
2
102
8
10V
6
4
15V
2
10
8103 2
8104
8105
2
4
6
2
4
6
4
6
2
4
6
10
8102
EXTERNAL CAPACITANCE (CX) (pF)
FIGURE 10. TYPICAL MINIMUM RESET PULSE WIDTH vs EXTERNAL CAPACITANCE
106
AMBIENT TEMPERATURE (TA) = +25oC
RX = 5KΩ TO 1MΩ
CL = 50pF
To calculate average power dissipation(P)
for less than 100% duty cycle:
6
4
2
CX = 100pF
P100 = average power for 100% duty
cycle:
1000pF
105
0.01µF
1µF
0.1µF
6
4
τT
2
tm
P100 where τm = one shot pulse
P =
( )width
104
τT
6
4
τT = trigger pulse period
e.g. For τm = 600µs, tT = 1000µs. CX = 0.01mF
VDD = 5V
2
103
6
4
τm
VDD = 5V
= 10V
103 µW = 600µW (see dotted line on
600
2
P1 =
( )
graph)
1000
102
= 15V
2
4
6 8
2
4
6 8
2
4
6 8
2
4
6 8
2
4 6 8
1
10
ONE-SHOT PULSE WIDTH (τm) (µs)
102
103
104
105
FIGURE 11. AVERAGE POWER DISSIPATION vs ONE-SHOT PULSE WIDTH
Applications
VDD
VDD
RX1
RX2
CX1
CX2
1
2
15
11
14
Q
Q
-TR
4
5
6
+TR
10
OUTPUT
MONO 1
MONO 2
12
VSS
VDD
VDD
3
13
RX1 CX1
T1 ≈
2
INPUT PULSE
OUTPUT PULSE
RX2 CX2
2
T2 ≈
T1
T2
CX ≥ 0.01µF
FIGURE 12. PULSE DELAY
7-491
CD4098BMS
Applications (Continued)
VDD
VDD
IDD
SUPPLY
RX1
CX1
RX2
CX2
IDD, TX vs RX
IDD TX
(AVG.) (T1 + T2) VDD
RX
1
8
2
15
11
14
+TR
Q1
Q1
-TR
R
Q2
Q2
4
5
3
6
10kΩ
1mA
3.8µs
5V
9
MONO 1
VSS
MONO 2
12
VDD
VSS
R
OUTPUT
0.05mA
2.5mA
0.5s
10
13
3.2µs
10V
10V
0.5mA
5mA
0.5s
3µs
RUN
VDD
VSS
VDD
0
10MΩ
VDD
SUPPLY
1mA
0.5s
RESET*
NOTES:
RESET
1. All values are typical.
2. CX range: 0.0001µF to 0.1µF
T2
T1
T2
TO ENSURE RESTART, APPLY RESET
(NEGATIVE PULSE) AFTER VDD
SUPPLY VOLTAGE HAS REACHED
ITS VDD LEVEL
*
Q2
TX
IDD
FIGURE 13. ASTABLE MULTIVIBRATOR WITH RESTART AFTER RESET CAPABILITY
Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10-3 inch).
METALLIZATION: Thickness: 11kÅ − 14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
7-492
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