EL5161IW [RENESAS]

1 CHANNEL, VIDEO AMPLIFIER, PDSO5, SOT-23, 5 PIN;
EL5161IW
型号: EL5161IW
厂家: RENESAS TECHNOLOGY CORP    RENESAS TECHNOLOGY CORP
描述:

1 CHANNEL, VIDEO AMPLIFIER, PDSO5, SOT-23, 5 PIN

放大器 光电二极管 商用集成电路
文件: 总17页 (文件大小:535K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
EL5160, EL5161, EL5260, EL5261, EL5360  
®
Data Sheet  
May 7, 2007  
FN7387.9  
200MHz Low-Power Current Feedback  
Amplifiers  
Features  
• 200MHz -3dB bandwidth  
• 0.75mA supply current  
• 1700V/µs slew rate  
The EL5160, EL5161, EL5260, EL5261, and EL5360 are  
current feedback amplifiers with a bandwidth of 200MHz and  
operate from just 0.75mA supply current. This makes these  
amplifiers ideal for today’s high speed video and monitor  
applications.  
• Single and dual supply operation, from 5V to 10V supply  
span  
With the ability to run from a single supply voltage from  
5V to 10V, these amplifiers are ideal for handheld, portable,  
or battery-powered equipment.  
• Fast enable/disable (EL5160, EL5260 and EL5360 only)  
• Available in SOT-23 packages  
• Pb-Free plus anneal available (RoHS compliant)  
The EL5160 also incorporates an enable and disable  
function to reduce the supply current to 14µA typical per  
amplifier. Allowing the CE pin to float or applying a low logic  
level will enable the amplifier.  
Applications  
• Battery-powered equipment  
• Handheld, portable devices  
• Video amplifiers  
The EL5160 is available in the 6 Ld SOT-23 and 8 Ld SOIC  
packages, the EL5161 in 5 Ld SOT-23 and SC-70 packages,  
the EL5260 in the 10 Ld MSOP package, the EL5261 in  
8 Ld SOIC and MSOP packages, the EL5360 in 16 Ld SOIC  
and QSOP packages. All operate over the industrial  
temperature range of -40°C to +85°C.  
• Cable drivers  
• RGB amplifiers  
Test equipment  
• Instrumentation  
• Current-to-voltage converters  
Pinouts  
EL5160  
EL5160  
EL5161  
(8 LD SOIC)  
(6 LD SOT-23)  
(5 LD SOT-23, SC-70)  
TOP VIEW  
TOP VIEW  
TOP VIEW  
NC  
IN-  
1
2
3
4
8
7
6
5
CE  
OUT  
VS-  
IN+  
1
2
3
6
5
4
VS+  
CE  
OUT  
VS-  
IN+  
1
2
3
5
4
VS+  
IN-  
VS+  
OUT  
NC  
-
+
+
-
+ -  
IN+  
VS-  
IN-  
EL5260  
(10 LD MSOP)  
TOP VIEW  
EL5261  
(8 LD SOIC, MSOP)  
EL5360  
(16 LD SOIC, QSOP)  
TOP VIEW  
TOP VIEW  
OUT  
IN-  
1
2
3
4
5
10 VS+  
OUTA  
INA-  
INA+  
VS-  
1
2
3
4
8
7
6
5
VS+  
INA+  
CEA  
VS-  
1
2
3
4
5
6
7
8
16 INA-  
15 OUTA  
14 VS+  
-
+
9
8
7
6
OUT  
IN-  
OUTB  
INB-  
-
+
-
+
IN+  
VS-  
CE  
-
+
-
+
+
-
IN+  
CE  
INB+  
CEB  
INB+  
NC  
13 OUTB  
12 INB-  
11 NC  
+
-
CEC  
INC+  
10 OUTC  
9
INC-  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2004, 2005, 2007. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
EL5160, EL5161, EL5260, EL5261, EL5360  
Ordering Information  
PKG.  
PART NUMBER  
EL5160IS  
PART MARKING  
5160IS  
TAPE & REEL  
PACKAGE  
8 Ld SOIC (150 mil)  
DWG. #  
-
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0038  
MDP0038  
MDP0038  
MDP0038  
MDP0038  
MDP0038  
MDP0038  
MDP0038  
P5.049  
EL5160IS-T7  
5160IS  
5160IS  
5160ISZ  
5160ISZ  
5160ISZ  
m
7”  
8 Ld SOIC (150 mil)  
EL5160IS-T13  
13”  
8 Ld SOIC (150 mil)  
EL5160ISZ (Note)  
EL5160ISZ-T7 (Note)  
EL5160ISZ-T13 (Note)  
EL5160IW-T7  
-
8 Ld SOIC (150 mil) (Pb-Free)  
8 Ld SOIC (150 mil) (Pb-Free)  
8 Ld SOIC (150 mil) (Pb-Free)  
6 Ld SOT-23  
7”  
13”  
7” (3k pcs)  
EL5160IW-T7A  
EL5160IWZ-T7 (Note)  
EL5160IWZ-T7A (Note)  
EL5161IW-T7  
m
7” (250 pcs)  
6 Ld SOT-23  
BAAN  
7” (3k pcs)  
6 Ld SOT-23 (Pb-Free)  
6 Ld SOT-23 (Pb-Free)  
5 Ld SOT-23  
BAAN  
7” (250 pcs)  
e
7” (3k pcs)  
EL5161IW-T7A  
EL5161IWZ-T7 (Note)  
EL5161IWZ-T7A (Note)  
EL5161IC-T7  
e
7” (250 pcs)  
5 Ld SOT-23  
BAJA  
7” (3k pcs)  
5 Ld SOT-23 (Pb-Free)  
5 Ld SOT-23 (Pb-Free)  
5 Ld SC-70 (1.25mm)  
5 Ld SC-70 (1.25mm)  
10 Ld MSOP (3.0mm)  
10 Ld MSOP (3.0mm)  
10 Ld MSOP (3.0mm)  
10 Ld MSOP (3.0mm) (Pb-free)  
10 Ld MSOP (3.0mm) (Pb-free)  
10 Ld MSOP (3.0mm) (Pb-free)  
8 Ld MSOP (3.0mm)  
BAJA  
7” (250 pcs)  
D
7” (3k pcs)  
EL5161IC-T7A  
D
7” (250 pcs)  
P5.049  
EL5260IY  
BNAAA  
BNAAA  
BNAAA  
BAAAK  
BAAAK  
BAAAK  
BKAAA  
BKAAA  
BKAAA  
5261IS  
5261IS  
5261IS  
5261ISZ  
5261ISZ  
5261ISZ  
EL5360IS  
EL5360IS  
EL5360IS  
EL5360ISZ  
EL5360ISZ  
EL5360ISZ  
5360IU  
5360IU  
-
7”  
13”  
-
MDP0043  
MDP0043  
MDP0043  
MDP0043  
MDP0043  
MDP0043  
MDP0043  
MDP0043  
MDP0043  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0027  
MDP0040  
MDP0040  
EL5260IY-T7  
EL5260IY-T13  
EL5260IYZ (Note)  
EL5260IYZ-T7 (Note)  
EL5260IYZ-T13 (Note)  
EL5261IY  
7”  
13”  
-
EL5261IY-T7  
7”  
13”  
-
8 Ld MSOP (3.0mm)  
EL5261IY-T13  
8 Ld MSOP (3.0mm)  
EL5261IS  
8 Ld SOIC (150 mil)  
EL5261IS-T7  
7”  
13”  
-
8 Ld SOIC (150 mil)  
EL5261IS-T13  
8 Ld SOIC (150 mil)  
EL5261ISZ (Note)  
EL5261ISZ-T7 (Note)  
EL5261ISZ-T13 (Note)  
EL5360IS  
8 Ld SOIC (150 mil) (Pb-free)  
8 Ld SOIC (150 mil) (Pb-free)  
8 Ld SOIC (150 mil) (Pb-free)  
16 Ld SOIC (150 mil)  
7”  
13”  
-
EL5360IS-T7  
7”  
13”  
-
16 Ld SOIC (150 mil)  
EL5360IS-T13  
16 Ld SOIC (150 mil)  
EL5360ISZ (Note)  
EL5360ISZ-T7 (Note)  
EL5360ISZ-T13 (Note)  
EL5360IU  
16 Ld SOIC (150 mil) (Pb-Free)  
16 Ld SOIC (150 mil) (Pb-Free)  
16 Ld SOIC (150 mil) (Pb-Free)  
16 Ld QSOP (150 mil)  
16 Ld QSOP (150 mil)  
7”  
13”  
-
EL5360IU-T7  
7”  
FN7387.9  
May 7, 2007  
2
EL5160, EL5161, EL5260, EL5261, EL5360  
Ordering Information (Continued)  
PKG.  
PART NUMBER  
EL5360IU-T13  
PART MARKING  
5360IU  
TAPE & REEL  
PACKAGE  
16 Ld QSOP (150 mil)  
DWG. #  
13”  
-
MDP0040  
MDP0040  
MDP0040  
MDP0040  
EL5360IUZ (Note)  
5360IUZ  
5360IUZ  
5360IUZ  
16 Ld QSOP (150 mil) (Pb-Free)  
16 Ld QSOP (150 mil) (Pb-Free)  
16 Ld QSOP (150 mil) (Pb-Free)  
EL5360IUZ-T7 (Note)  
EL5360IUZ-T13 (Note)  
7”  
13”  
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate  
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL  
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.  
FN7387.9  
May 7, 2007  
3
EL5160, EL5161, EL5260, EL5261, EL5360  
3
Absolute Maximum Ratings (T = +25°C)  
Thermal Information  
A
Supply Voltage between V + and V -. . . . . . . . . . . . . . . . . . . 13.2V  
Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 50mA  
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C  
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C  
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C  
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below  
http://www.intersil.com/pbfree/Pb-FreeReflow.asp  
S
S
Slew Rate of V + to V - . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1V/µs  
S
S
Pin Voltages. . . . . . . . . . . . . . . . . . . . . . . . V - - 0.5V to V + + 0.5V  
S
S
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests  
are at the specified temperature and are pulsed tests, therefore: T = T = T  
A
J
C
Electrical Specifications V + = +5V, V - = -5V, R = 750Ω for A = 1, R = 150Ω, V  
= V +, V  
= (V +) -3V, T = +25°C,  
S
S
F
V
L
CE, H  
S
CE, L  
S
A
Unless Otherwise Specified.  
PARAMETER  
DESCRIPTION  
CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
AC PERFORMANCE  
BW  
-3dB Bandwidth  
A
= +1, R = 500Ω  
200  
125  
10  
MHz  
MHz  
MHz  
V/µs  
V
L
A
= +2, R = 150Ω  
V
L
BW1  
SR  
0.1dB Bandwidth  
Slew Rate  
R
= 100Ω  
L
V
R
= -2.5V to +2.5V, A = +2, R = R = 1kΩ,  
= 100Ω  
900  
800  
1700  
2500  
2500  
O
V
F
G
L
EL5260, EL5261  
1300  
1360  
35  
V/µs  
V/µs  
ns  
SR  
500Ω Load  
t
0.1% Settling Time  
Input Voltage Noise  
IN- Input Current Noise  
IN+ Input Current Noise  
V
= -2.5V to +2.5V, A = +2  
OUT V  
S
e
4
nV/Hz  
pA/Hz  
pA/Hz  
dBc  
N
i -  
7
N
i +  
N
8
HD2  
HD3  
dG  
5MHz, 2.5V , R = 150Ω, A = +2  
P-P  
-74  
-50  
0.1  
0.1  
L
V
5MHz, 2.5V , R = 150Ω, A = +2  
dBc  
P-P  
L
V
Differential Gain Error (Note 1)  
Differential Phase Error (Note 1)  
A
= +2  
= +2  
%
V
dP  
A
°
V
DC PERFORMANCE  
V
Offset Voltage  
-5  
1.6  
6
+5  
mV  
OS  
T V  
Input Offset Voltage Temperature  
Coefficient  
Measured from T  
to T  
MAX  
µV/°C  
C
OS  
MIN  
R
Transimpedance  
±2.5V  
into 150Ω  
OUT  
800  
2000  
kΩ  
OL  
INPUT CHARACTERISTICS  
CMIR  
Common Mode Input Range  
Guaranteed by CMRR test  
= ±3V  
±3  
50  
-1  
±3.3  
62  
V
dB  
CMRR  
-ICMR  
Common Mode Rejection Ratio  
- Input Current Common Mode Rejection  
+ Input Current  
V
75  
+1  
+4  
+5  
15  
IN  
µA/V  
µA  
+I  
-4  
IN  
-I  
- Input Current  
-5  
µA  
IN  
R
Input Resistance  
1.5  
4
1
MΩ  
pF  
IN  
IN  
C
Input Capacitance  
FN7387.9  
May 7, 2007  
4
EL5160, EL5161, EL5260, EL5261, EL5360  
Electrical Specifications V + = +5V, V - = -5V, R = 750Ω for A = 1, R = 150Ω, V  
= V +, V  
= (V +) -3V, T = +25°C,  
S
S
F
V
L
CE, H  
S
CE, L  
S
A
Unless Otherwise Specified. (Continued)  
DESCRIPTION  
OUTPUT CHARACTERISTICS  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
Output Voltage Swing  
R = 150Ω to GND  
±3.1  
±3.8  
40  
±3.4  
±4.0  
70  
±3.8  
±4.2  
140  
V
V
O
L
R = 1kΩ to GND  
L
I
Output Current  
R = 10Ω to GND  
mA  
OUT  
L
SUPPLY  
I
Supply Current - Enabled, per Amplifier No load, V = 0V (EL5160, EL5161,  
IN  
0.6  
0.75  
0.85  
mA  
SON  
EL5260, EL5261)  
No load, V = 0V (EL5360)  
IN  
0.6  
0
0.8  
10  
0.92  
25  
0
mA  
µA  
I
I
+
-
Supply Current - Disabled, per Amplifier  
SOFF  
Supply Current - Disabled, per Amplifier No load, V = 0V  
-25  
65  
-14  
74  
µA  
SOFF  
IN  
PSRR  
-IPSR  
Power Supply Rejection Ratio  
- Input Current Power Supply Rejection DC, V = ±4.75V to ±5.25V  
DC, V = ±4.75V to ±5.25V  
dB  
S
-0.5  
0.1  
0.5  
µA/V  
S
ENABLE (EL5160, EL5260, EL5360 ONLY)  
t
t
I
I
Enable Time  
600  
800  
5
ns  
ns  
EN  
Disable Time  
DIS  
CE Pin Input High Current  
CE Pin Input Low Current  
CE = V +  
1
25  
1
µA  
µA  
CE, H  
CE, L  
S
CE = (V +) - 5V  
-1  
0
S
NOTE:  
1. Standard NTSC test, AC signal amplitude = 286mV , f = 3.58MHz  
P-P  
Typical Performance Curves  
3
1
4
2
-1  
-3  
0
-2  
-4  
-6  
V
V
=+5V  
CC  
=-5V  
V
V
=+5V  
CC  
=-5V  
EE  
R =150Ω  
EE  
L
-5  
-7  
A =1  
A =2  
V
V
R =500Ω  
R =806Ω  
L
F
F
G
R =2800Ω  
R
=806Ω  
100K  
1M  
10M  
100M  
1G  
100K  
1M  
10M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 1. FREQUENCY RESPONSE  
FIGURE 2. FREQUENCY RESPONSE  
FN7387.9  
May 7, 2007  
5
EL5160, EL5161, EL5260, EL5261, EL5360  
Typical Performance Curves (Continued)  
5
3
4
2
R =500Ω  
A = 2  
V
L
R =R =762Ω  
F G  
L
R =2.7k6Ω  
R =150Ω  
F
A =1  
V
±5V  
±5V  
±6V  
1
0
±6V  
±4V  
±3V  
±4V  
±3V  
-1  
-3  
-5  
-2  
-4  
±2.5V  
±2.5V  
-6  
100K  
100K  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
FIGURE 3. FREQUENCY RESPONSE FOR VARIOUS  
, V  
FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS  
V
V
, V  
CC EE  
CC EE  
4
2
100M  
10M  
1M  
V
V
=+5V  
CC  
=-5V  
EE  
A =10  
V
R =500Ω  
L
F
R =560Ω  
0
100K  
10K  
1K  
-2  
-4  
-6  
100  
1K  
100K  
1M  
10M  
100M  
1G  
10K  
100K  
1M  
10M  
100M  
1G  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 5. FREQUENCY RESPONSE  
FIGURE 6. R  
OL  
INPUT  
1V/DIV  
OUTPUT  
500mV/DIV  
INPUT  
1V/DIV  
OUTPUT  
500mV/DIV  
V
V
=+5V  
V
=+5V  
CC  
CC  
=-5V  
V
=-5V  
EE  
EE  
A =2  
A =2  
V
R =150Ω  
V
R =150Ω  
L
F
L
R =R =422Ω  
R =R =422Ω  
F G  
G
4ns/DIV  
4ns/DIV  
FIGURE 7. RISE TIME  
FIGURE 8. FALL TIME  
FN7387.9  
May 7, 2007  
6
EL5160, EL5161, EL5260, EL5261, EL5360  
Typical Performance Curves (Continued)  
V
V
=+5V  
=-5V  
CC  
EE  
CE  
5V/DIV  
5V/DIV  
CE  
200mV/DIV  
V
V
OUT  
200mV/DIV  
OUT  
V
V
=+5V  
CC  
=-5V  
EE  
400ns/DIV  
400ns/DIV  
FIGURE 9. DISABLE DELAY TIME  
FIGURE 10. ENABLE DELAY TIME  
0
-20  
1K  
100  
10  
V
V
=+5V  
V
=+5V  
CC  
=-5V  
CC  
V =-5V  
EE  
EE  
V
CC  
-40  
-60  
1
V
EE  
-80  
100m  
10m  
-100  
1K  
10K  
100K  
1M  
10M  
100M  
1G  
10K  
100K  
1M  
10M  
100M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 11. PSSR  
FIGURE 12. CLOSED LOOP OUTPUT IMPEDANCE  
4
2
4
V =±5V  
V =±5V  
S
S
R =1.5kΩ  
A =-1  
F
G
V
R
=750Ω  
R =768Ω  
G
R =768Ω  
2
0
F
R =150Ω  
R =150Ω  
L
L
0
A =-2  
V
R =1kΩ  
F
-2  
-4  
-6  
-2  
-4  
-6  
A =-5  
A =+2  
V
V
R =1.2kΩ  
F
R =1.5kΩ  
F
100K  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
100K  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
FIGURE 13. FREQUENCY RESPONSE FOR VARIOUS GAIN  
SETTINGS  
FIGURE 14. FREQUENCY RESPONSE FOR VARIOUS  
FEEDBACK RESISTORS, A =-1  
V
FN7387.9  
May 7, 2007  
7
EL5160, EL5161, EL5260, EL5261, EL5360  
Typical Performance Curves (Continued)  
4
2
5
3
V =±5V  
V =±5V  
S
S
R =R =768Ω  
A =+1  
F
L
G
V
A =-5  
V
R =2.8kΩ  
R =500Ω  
R =150Ω  
F
L
R =1kΩ  
F
A =-1  
V
0
1
A =+5  
V
R =750Ω  
-2  
-4  
-6  
-1  
-3  
-5  
F
A =+10  
V
100K  
1M  
10M  
FREQUENCY (Hz)  
100M  
1G  
100K  
1M  
10M  
100M  
1G  
FREQUENCY (Hz)  
FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS GAIN  
SETTINGS  
FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS  
FEEDBACK RESISTORS, A =+1  
V
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
1.4  
1.4  
1.2  
1
1.250W  
1.2  
SO16 (0.150”)  
θ
=80°C/W  
1
0.8  
0.6  
0.4  
0.2  
0
JA  
909mW  
435mW  
893mW  
SO8  
=110°C/W  
0.8 870mW  
0.6  
QSOP16  
θ
θ
=112°C/W  
JA  
JA  
MSOP8/10  
θ
=115°C/W  
0.4  
0.2  
0
JA  
SOT23-5/6  
θ
=110°C/W  
JA  
0
25  
50  
75 85 100  
125  
150  
0
25  
50  
75 85 100  
125  
150  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 17. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
FIGURE 18. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
JEDEC JESD51-3 LOW EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
JEDEC JESD51-3 LOW EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
1.2  
1
0.9  
SO16 (0.150”)  
1
909mW  
θ
=110°C/W  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
JA  
0.8  
633mW  
SO8  
=160°C/W  
625mW  
391mW  
QSOP16  
θ
0.6  
JA  
θ
=158°C/W  
486mW  
JA  
0.4  
0.2  
0
MSOP8/10  
θ
=206°C/W  
SOT23-5/6  
=256°C/W  
JA  
θ
JA  
0
25  
50  
75 85 100  
125  
150  
0
25  
50  
75 85 100  
125  
150  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 19. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
FN7387.9  
May 7, 2007  
8
EL5160, EL5161, EL5260, EL5261, EL5360  
Pin Descriptions  
EL5160  
EL5160  
EL5161  
(8 Ld SOIC) (6 Ld SOT-23)  
(5 Ld SOT-23)  
PIN NAME  
NC  
FUNCTION  
Not connected  
EQUIVALENT CIRCUIT  
1, 5  
V +  
S
2
4
4
IN-  
Inverting input  
IN+  
IN-  
V -  
S
Circuit 1  
3
4
6
3
2
1
3
2
1
IN+  
VS-  
Non-inverting input  
Negative supply  
Output  
(See circuit 1)  
V +  
S
OUT  
OUT  
V -  
S
Circuit 2  
7
8
6
5
5
VS+  
CE  
Positive supply  
Chip enable  
V +  
S
CE  
V -  
S
Circuit 3  
Power Supply Bypassing and Printed Circuit  
Board Layout  
Applications Information  
Product Description  
As with any high frequency device, good printed circuit  
board layout is necessary for optimum performance. Low  
impedance ground plane construction is essential. Surface  
mount components are recommended, but if leaded  
components are used, lead lengths should be as short as  
possible. The power supply pins must be well bypassed to  
reduce the risk of oscillation. The combination of a 4.7µF  
tantalum capacitor in parallel with a 0.01µF capacitor has  
been shown to work well when placed at each supply pin.  
The EL5160, EL5161, EL5260, EL5261, and EL5360 are low  
power, current-feedback operational amplifiers that offer a  
wide -3dB bandwidth of 200MHz and a low supply current of  
0.75mA per amplifier. The EL5160, EL5161, EL5260,  
EL5261, and EL5360 work with supply voltages ranging from  
a single 5V to 10V and they are also capable of swinging to  
within 1V of either supply on the output. Because of their  
current-feedback topology, the EL5160, EL5161, EL5260,  
EL5261, and EL5360 do not have the normal gain-  
bandwidth product associated with voltage-feedback  
operational amplifiers. Instead, their -3dB bandwidth to  
remain relatively constant as closed-loop gain is increased.  
This combination of high bandwidth and low power, together  
with aggressive pricing make the EL5160, EL5161, EL5260,  
EL5261, and EL5360 ideal choices for many low-  
For good AC performance, parasitic capacitance should be  
kept to a minimum, especially at the inverting input. (See the  
Capacitance at the Inverting Input section) Even when  
ground plane construction is used, it should be removed  
from the area near the inverting input to minimize any stray  
capacitance at that node. Carbon or Metal-Film resistors are  
acceptable with the Metal-Film resistors giving slightly less  
peaking and bandwidth because of additional series  
inductance. Use of sockets, particularly for the SO package,  
should be avoided if possible. Sockets add parasitic  
inductance and capacitance which will result in additional  
peaking and overshoot.  
power/high-bandwidth applications such as portable,  
handheld, or battery-powered equipment.  
FN7387.9  
May 7, 2007  
9
EL5160, EL5161, EL5260, EL5261, EL5360  
to reduce the value of R below the specified TBDΩ and still  
Disable/Power-Down  
F
retain stability, resulting in only a slight loss of bandwidth  
with increased closed-loop gain.  
The EL5160 amplifier can be disabled placing its output in a  
high impedance state. When disabled, the amplifier supply  
current is reduced to < 15µA. The EL5160 is disabled when  
its CE pin is pulled up to within 1V of the positive supply.  
Similarly, the amplifier is enabled by floating or pulling its CE  
pin to at least 3V below the positive supply. For ±5V supply,  
this means that an EL5160 amplifier will be enabled when  
CE is 2V or less, and disabled when CE is above 4V.  
Although the logic levels are not standard TTL, this choice of  
logic voltages allows the EL5160 to be enabled by tying CE  
to ground, even in 5V single supply applications. The CE pin  
can be driven from CMOS outputs.  
Supply Voltage Range and Single-Supply  
Operation  
The EL5160, EL5161, EL5260, EL5261, and EL5360 have  
been designed to operate with supply voltages having a  
span of greater than 5V and less than 10V. In practical  
terms, this means that they will operate on dual supplies  
ranging from ±2.5V to ±5V. With single-supply, the EL5160,  
EL5161, EL5260, EL5261, and EL5360 will operate from 5V  
to 10V.  
As supply voltages continue to decrease, it becomes  
necessary to provide input and output voltage ranges that  
can get as close as possible to the supply voltages. The  
EL5160, EL5161, EL5260, EL5261, and EL5360 have an  
input range which extends to within 2V of either supply. So,  
for example, on +5V supplies, the EL5160, EL5161, EL5260,  
EL5261, and EL5360 have an input range which spans ±3V.  
The output range of the EL5160, EL5161, EL5260, EL5261,  
and EL5360 is also quite large, extending to within 1V of the  
supply rail. On a ±5V supply, the output is therefore capable  
of swinging from -4V to +4V. Single-supply output range is  
larger because of the increased negative swing due to the  
external pull-down resistor to ground.  
Capacitance at the Inverting Input  
Any manufacturer’s high-speed voltage- or current-feedback  
amplifier can be affected by stray capacitance at the  
inverting input. For inverting gains, this parasitic capacitance  
has little effect because the inverting input is a virtual  
ground, but for non-inverting gains, this capacitance (in  
conjunction with the feedback and gain resistors) creates a  
pole in the feedback path of the amplifier. This pole, if low  
enough in frequency, has the same destabilizing effect as a  
zero in the forward open-loop response. The use of large-  
value feedback and gain resistors exacerbates the problem  
by further lowering the pole frequency (increasing the  
possibility of oscillation.)  
Video Performance  
The EL5160, EL5161, EL5260, EL5261, and EL5360 have  
been optimized with a TBDΩ feedback resistor. With the high  
bandwidth of these amplifiers, these resistor values might  
cause stability problems when combined with parasitic  
capacitance, thus ground plane is not recommended around  
the inverting input pin of the amplifier.  
For good video performance, an amplifier is required to  
maintain the same output impedance and the same  
frequency response as DC levels are changed at the output.  
This is especially difficult when driving a standard video load  
of 150Ω, because of the change in output current with DC  
level. Previously, good differential gain could only be  
achieved by running high idle currents through the output  
transistors (to reduce variations in output impedance.)  
These currents were typically comparable to the entire 1mA  
supply current of each EL5160, EL5161, EL5260, EL5261,  
and EL5360 amplifier. Special circuitry has been  
Feedback Resistor Values  
The EL5160, EL5161, EL5260, EL5261, and EL5360 have  
been designed and specified at a gain of +2 with R  
F
approximately 806Ω. This value of feedback resistor gives  
200MHz of -3dB bandwidth at A = 2 with TBDdB of  
V
incorporated in the EL5160, EL5161, EL5260, EL5261, and  
EL5360 to reduce the variation of output impedance with  
current output. This results in dG and dP specifications of  
0.1% and 0.1°, while driving 150Ω at a gain of 2.  
peaking. With A = -2, an R of approximately TBDΩ gives  
V
F
200MHz of bandwidth with 1dB of peaking. Since the  
EL5160, EL5161, EL5260, EL5261, and EL5360 are current-  
feedback amplifiers, it is also possible to change the value of  
R to get more bandwidth. As seen in the curve of  
F
Video performance has also been measured with a 500Ω  
load at a gain of +1. Under these conditions, the EL5160 has  
dG and dP specifications of 0.1% and 0.1°.  
Frequency Response for Various R and R , bandwidth and  
F
G
peaking can be easily modified by varying the value of the  
feedback resistor.  
Output Drive Capability  
Because the EL5160, EL5161, EL5260, EL5261, and  
EL5360 are current-feedback amplifiers, their gain-  
In spite of their low 1mA of supply current, the EL5160,  
EL5161, EL5260, EL5261, and EL5360 are capable of  
providing a minimum of ±50mA of output current. With a  
minimum of ±50mA of output drive, the EL5160 is capable of  
driving 50Ω loads to both rails, making it an excellent choice  
for driving isolation transformers in telecommunications  
applications.  
bandwidth product is not a constant for different closed-loop  
gains. This feature actually allows the EL5160, EL5161,  
EL5260, EL5261, and EL5360 to maintain about the same -  
3dB bandwidth. As gain is increased, bandwidth decreases  
slightly while stability increases. Since the loop stability is  
improving with higher closed-loop gains, it becomes possible  
FN7387.9  
May 7, 2007  
10  
EL5160, EL5161, EL5260, EL5261, EL5360  
where:  
• V = Supply voltage  
Driving Cables and Capacitive Loads  
When used as a cable driver, double termination is always  
recommended for reflection-free performance. For those  
applications, the back-termination series resistor will  
decouple the EL5160, EL5161, EL5260, EL5261, and  
EL5360 from the cable and allow extensive capacitive drive.  
However, other applications may have high capacitive loads  
without a back-termination resistor. In these applications, a  
small series resistor (usually between 5Ω and 50Ω) can be  
placed in series with the output to eliminate most peaking.  
S
• I  
= Maximum supply current of 0.75mA  
SMAX  
• V  
= Maximum output voltage (required)  
OUTMAX  
• R = Load resistance  
L
Typical Application Circuits  
0.1µF  
+5V  
The gain resistor (R ) can then be chosen to make up for  
G
IN+  
V +  
S
any gain loss which may be created by this additional  
resistor at the output. In many cases it is also possible to  
simply increase the value of the feedback resistor (R ) to  
OUT  
IN-  
V -  
S
F
0.1µF  
0.1µF  
reduce the peaking.  
-5V  
500Ω  
5Ω  
5Ω  
Current Limiting  
The EL5160, EL5161, EL5260, EL5261, and EL5360 have  
no internal current-limiting circuitry. If the output is shorted, it  
is possible to exceed the Absolute Maximum Rating for  
output current or power dissipation, potentially resulting in  
the destruction of the device.  
V
OUT  
+5V  
IN+  
IN-  
V +  
S
OUT  
V -  
S
Power Dissipation  
0.1µF  
-5V  
With the high output drive capability of the EL5160, EL5161,  
EL5260, EL5261, and EL5360, it is possible to exceed the  
+125°C Absolute Maximum junction temperature under  
certain very high load current conditions. Generally speaking  
500Ω  
500Ω  
V
IN  
FIGURE 21. INVERTING 200mA OUTPUT CURRENT  
DISTRIBUTION AMPLIFIER  
when R falls below about 25Ω, it is important to calculate  
L
the maximum junction temperature (TJ  
) for the  
MAX  
application to determine if power supply voltages, load  
conditions, or package type need to be modified for the  
EL5160, EL5161, EL5260, EL5261, and EL5360 to remain in  
the safe operating area. These parameters are calculated as  
follows:  
500Ω  
500Ω  
0.1µF  
+5V  
IN+  
V +  
S
T
= T  
+ (θ × n × PD  
)
MAX  
OUT  
JMAX  
MAX  
JA  
IN-  
V -  
S
where:  
• T  
0.1µF  
500Ω  
500Ω  
-5V  
= Maximum ambient temperature  
MAX  
θ = Thermal resistance of the package  
0.1µF  
JA  
+5V  
IN+  
• n = Number of amplifiers in the package  
V +  
S
V
IN  
OUT  
• PD  
= Maximum power dissipation of each amplifier in  
the package  
V
MAX  
OUT  
IN-  
V -  
S
0.1µF  
PD  
for each amplifier can be calculated as follows:  
-5V  
MAX  
V
OUTMAX  
R
L
----------------------------  
PD  
= (2 × V × I  
) + (V V  
) ×  
MAX  
S
SMAX  
S
OUTMAX  
FIGURE 22. FAST-SETTLING PRECISION AMPLIFIER  
FN7387.9  
May 7, 2007  
11  
EL5160, EL5161, EL5260, EL5261, EL5360  
0.1µF  
0.1µF  
+5V  
IN+  
+5V  
IN+  
V +  
V +  
S
S
OUT  
OUT  
IN-  
IN-  
V -  
V -  
S
S
0.1µF  
0.1µF  
-5V  
-5V  
0.1µF  
500Ω  
250Ω  
250Ω  
500Ω  
500Ω  
V
V
+
OUT  
1kΩ  
1kΩ  
0.1µF  
+5V  
IN+  
240Ω  
0.1µF  
0.1µF  
+5V  
IN+  
V +  
S
OUT  
V +  
S
-
OUT  
IN-  
OUT  
V
OUT  
V -  
S
IN-  
0.1µF  
V -  
S
-5V  
0.1µF  
-5V  
500Ω  
500Ω  
V
IN  
500Ω  
500Ω  
TRANSMITTER  
RECEIVER  
FIGURE 23. DIFFERENTIAL LINE DRIVER/RECEIVER  
FN7387.9  
May 7, 2007  
12  
EL5160, EL5161, EL5260, EL5261, EL5360  
Small Outline Package Family (SO)  
A
D
h X 45°  
(N/2)+1  
N
A
PIN #1  
I.D. MARK  
E1  
E
c
SEE DETAIL “X”  
1
(N/2)  
B
L1  
0.010 M  
C A B  
e
H
C
A2  
A1  
GAUGE  
PLANE  
SEATING  
PLANE  
0.010  
L
4° ±4°  
0.004 C  
b
0.010 M  
C
A
B
DETAIL X  
MDP0027  
SMALL OUTLINE PACKAGE FAMILY (SO)  
INCHES  
SO16  
(0.150”)  
SO16 (0.300”)  
(SOL-16)  
SO20  
SO24  
(SOL-24)  
SO28  
(SOL-28)  
SYMBOL  
SO-8  
0.068  
0.006  
0.057  
0.017  
0.009  
0.193  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
8
SO-14  
0.068  
0.006  
0.057  
0.017  
0.009  
0.341  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
14  
(SOL-20)  
0.104  
0.007  
0.092  
0.017  
0.011  
0.504  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
20  
TOLERANCE  
MAX  
NOTES  
A
A1  
A2  
b
0.068  
0.006  
0.057  
0.017  
0.009  
0.390  
0.236  
0.154  
0.050  
0.025  
0.041  
0.013  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.406  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
16  
0.104  
0.007  
0.092  
0.017  
0.011  
0.606  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
24  
0.104  
0.007  
0.092  
0.017  
0.011  
0.704  
0.406  
0.295  
0.050  
0.030  
0.056  
0.020  
28  
-
±0.003  
±0.002  
±0.003  
±0.001  
±0.004  
±0.008  
±0.004  
Basic  
-
-
-
c
-
D
1, 3  
E
-
E1  
e
2, 3  
-
L
±0.009  
Basic  
-
L1  
h
-
Reference  
Reference  
-
N
-
Rev. M 2/07  
NOTES:  
1. Plastic or metal protrusions of 0.006” maximum per side are not included.  
2. Plastic interlead protrusions of 0.010” maximum per side are not included.  
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994  
FN7387.9  
May 7, 2007  
13  
EL5160, EL5161, EL5260, EL5261, EL5360  
SOT-23 Package Family  
MDP0038  
e1  
D
SOT-23 PACKAGE FAMILY  
A
MILLIMETERS  
6
4
N
SYMBOL  
SOT23-5  
1.45  
0.10  
1.14  
0.40  
0.14  
2.90  
2.80  
1.60  
0.95  
1.90  
0.45  
0.60  
5
SOT23-6  
1.45  
0.10  
1.14  
0.40  
0.14  
2.90  
2.80  
1.60  
0.95  
1.90  
0.45  
0.60  
6
TOLERANCE  
MAX  
A
A1  
A2  
b
±0.05  
E1  
E
±0.15  
2
3
±0.05  
0.15  
2X  
C
D
c
±0.06  
1
2
3
0.20  
2X  
C
D
Basic  
5
e
E
Basic  
E1  
e
Basic  
0.20  
C
A-B  
D
M
B
b
NX  
Basic  
e1  
L
Basic  
±0.10  
L1  
N
Reference  
Reference  
Rev. F 2/07  
0.15  
2X  
C
A-B  
1
3
D
NOTES:  
C
1. Plastic or metal protrusions of 0.25mm maximum per side are not  
included.  
A2  
SEATING  
PLANE  
2. Plastic interlead protrusions of 0.25mm maximum per side are not  
included.  
A1  
0.10  
NX  
C
3. This dimension is measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994.  
5. Index area - Pin #1 I.D. will be located within the indicated zone  
(SOT23-6 only).  
6. SOT23-5 version has no center lead (shown as a dashed line).  
(L1)  
H
A
GAUGE  
PLANE  
0.25  
c
+3°  
-0°  
L
0°  
FN7387.9  
May 7, 2007  
14  
EL5160, EL5161, EL5260, EL5261, EL5360  
Mini SO Package Family (MSOP)  
MDP0043  
0.25 M C A B  
A
MINI SO PACKAGE FAMILY  
D
(N/2)+1  
MILLIMETERS  
N
SYMBOL  
MSOP8  
1.10  
0.10  
0.86  
0.33  
0.18  
3.00  
4.90  
3.00  
0.65  
0.55  
0.95  
8
MSOP10  
1.10  
0.10  
0.86  
0.23  
0.18  
3.00  
4.90  
3.00  
0.50  
0.55  
0.95  
10  
TOLERANCE  
Max.  
NOTES  
A
A1  
A2  
b
-
±0.05  
-
E
E1  
PIN #1  
I.D.  
±0.09  
-
+0.07/-0.08  
±0.05  
-
c
-
D
±0.10  
1, 3  
1
B
(N/2)  
E
±0.15  
-
E1  
e
±0.10  
2, 3  
Basic  
-
e
H
C
L
±0.15  
-
SEATING  
PLANE  
L1  
N
Basic  
-
Reference  
-
M
C A B  
b
0.08  
0.10 C  
Rev. D 2/07  
N LEADS  
NOTES:  
1. Plastic or metal protrusions of 0.15mm maximum per side are not  
included.  
L1  
2. Plastic interlead protrusions of 0.25mm maximum per side are  
not included.  
A
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994.  
c
SEE DETAIL "X"  
A2  
GAUGE  
PLANE  
0.25  
L
DETAIL X  
A1  
3° ±3°  
FN7387.9  
May 7, 2007  
15  
EL5160, EL5161, EL5260, EL5261, EL5360  
Small Outline Transistor Plastic Packages (SC70-5)  
D
P5.049  
VIEW C  
5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE  
e1  
INCHES  
MIN  
MILLIMETERS  
SYMBOL  
MAX  
0.043  
0.004  
0.039  
0.012  
0.010  
0.009  
0.009  
0.085  
0.094  
0.053  
MIN  
0.80  
0.00  
0.80  
0.15  
0.15  
0.08  
0.08  
1.85  
1.80  
1.15  
MAX  
1.10  
0.10  
1.00  
0.30  
0.25  
0.22  
0.20  
2.15  
2.40  
1.35  
NOTES  
5
1
4
A
A1  
A2  
b
0.031  
0.000  
0.031  
0.006  
0.006  
0.003  
0.003  
0.073  
0.071  
0.045  
-
-
-
-
E
C
L
C
E1  
L
2
3
b
b1  
c
e
6
6
3
-
C
L
c1  
D
0.20 (0.008) M  
C
C
C
L
E
E1  
e
3
-
SEATING  
PLANE  
0.0256 Ref  
0.0512 Ref  
0.010 0.018  
0.65 Ref  
1.30 Ref  
0.26 0.46  
A2  
A1  
A
e1  
L
-
-C-  
4
-
L1  
L2  
0.017 Ref.  
0.420 Ref.  
0.15 BSC  
0.10 (0.004)  
C
0.006 BSC  
o
o
o
o
0
8
0
8
-
α
N
b
WITH  
5
5
5
PLATING  
b1  
R
0.004  
0.004  
-
0.10  
0.15  
-
R1  
0.010  
0.25  
c
c1  
Rev. 2 9/03  
NOTES:  
BASE METAL  
1. Dimensioning and tolerances per ASME Y14.5M-1994.  
2. Package conforms to EIAJ SC70 and JEDEC MO-203AA.  
4X θ1  
3. Dimensions D and E1 are exclusive of mold flash, protrusions,  
or gate burrs.  
R1  
4. Footlength L measured at reference to gauge plane.  
5. “N” is the number of terminal positions.  
R
6. These Dimensions apply to the flat section of the lead between  
0.08mm and 0.15mm from the lead tip.  
GAUGE PLANE  
SEATING  
PLANE  
7. Controlling dimension: MILLIMETER. Converted inch dimen-  
sions are for reference only.  
L
C
α
L2  
L1  
4X θ1  
VIEW C  
FN7387.9  
May 7, 2007  
16  
EL5160, EL5161, EL5260, EL5261, EL5360  
Quarter Size Outline Plastic Packages Family (QSOP)  
A
MDP0040  
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY  
D
(N/2)+1  
N
INCHES  
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES  
A
A1  
A2  
b
0.068  
0.006  
0.056  
0.010  
0.008  
0.193  
0.236  
0.154  
0.025  
0.025  
0.041  
16  
0.068  
0.006  
0.056  
0.010  
0.008  
0.341  
0.236  
0.154  
0.025  
0.025  
0.041  
24  
0.068  
0.006  
0.056  
0.010  
0.008  
0.390  
0.236  
0.154  
0.025  
0.025  
0.041  
28  
Max.  
±0.002  
±0.004  
±0.002  
±0.001  
±0.004  
±0.008  
±0.004  
Basic  
-
PIN #1  
I.D. MARK  
E
E1  
-
-
-
1
(N/2)  
c
-
B
D
1, 3  
0.010 C A B  
E
-
e
E1  
e
2, 3  
H
-
C
SEATING  
L
±0.009  
Basic  
-
PLANE  
L1  
N
-
0.007 C A B  
b
0.004 C  
Reference  
-
Rev. F 2/07  
L1  
NOTES:  
1. Plastic or metal protrusions of 0.006” maximum per side are not  
included.  
A
2. Plastic interlead protrusions of 0.010” maximum per side are not  
included.  
c
SEE DETAIL "X"  
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.  
4. Dimensioning and tolerancing per ASME Y14.5M-1994.  
0.010  
A2  
GAUGE  
PLANE  
L
A1  
4°±4°  
DETAIL X  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN7387.9  
May 7, 2007  
17  

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