EL5178IYZ [RENESAS]
700MHz Differential Twisted-Pair Drivers; MSOP8, SOIC8; Temp Range: -40° to 85°C;
| 型号： | EL5178IYZ |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | 700MHz Differential Twisted-Pair Drivers; MSOP8, SOIC8; Temp Range: -40° to 85°C 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总18页 (文件大小：1174K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
EL5178, EL5378
700MHz Differential Twisted-Pair Drivers
FN7491
Rev 7.00
February 4, 2016
The EL5178 and EL5378 are single and triple high bandwidth
amplifiers with an output in differential form. They are
primarily targeted for applications such as driving twisted-pair
lines in component video applications. The inputs can be in
either single-ended or differential form but the outputs are
always in differential form.
Features
• Fully differential inputs, outputs, and feedback
• Differential input range ±2.3V
• 700MHz 3dB bandwidth
• 1000V/µs slew rate
On the EL5178 and EL5378, two feedback inputs provide the
user with the ability to set the gain of each device (stable at
minimum gain of 2).
• Low distortion at 5MHz and 20MHz
• Single 5V or dual ±5V supplies
• 60mA maximum output current
• Low power - 12.5mA per channel
• Pb-free (RoHS compliant)
The output common mode level for each channel is set by the
associated REF pin, which has a -3dB bandwidth of over
110MHz. Generally, these pins are grounded but can be tied to
any voltage reference.
All outputs are short-circuit protected to withstand temporary
overload condition.
Applications
• Twisted-pair driver
The EL5178 is available in 8 Ld MSOP and SOIC packages and
EL5378 is available in a 28 Ld QSOP package. All are specified
for operation over the full -40°C to +85°C temperature range.
• Differential line driver
• VGA over twisted-pair
• ADSL/HDSL driver
• Single-ended to differential amplification
• Transmission of analog signals in a noisy environment
Pin Configurations
EL5178
(8 LD MSOP, SOIC)
TOP VIEW
EL5378
(28 LD QSOP)
TOP VIEW
FBP
IN+
1
2
3
4
8
7
6
5
OUT+
VS-
NC
INP1
INN1
1
2
3
28 OUT1
27 FBP1
26 FBN1
25 OUT1B
24 VSP
+
-
+
-
REF
FBN
VS+
OUT-
REF1 4
NC
INP2
INN2
REF2
NC
5
6
7
8
9
23 VSN
22 OUT2
21 FBP2
20 FBN2
19 OUT2B
18 OUT3
17 FBP3
16 FBN3
15 OUT3B
+
-
INP3 10
INN3 11
REF3 12
NC 13
+
-
EN 14
FN7491 Rev 7.00
February 4, 2016
Page 1 of 18
EL5178, EL5378
Pin Descriptions
EL5178
(NO LONGER
AVAILABLE)
EL5378
17, 21, 27
2, 6, 10
3, 7, 11
16, 20, 26
15, 19, 25
24
PIN NAME
PIN FUNCTION
Feedback from non-inverting outputs
FBP3, FBP2, FBP1
INP1, INP2, INP3
Non-inverting inputs
INN1, INN2, INN3
Inverting inputs, note that on EL5178, this pin is also the REF pin
Feedback from inverting outputs
Inverting outputs
FBN3, FBN2, FBN1
OUT3B, OUT2B, OUT1B
VSP
Positive supply
23
VSN
Negative supply
18, 22, 28
1, 5, 9, 13
4, 8, 12
14
OUT3, OUT2, OUT1
Non-inverting outputs
NC
No connect; grounded for best crosstalk performance
Reference inputs, sets common-mode output voltage
ENABLE
REF1, REF2, REF3
EN
FBP
IN+
1
2
3
4
5
6
7
8
Feedback from non-inverting output
Non-inverting input
REF
FBN
OUT-
VS+
VS-
Inverting input, note that on EL5178, this pin is also the REF pin
Feedback from inverting output
Inverting output
Positive supply
Negative supply
OUT+
Non-inverting output
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
EL5178ISZ (No longer available,
recommended replacement:
EL5174ISZ)
5178ISZ
-40 to +85
-40 to +85
-40 to +85
8 Ld SOIC (150 mil)
8 Ld MSOP (3.0mm)
28 Ld QSOP (150 mil)
M8.15E
EL5178IYZ (No longer available,
recommended replacement:
EL5174ISZ)
BBHAA
M8.118A
M28.15
EL5378IUZ
EL5378IUZ
NOTES:
1. Add “-T13” suffix for 2.5k unit or “-T7” suffix for 1k unit Tape and Reel options. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for EL5178, EL5378. For more information on MSL please see tech brief
TB363.
FN7491 Rev 7.00
February 4, 2016
Page 2 of 18
EL5178, EL5378
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage (V + to V -) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12V
Supply Voltage Rate-of-Rise (dV/dT) . . . . . . . . . . . . . . . . . . . . . . . . . . 1V/µs
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . .+135°C
Ambient Operating Temperature . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
S
S
Input Voltage (IN+, IN- to V +, V -) . . . . . . . . . . . . . V - - 0.3V to V + + 0.3V
S
S
S
S
Differential Input Voltage (IN+ to IN-). . . . . . . . . . . . . . . . . . . . . . . . . . ±4.8V
Maximum Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60mA
Input Current (all inputs and references). . . . . . . . . . . . . . . . . . . . . . . . 4mA
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
Electrical Specifications V + = +5V, V - = -5V, T = +25°C, V = 0V, R = 1kΩ, C = 2.7pF, [R = 604Ω, R = 402Ω (EL5178)],
S
S
A
IN
LD
LD
F
G
[R = 402Ω, R = 274Ω (EL5378)], unless otherwise specified.
F
G
MIN
MAX
PARAMETER
DESCRIPTION
TEST CONDITIONS
(Note 4)
TYP
(Note 4)
UNIT
AC PERFORMANCE
BW
-3dB Bandwidth
A = 2, C = 2.7pF
LD
700
80
MHz
MHz
MHz
MHz
V/µs
V/µs
ns
V
A = 5, C = 2.7pF
LD
V
A = 2, C = 2.7pF, R = 200Ω
LD LD
320
45
V
BW
SR
±0.1dB Bandwidth
A = 2, C = 2.7pF
V
LD
Slew Rate, Differential (EL5178)
Slew Rate, Differential (EL5378)
Settling Time to 0.1%
V
V
V
= 3V , 20% to 80%
650
650
850
1000
35
OUT
OUT
OUT
P-P
= 3V , 20% to 80%
P-P
t
t
= 2V
P-P
STL
Output Overdrive Recovery Time
Gain Bandwidth Product
AV = 2
20
ns
OVR
GBWP
350
110
134
70
MHz
MHz
V/µs
V/µs
nV/Hz
pA/Hz
dBc
V
V
V
V
BW (-3dB)
SR+
V
V
V
-3dB Bandwidth (EL5378)
Slew Rate - Rise (EL5378)
Slew Rate - Fall (EL5378)
C
= 2.7pF
LD
REF
REF
REF
N
REF
REF
REF
V
= 2V , 20% to 80%
P-P
OUT
OUT
SR-
V
= 2V , 20% to 80%
P-P
Input Voltage Noise
At 10kHz
At 10kHz
18
I
Input Current Noise
1.5
-83
-72
-88
-70
0.06
0.13
90
N
HD2
Second Harmonic Distortion
V
V
V
V
= 2V , 5MHz
P-P
OUT
OUT
OUT
OUT
= 2V , 20MHz
P-P
dBc
HD3
Third Harmonic Distortion
= 2V , 5MHz
P-P
dBc
= 2V , 20MHz
P-P
dBc
dG
Differential Gain at 3.58MHz
Differential Phase at 3.58MHz
Channel Separation (EL5378)
R
R
= 300Ω, AV = 2
= 300Ω, AV = 2
%
LD
LD
d
°
e
At F = 1MHz
dB
S
INPUT CHARACTERISTICS
Input Referred Offset Voltage
V
±1.9
-14
2.3
150
1
±30
-7
mV
µA
µA
kΩ
pF
V
OS
I
Input Bias Current (V +, V -)
-20
IN
REF
IN
IN
I
Input Bias Current (V
) (EL5378)
V
= ±3.0V
REF
0.05
4
REF
R
Differential Input Resistance
IN
C
Differential Input Capacitance
Differential Mode Input Range (EL5378)
IN
DMIR
±2.3
FN7491 Rev 7.00
February 4, 2016
Page 3 of 18
EL5178, EL5378
Electrical Specifications V + = +5V, V - = -5V, T = +25°C, V = 0V, R = 1kΩ, C = 2.7pF, [R = 604Ω, R = 402Ω (EL5178)],
S
S
A
IN
LD
LD
F
G
[R = 402Ω, R = 274Ω (EL5378)], unless otherwise specified. (Continued)
F
G
MIN
MAX
PARAMETER
DESCRIPTION
TEST CONDITIONS
(Note 4)
TYP
(Note 4)
UNIT
V
CMIR+
Common-Mode Positive Input Range at
3.1
3.4
-4.4
3.7
V
+, V - (EL5378)
IN IN
CMIR-
Common-Mode Negative Input Range at
-4.1
V
V
V
V
+, V - (EL5378)
IN IN
V
V
V
+
-
Positive Reference Input Voltage Range
(EL5378)
V
V
+ = V - = 0V
IN
3.2
REFIN
REFIN
REFOS
IN
Negative Reference Input Voltage Range
(EL5378)
+ = V - = 0V
IN
-3.3
-3.2
IN
Output Offset Relative to V
(EL5378)
±50
78
±100
mV
dB
REF
Input Common-Mode Rejection Ratio
OUTPUT CHARACTERISTICS
CMRR
V
= ±2.5V
65
IN
V
Output Voltage Swing
Maximum Output Current
Output Impedance
R = 1kΩ
±3.4
±50
±3.7
±60
130
V
OUT
L
I
(Max)
R = 10Ω, V + = ±3.2V
IN
±100
mA
mΩ
OUT
L
R
OUT
SUPPLY
V
Supply Operating Range
V + to V -
4.75
10
11
14
10
V
SUPPLY
S
S
I
I
Power Supply Current - Per Channel
12.5
1.7
mA
µA
S(ON)
+
-
Positive Power Supply Current - Disabled
(EL5378)
EN pin tied to 4.8V
S(OFF)
I
Negative Power Supply Current - Disabled
(EL5378)
-200
60
-120
75
µA
dB
S(OFF)
PSRR
Power Supply Rejection Ratio
V from ±4.5V to ±5.5V
S
ENABLE (EL5378 ONLY)
t
t
Enable Time
130
1.2
ns
µs
V
EN
DS
Disable Time
V
V
EN Pin Voltage for Power-Up
EN Pin Voltage for Shutdown
EN Pin Input Current High
EN Pin Input Current Low
V + - 1.5
S
IH
V + - 0.5
S
V
IL
I
I
At V = 5V
EN
123
-8
200
µA
µA
IH-EN
IL-EN
At V = 0V
EN
-20
NOTE:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
FN7491 Rev 7.00
February 4, 2016
Page 4 of 18
EL5178, EL5378
Typical Performance Curves
20
15
10
5
V
= ±5V
= 1kΩ
S
LD
R
= 2kΩ
F
V
R
C
= ±5V
R
C
R
S
= 1k
= 0pF
= 0pF
LD
LD
= 422Ω
LD
= 2
F
R
= 1kΩ
F
A
V
A
= 2
V
0
R
= 422Ω
F
-5
A
= 5
V
-10
-15
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. EL5178 FREQUENCY RESPONSE FOR VARIOUS R
FIGURE 2. EL5178 FREQUENCY RESPONSE FOR VARIOUS GAIN
F
V
R
C
= ±5V
= 422Ω
S
F
V
R
R
= ±5V
S
C
= 22pF
LD
= 200Ω
LD
= 0pF
= 2
LD
= 422Ω
= 2
F
A
V
A
V
C
LD = 12pF
R
= 1kΩ
LD
C
= 5.6pF
LD
R
= 200Ω
LD
C
= 0pF
LD
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FREQUENCY (Hz)
FIGURE 3. EL5178 FREQUENCY RESPONSE FOR VARIOUS C
FIGURE 4. EL5178 FREQUENCY RESPONSE FOR VARIOUS R
LD
LD
V
= ±5V
= 1kΩ
V
= ±5V
S
LD
S
F
V
= 200mV
OPP
R
C
A
R
R
C
= 422Ω
= 200Ω
R = 422Ω
f
= 0pF
LD
= 2
LD
LD
V
= 1V
OPP
= 5.6pF
= 2
V
R = 210Ω
f
A
V
V
= 2V
OPP
R = 154Ω
f
100k
1M
10M
FREQUENCY (Hz)
100M
1G
100k
1M
10M
FREQUENCY (Hz)
100M
1G
FIGURE 5. EL5178 FREQUENCY RESPONSE FOR VARIOUS V
FIGURE 6. EL5378 FREQUENCY RESPONSE FOR VARIOUS R
OPP
F
FN7491 Rev 7.00
February 4, 2016
Page 5 of 18
EL5178, EL5378
Typical Performance Curves (Continued)
20
V
= ±5V
S
V
R
R
= ±5V
= 422Ω
S
F
C
= 12pF
R
C
R
= 1kΩ
LD
LD
LD
15
10
5
= 0pF
= 200Ω
= 2
LD
= 422Ω
C
= 5.6pF
F
LD
A
V
A
= 2
V
0
C
= 0pF
LD
-5
A
= 5
V
-10
-15
100k
1M
10M
100M
1G
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 7. EL5378 FREQUENCY RESPONSE FOR VARIOUS GAIN
FIGURE 8. EL5378 FREQUENCY RESPONSE FOR VARIOUS C
LD
V
= ±5V
= 0pF
= 422Ω
= 2
S
LD
F
R
= 1kΩ
C
R
A
LD
E
N
V
R
= 200Ω
LD
I
N
100k
1M
10M
FREQUENCY (Hz)
100M
1G
10
100
1k
10k 100k 1M 10M 100M
FREQUENCY (Hz)
FIGURE 9. EL5378 FREQUENCY RESPONSE FOR VARIOUS R
FIGURE 10. VOLTAGE AND CURRENT NOISE vs FREQUENCY
LD
V
= ±5V
V
= ±5V
S
S
PSRR+
PSRR-
10M
10k
100k
1M
100M
100k
1M
10M
100M
1G
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 11. CMRR vs FREQUENCY
FIGURE 12. DIFFERENTIAL PSRR vs FREQUENCY
FN7491 Rev 7.00
February 4, 2016
Page 6 of 18
EL5178, EL5378
Typical Performance Curves (Continued)
100
10
1
0.1
10k
10k
100k
1M
10M
100M
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 14. OUTPUT IMPEDANCE [DISABLED]
FIGURE 13. OUTPUT IMPEDANCE vs FREQUENCY
V
= ±5V
= 422Ω
= +2
V
= ±5V
S
F
S
R
A
R
R
A
= 200Ω
LD
= 422Ω
= 2
V
F
CH1 CH2
V
td
FALL
CH1 CH3
td
RISE
(V)
100k
1M
10M
100M
1G
V
IN(P-P)
FREQUENCY (Hz)
FIGURE 16. INPUT-TO-OUTPUT DELAY
FIGURE 15. CHANNEL SEPARATION vs FREQUENCY
V
R
R
= ±5V
S
V
= ±5V
S
= 1kΩ
LD
R
C
R
= 1kΩ
= 0pF
LD
LD
F = 40MHz
F = 20MHz
= 422Ω
= 2
F
A
V
= 422Ω
F
6V
OPP-DM)
4V
OPP-DM
F = 10MHz
F = 2.2MHz
2V
OPP-DM
F = 5MHz
V
(V)
FREQUENCY (Hz)
OPP-DM
FIGURE 17. TOTAL HARMONIC DISTORTION vs DIFFERENTIAL
OUTPUT SWING
FIGURE 18. TOTAL HARMONIC DISTORTION vs FREQUENCY
FN7491 Rev 7.00
February 4, 2016
Page 7 of 18
EL5178, EL5378
Typical Performance Curves (Continued)
V
V
IN
IN
200mV/DIV
1V/DIV
V
V
OUT
OUT
5ns/DIV
10ns/DIV
FIGURE 19. SMALL SIGNAL TRANSIENT RESPONSE
FIGURE 20. LARGE SIGNAL TRANSIENT RESPONSE
V
OUT
V
OUT
2V/DIV
4V/DIV
2V/DIV
4V/DIV
EN
EN
400ns/DIV
100ns/DIV
FIGURE 22. EL5378 DISABLED RESPONSE
FIGURE 21. EL5378 ENABLED RESPONSE
V
R
= ±5V
= 50Ω
V
R
= ±5V
= 50Ω
S
L
S
L
f1
f2
2f2-f1
2f1-f2
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 23. IP3 vs FREQUENCY
FIGURE 24. THIRD ORDER INTERCEPT POINT
FN7491 Rev 7.00
February 4, 2016
Page 8 of 18
EL5178, EL5378
Typical Performance Curves (Continued)
+V
OUT
+I
S
-V
OUT
-I
S
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 26. ± SUPPLY CURRENT vs TEMPERATURE
FIGURE 25. OUTPUT SWING vs TEMPERATURE
V
= ±5.5V
S
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 28. INPUT BIAS CURRENT vs TEMPERATURE
FIGURE 27. OFFSET VOLTAGE vs TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.4
V
= 3V
P-P
OUT
1.2 1.263W
QSOP28
= +99°C/W
1.0
JA
781mW
607mW
0.8
0.6
0.4
0.2
0
SO8
= +160°C/W
JA
MSOP8
= +206°C/W
JA
0
25
50
75 85 100
125
150
TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 29. SLEW RATE vs TEMPERATURE
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN7491 Rev 7.00
February 4, 2016
Page 9 of 18
EL5178, EL5378
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.583W
QSOP28
1.136W
= +79°C/W
JA
1.087W
SO8
= +110°C/W
JA
MSOP8
= +115°C/W
JA
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FN7491 Rev 7.00
February 4, 2016
Page 10 of 18
Connection Diagrams
R
F1
C
L1
5pF
422Ω
-5V
1
2
3
4
FBP
INP
OUT
VSN
VSP
8
7
6
5
OUT
IN+
R
845Ω
R
LD
1kΩ
G
REF
REF
FBN
R
R
S2
50Ω
S2
50Ω
OUTB
OUTB
C
L2
5pF
+5V
R
F2
422Ω
FIGURE 32. EL5178
+5V
1
2
3
4
5
6
7
8
9
NC
OUT1 28
FBP1 27
FBN1 26
R
422Ω
F
INP1
INN1
REF1
INP1
INN1
R
R
G
845Ω
R
LD1
1kΩ
422Ω
F
REF1 OUT1B 25
NC
VSP 24
VSN 23
INP2
INN2
REF2
INP2
INN2
REF2
NC
OUT2 22
FBP2 21
FBN2 20
R
422Ω
422Ω
F
R
LD2
1kΩ
R
G
845Ω
R
F
INP3
INN3
REF3
10 INP3 OUT2B 19
11 INN3
12 REF3
13 NC
OUT3 18
FBP3 17
R
422Ω
422Ω
F
R
R
R
R
R
R
R
R
R
R
G
845Ω
R
SP1
50Ω
SN1
50Ω
SR1
50Ω
SP2
50Ω
SN2
50Ω
SR2
50Ω
SP3
50Ω
SN3
50Ω
SR3
50Ω
R
LD3
1kΩ
FBN3 16
OUT3B 15
F
14 EN
C
C
C
C
C
C
L1
5pF
L1B
5pF
L2
5pF
L2B
5pF
L3
5pF
L3B
-5V
ENABLE
5pF
FIGURE 33. EL5378
EL5178, EL5378
Simplified Schematic
V +
S
R
R
3
4
R
R
2
1
R
R
7
8
IN+
IN-
FBP
FBN
V
V
B1
OUT+
R
R
CD
CD
REF
10
R
R
9
OUT-
B2
C
C
C
C
R
R
6
5
V -
S
FIGURE 34. SIMPLIFIED SCHEMATIC
the common mode signal and also part of the differential mode
signal. For the true balance differential outputs, the REF pin must be
Description of Operation and
Application Information
tied to the same bias level as the I + pin. For a ±5V supply, just tie
N
the REF pin to GND if the I + pin is biased at 0V with a 50Ω or 75Ω
N
Product Description
termination resistor. For a single supply application, if the I + is
N
biased to half of the rail, the REF pin should also be biased to half of
the rail.
The EL5178 and EL5378 are wide bandwidth, low power and
single/differential ended to differential output amplifiers. The
EL5178 is a single channel differential amplifier. Since the I - pin
and REF pin are tied together internally, the EL5178 can be used
as a single ended to differential converter. The EL5378 is a triple
N
The gain setting for EL5178 is expressed in Equation 1:
R
+ R
F1
F2
---------------------------
V
V
= V + 1 +
ODM
OCM
IN
R
G
channel differential amplifier. The EL5378 has a separate I - pin
N
and REF pin for each channel. It can be used as
= V
= 0V
REF
single/differential ended to differential converter. The EL5178
and EL5378 are internally compensated for closed loop gain of 2
or greater. Connected in gain of 2 and driving a 1kΩ differential
load, the EL5178 and EL5378 have a -3dB bandwidth of
700MHz. Driving a 200Ω differential load at gain of 2, the
bandwidth is about 320MHz. The EL5378 is available with a
power-down feature to reduce the power while the amplifier is
disabled.
2R
F
----------
(EQ. 1)
V
= V + 1 +
ODM
IN
R
G
Where:
V
= 0V
REF
R
= R = R
F2
F1
F
Input, Output and Supply Voltage Range
EL5378 has a separate I - pin and REF pin. It can be used as a
N
The EL5178 and EL5378 have been designed to operate with a
single supply voltage of 5V to 10V or split supplies with its total
voltage from 5V to 10V. The amplifiers have an input common
mode voltage range from -4.3V to 3.4V for ±5V supply. The
differential mode input range (DMIR) between the two inputs is
from -2.3V to +2.3V. The input voltage range at the REF pin is
from -3.3V to 3.7V. If the input common mode or differential
mode signal is outside the above-specified ranges, it will cause
the output signal to become distorted.
single/differential ended to differential converter. The voltage
applied at REF pin can set the output common mode voltage and
the gain is one.
The gain setting for EL5378 is expressed in Equation 2:
R
+ R
F1
F2
---------------------------
V
= V + – V - 1 +
ODM
IN
IN
R
G
2R
F
----------
(EQ. 2)
V
V
= V + – V - 1 +
ODM
OCM
IN
IN
R
G
The output of the EL5178 and EL5378 can swing from -3.8V to
+3.8V at 1kΩ differential load at ±5V supply. As the load
resistance becomes lower, the output swing is reduced.
= V
REF
Where:
= R = R
F
R
Differential and Common-Mode Gain
Settings
F1
F2
For EL5178, since the I - pin and REF pin are bonded together as
N
the REF pin in an 8 Ld package, the signal at the REF pin is part of
FN7491 Rev 7.00
February 4, 2016
Page 12 of 18
EL5178, EL5378
Disable/Power-Down (for EL5378 only)
R
F1
The EL5378 can be disabled and its outputs placed in a high
impedance state. The turn-off time is about 1.2µs and the
turn-on time is about 130ns. When disabled, the amplifier's
supply current is reduced to 1.7µA for I + and 120µA for I -
typically, thereby effectively eliminating the power consumption.
The amplifier's power-down can be controlled by standard CMOS
signal levels at the EN pin. The applied logic signal is relative to
FBP
I +
V
+
V
V
+
-
IN
O
O
N
S
S
R
G
V
-
IN
I -
N
V
REF
FBN
REF
the V + pin. Letting the EN pin float or applying a signal that is
S
less than 1.5V below V + will enable the amplifier. The amplifier
S
R
F2
will be disabled when the signal at the EN pin is above V + - 0.5V.
S
Output Drive Capability
FIGURE 35.
The EL5178 and EL5378 have internal short-circuit protection. Its
typical short-circuit current is ±60mA. If the output is shorted
indefinitely, the power dissipation could easily increase such that
the part will be destroyed. Maximum reliability is maintained if
the output current never exceeds ±60mA. This limit is set by the
design of the internal metal interconnections.
Choice of Feedback Resistor and Gain
Bandwidth Product
The feedback resistor forms a pole with the parasitic capacitance
at the inverting input. As this pole becomes smaller, the
amplifier's phase margin is reduced. This causes ringing in the
time domain and peaking in the frequency domain. Therefore, R
has some maximum value that should not be exceeded for
F
Power Dissipation
optimum performance. If a large value of R must be used, a
F
With the high output drive capability of the EL5178 and EL5378, it
is possible to exceed the +135°C absolute maximum junction
temperature under certain load current conditions. Therefore, it is
important to calculate the maximum junction temperature for the
application to determine if the load conditions or package types
need to be modified for the amplifier to remain in the safe
operating area.
small capacitor in the few Pico farad range in parallel with R
can help to reduce the ringing and peaking at the expense of
reducing the bandwidth.
F
The bandwidth of the EL5178 and EL5378 depends on the load
and the feedback network. R and R appear in parallel with the
F
G
load. As this combination gets smaller, the bandwidth falls off.
Consequently, R also has a minimum value that should not be
exceeded for optimum bandwidth performance. For the gains
F
The maximum power dissipation allowed in a package is
determined according to Equation 4:
other than 1, optimum response is obtained with R between
F
T
– T
AMAX
JMAX
(EQ. 4)
--------------------------------------------
500Ω to 1kΩ.
PD
=
MAX
JA
The EL5178 and EL5378 have a gain bandwidth product of
Where:
350MHz for R = 1kΩ. For gains 5, its bandwidth can be
LD
predicted by Equation 3:
T
= Maximum junction temperature
= Maximum ambient temperature
JMAX
(EQ. 3)
Gain BW = 300MHz
T
AMAX
Driving Capacitive Loads and Cables
= Thermal resistance of the package
JA
The EL5178 and EL5378 can drive a 23pF differential capacitor
in parallel with 200Ω differential load with less than 5dB of
peaking at gain of 2. If less peaking is desired in applications, a
small series resistor (usually between 5Ω to 50Ω) can be placed
in series with each output to eliminate most peaking. However,
this will reduce the gain slightly. If the gain setting is greater than
The maximum power dissipation actually produced by an IC is
the total quiescent supply current times the total power supply
voltage, plus the power in the IC due to the load, or as expressed
in Equation 5:
V
O
(EQ. 5)
-----------
LD
PD = i V
I
+ V
– V
STOT
SMAX
STOT
O
R
2, the gain resistor R can then be chosen to make up for any
G
gain loss, which may be created by the additional series resistor
at the output.
Where:
V
= Total supply voltage = V + - V -
S S
STOT
When used as a cable driver, double termination is always
recommended for reflection-free performance. For those
applications, a back-termination series resistor at the amplifier's
output will isolate the amplifier from the cable and allow
extensive capacitive drive. However, other applications may have
high capacitive loads without a back-termination resistor. Again,
a small series resistor at the output can help to reduce peaking.
I
= Maximum quiescent supply current per channel
SMAX
V = Maximum differential output voltage of the application
O
R
= Differential load resistance
LD
I
= Load current
LOAD
i = Number of channels by setting the two PD
MAX
equations
equal to each other, we can solve the output current and R
to avoid the device overheat.
LD
FN7491 Rev 7.00
February 4, 2016
Page 13 of 18
EL5178, EL5378
For good AC performance, parasitic capacitance should be kept
to a minimum. Use of wire-wound resistors should be avoided
because of their additional series inductance. Use of sockets
should also be avoided if possible. Sockets add parasitic
inductance and capacitance that can result in compromised
performance. Minimizing parasitic capacitance at the amplifier's
inverting input pin is very important. The feedback resistor
should be placed very close to the inverting input pin. Strip line
design techniques are recommended for the signal traces.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, a good printed circuit board
layout is necessary for optimum performance. Lead lengths
should be as short as possible. The power supply pin must be
well bypassed to reduce the risk of oscillation. For normal single
supply operation, where the VS- pin is connected to the ground
plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF
ceramic capacitor from VS+ to GND will suffice. This same
capacitor combination should be placed at each supply pin to
ground if split supplies are to be used. In this case, the VS- pin
becomes the negative supply rail.
As the signal is transmitted through a cable, the high frequency
signal will be attenuated. One way to compensate this loss is to
boost the high frequency gain at the receiver side.
Typical Applications
R
F
FBP
IN+
IN-
50
50
TWISTED PAIR
IN+
R
R
G
T
EL5178/
EL5378
EL5175/
EL5375
V
O
REF
IN-
Z
= 100Ω
O
FBN
REF
R
F
R
FR
R
GR
FIGURE 36. TWISTED PAIR CABLE RECEIVER
R
F
GAIN
(dB)
FBP
I +
V
V
+
-
O
N
R
T
R
R
G
GC
75
I -
N
C
REF
FBN
L
O
FREQUENCY
R
f
f
H
F
L
2R
1
F
------------------------
f
f
----------
DC Gain = 1 +
L
2R
C
C
R
G
G
1
2R
----------------------------
F
H
2R
C
C
--------------------------
HFGain = 1 +
GC
R
R
GC
G
FIGURE 37. TRANSMIT EQUALIZER
FN7491 Rev 7.00
February 4, 2016
Page 14 of 18
EL5178, EL5378
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that
you have the latest revision.
DATE
REVISION
FN7491.7
CHANGE
February 4, 2016
Added "No longer available" across the 5178 pinout on page 1.
Updated “Ordering Information” on page 2 by adding Temp Range column and updating tape and reel note to
show options.
Added "No longer available" under the "EL5178" header of “Pin Descriptions” on page 2.
Changed "gain of 1" to "gain of 2"1st paragraph under “Product Description” on page 12.
Changed "bounded" to "bonded".in 1st sentence under “Differential and Common-Mode Gain Settings” on
page 12.
Deleted from 1st and 2nd paragraph in “Choice of Feedback Resistor and Gain Bandwidth Product” on page 13
"For gains greater than 1," and "for gains other than 1"
August 19, 2015
FN7491.6
Updated Ordering Information table on page 2.
Added Revision History and About Intersil sections.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support
FN7491 Rev 7.00
February 4, 2016
Page 15 of 18
EL5178, EL5378
Package Outline Drawing
M8.15E
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 0, 08/09
4
4.90 ± 0.10
A
DETAIL "A"
0.22 ± 0.03
B
6.0 ± 0.20
3.90 ± 0.10
4
PIN NO.1
ID MARK
5
(0.35) x 45°
4° ± 4°
0.43 ± 0.076
1.27
0.25 M C A B
SIDE VIEW “B”
TOP VIEW
1.75 MAX
1.45 ± 0.1
0.25
GAUGE PLANE
C
SEATING PLANE
0.175 ± 0.075
SIDE VIEW “A
0.10 C
0.63 ±0.23
DETAIL "A"
(0.60)
(1.27)
NOTES:
(1.50)
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
3.
Unless otherwise specified, tolerance : Decimal ± 0.05
(5.40)
4. Dimension does not include interlead flash or protrusions.
Interlead flash or protrusions shall not exceed 0.25mm per side.
The pin #1 identifier may be either a mold or mark feature.
Reference to JEDEC MS-012.
5.
6.
TYPICAL RECOMMENDED LAND PATTERN
FN7491 Rev 7.00
February 4, 2016
Page 16 of 18
EL5178, EL5378
Package Outline Drawing
M8.118A
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE (MSOP)
Rev 0, 9/09
A
3.0±0.1
8
0.25 CAB
4.9±0.15
DETAIL "X"
0.18 ± 0.05
3.0±0.1
1.10 Max
PIN# 1 ID
B
SIDE VIEW 2
1
2
0.65 BSC
TOP VIEW
0.95 BSC
0.86±0.09
GAUGE
PLANE
H
C
0.25
SEATING PLANE
0.10 ± 0.05
0.33 +0.07/ -0.08
0.08 C AB
3°±3°
0.10 C
0.55 ± 0.15
DETAIL "X"
SIDE VIEW 1
5.80
NOTES:
1. Dimensions are in millimeters.
4.40
3.00
2. Dimensioning and tolerancing conform to JEDEC MO-187-AA
and AMSE Y14.5m-1994.
3.
Plastic or metal protrusions of 0.15mm max per side are not
included.
0.65
0.40
4. Plastic interlead protrusions of 0.25mm max per side are not
included.
1.40
TYPICAL RECOMMENDED LAND PATTERN
5. Dimensions “D” and “E1” are measured at Datum Plane “H”.
6. This replaces existing drawing # MDP0043 MSOP 8L.
FN7491 Rev 7.00
February 4, 2016
Page 17 of 18
EL5178, EL5378
Shrink Small Outline Plastic Packages (SSOP)
Quarter Size Outline Plastic Packages (QSOP)
M28.15
N
INDEX
AREA
28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE
(0.150” WIDEBODY)
0.25(0.010)
M
B M
H
E
GAUGE
PLANE
INCHES
MIN
MILLIMETERS
-B-
SYMBOL
MAX
0.069
0.010
0.061
0.012
0.010
0.394
0.157
MIN
1.35
0.10
-
MAX
1.75
0.25
1.54
0.30
0.25
10.00
3.98
NOTES
A
A1
A2
B
0.053
0.004
-
-
1
2
3
-
L
0.25
0.010
SEATING PLANE
A
-
-A-
0.008
0.007
0.386
0.150
0.20
0.18
9.81
3.81
9
D
h x 45°
C
-
-C-
D
3
E
4
A2
e
A1
C
e
0.025 BSC
0.635 BSC
-
B
0.10(0.004)
0.228
0.0099
0.016
0.244
0.0196
0.050
5.80
0.26
0.41
6.19
0.49
1.27
-
H
0.17(0.007) M
C
A M B S
5
h
NOTES:
L
6
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2
of Publication Number 95.
N
28
28
7
0°
8°
0°
8°
-
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
Rev. 1 6/04
3. Dimension “D” does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch)
per side.
5. The chamfer on the body is optional. If it is not present, a visual in-
dex feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “B” does not include dambar protrusion. Allowable dam-
bar protrusion shall be 0.10mm (0.004 inch) total in excess of “B”
dimension at maximum material condition.
10. Controlling dimension: INCHES. Converted millimeter dimensions
are not necessarily exact.
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For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7491 Rev 7.00
February 4, 2016
Page 18 of 18
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