EL8172FSZ [RENESAS]
Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers; SOIC8; Temp Range: -40° to 125°C;
| 型号： | EL8172FSZ |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers; SOIC8; Temp Range: -40° to 125°C 放大器 光电二极管 |
| 文件： | 总14页 (文件大小：998K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
EL8171, EL8172
Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers
FN6293
Rev 6.00
October 9, 2015
The EL8171 and EL8172 are micropower instrumentation
amplifiers optimized for single supply operation over the
Features
• 95µA maximum supply current
+2.4V to +5.5V range. Inputs and outputs can operate
rail-to-rail. As with all instrumentation amplifiers, a pair of
inputs provide very high common-mode rejection and are
completely independent from a pair of feedback terminals.
The feedback terminals allow zero input to be translated to
any output offset, including ground. A feedback divider
controls the overall gain of the amplifier.
• Maximum input offset voltage
- 300µV (EL8172)
- 1500µV (EL8171)
• 50pA maximum input bias current
• 450kHz -3dB bandwidth (G = 10)
• 170kHz -3dB bandwidth (G = 100)
The EL8172 is compensated for a gain of 100 or more, and
the EL8171 is compensated for a gain of 10 or more. The
EL8171 and EL8172 have PMOS input devices that provide
sub-nA input bias currents.
• Single supply operation
- Input voltage range is rail-to-rail
- Output swings rail-to-rail
- Ground sensing
The amplifiers can be operated from one lithium cell or two
Ni-Cd batteries. The EL8171 and EL8172 input range goes
from below ground to slightly above positive rail. The output
stage swings completely to ground (ground sensing) or
positive supply - no pull-up or pull-down resistors are
needed.
• Pb-free (RoHS compliant)
Applications
• Battery- or solar-powered systems
• Strain gauges
Pinout
• Current monitors
EL8171, EL8172
(8 LD SOIC)
TOP VIEW
• Thermocouple amplifiers
Ordering Information
+
DNC
IN-
1
2
3
4
8
7
6
5
FB+
V+
-
PART
-
NUMBER
(Note)
PART
MARKING
PACKAGE
(Pb-free)
PKG.
DWG. #
+
IN+
V-
VOUT
FB-
EL8171FSZ*(No 8171FSZ
longer available,
recommended
8 Ld SOIC
MDP0027
replacement:
EL8170FSZ-T7)
EL8172FSZ*
8172FSZ
8 Ld SOIC
MDP0027
*Add “-T7” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations). Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
FN6293 Rev 6.00
October 9, 2015
Page 1 of 14
EL8171, EL8172
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
+
Thermal Resistance
(°C/W)
122
JA
Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage (EL8172) . . . . . . . . . . . . . . . . . . . . . . 0.5V
Differential Input Voltage (EL8171) . . . . . . . . . . . . . . . . . . . . . . 1.0V
ESD Rating
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature . . . . . . . . . . . . . . .-40°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications
V = +5V, V- = GND, VCM = 1/2V , R = Open, T = +25°C, unless otherwise specified. Boldface limits apply
+ + L A
over the operating temperature range, -40°C to +125°C.
MIN
MAX
PARAMETER
DESCRIPTION
CONDITIONS
(Note 1)
TYP
(Note 1) UNIT
DC SPECIFICATIONS
V
Input Offset Voltage
EL8171
EL8172
-1.5
-2
±0.47
±0.07
1.5
2
mV
mV
OS
-0.3
0.3
-0.7
0.7
TCV
Input Offset Voltage Temperature
Coefficient
EL8171
EL8172
1.5
0.14
±4
µV/°C
µV/°C
OS
I
I
Input Offset Current, ± IN, ± FB
Input Bias Current
-25
-500
25
500
pA
pA
OS
B
-50
-4
±10
50
4
pA
nA
V
Input Voltage Range
Guaranteed by CMRR test
0
75
5
V
IN
CMRR
PSRR
Common Mode Rejection Ratio
Power Supply Rejection Ratio
V
= 0V to +5V
100
90
dB
dB
dB
%
CM
EL8171, V = 2.4V to 5V
75
+
EL8172, V = 2.4V to 5V
75
100
+
E
V
Gain Error
EL8171, R = 100k to 2.5V
-0.7
±0.15
±0.2
0.7
G
L
EL8172, R = 100k to 2.5V
-1
-1.5
+1
1.5
%
%
L
Maximum Voltage Swing
Output low, 100k to 2.5V
Output low, 1k to 2.5V
Output high, 100k to 2.5V
Output high, 1k to GND
4
10
10
mV
mV
OUT
0.13
4.996
4.87
65
0.2
0.25
V
V
4.985
4.980
V
V
4.860
4.750
V
V
I
Supply Current
45
95
µA
S
38
110
V
Supply Operating Range
V+ to V-
2.4
5.5
V
SUPPLY
I
Output Source Current into 10 to V /2
V
= 5V
23
19
32
8
mA
O+
+
+
V
= 2.4V
6
mA
+
4.5
FN6293 Rev 6.00
October 9, 2015
Page 2 of 14
EL8171, EL8172
Electrical Specifications
V = +5V, V- = GND, VCM = 1/2V , R = Open, T = +25°C, unless otherwise specified. Boldface limits apply
+ + L A
over the operating temperature range, -40°C to +125°C. (Continued)
MIN
MAX
PARAMETER
DESCRIPTION
Output Sink Current into 10 to V /2
CONDITIONS
(Note 1)
TYP
(Note 1) UNIT
I
V
V
= 5V
19
15
26
mA
O-
+
+
+
= 2.4V
5
7
mA
4
AC SPECIFICATIONS
-3dB BW -3dB Bandwidth
EL8171
EL8172
Gain = 10V/V
Gain = 20
450
210
66
kHz
kHz
kHz
kHz
kHz
kHz
kHz
kHz
Gain = 50
Gain = 100
Gain = 100
Gain = 200
Gain = 500
Gain = 1000
f = 0.1Hz to 10Hz
33
170
70
25
12
e
Input Noise Voltage
EL8171
EL8172
EL8171
EL8172
14
µV
µV
N
P-P
P-P
10
Input Noise Voltage Density
Input Noise Current Density
f = 1kHz
220
80
nV/Hz
nV/Hz
pA/Hz
pA/Hz
dB
o
i
EL8171, f = 1kHz
0.9
0.2
85
N
o
EL8172, f = 1kHz
o
CMRR @ 60Hz Input Common Mode Rejection Ratio
EL8171
EL8172
EL8171
EL8172
V
R
= 1V
,
PP
CM
= 10kto V
L
CM
100
90
dB
PSRR+ @
120Hz
Power Supply Rejection Ratio (V )
V , V = ±2.5V,
dB
+
+
-
V
= 1V ,
SOURCE
= 10kto V
PP
92
dB
R
L
CM
PSRR- @
120Hz
Power Supply Rejection Ratio (V )
EL8171
EL8172
V , V = ±2.5V,
97
92
dB
dB
-
+
-
V
= 1V ,
SOURCE
= 10kto V
PP
R
L
CM
TRANSIENT RESPONSE
SR
Slew Rate
R
= 1k to GND
0.4
0.55
0.7
V/µs
L
0.35
0.7
NOTES:
1. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
FN6293 Rev 6.00
October 9, 2015
Page 3 of 14
EL8171, EL8172
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, R = Open, unless otherwise specified.
+
-
CM
L
70
60
50
40
30
20
10
90
80
70
60
50
40
30
COMMON-MODE INPUT = 1/2V+
COMMON-MODE INPUT = 1/2V+
GAIN = 10,000
GAIN = 5,000
GAIN = 1000
GAIN = 500
GAIN = 200
GAIN = 100
GAIN = 50
GAIN = 2,000
GAIN = 1,000
GAIN = 500
GAIN = 20
GAIN = 10
GAIN = 200
GAIN = 100
1
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 1. EL8171 FREQUENCY RESPONSE vs CLOSED
LOOP GAIN
FIGURE 2. EL8172 FREQUENCY RESPONSE vs CLOSED
LOOP GAIN
25
20
45
40
V
= 5V
+
35
30
25
20
15
10
5
V
= 5V
+
V
= 2.4V
15
10
+
V
= 2.4V
+
A
R
C
= 100
= 10k
= 10pF
A
R
C
= 10
= 10k
= 10pF
V
L
L
F
F
G
V
L
L
F
F
G
5
0
R /R = 100
R
R
R /R = 10
R
R
G
G
= 10k
= 1k
= 100
= 100
0
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 3. EL8171 FREQUENCY RESPONSE vs SUPPLY
VOLTAGE
FIGURE 4. EL8172 FREQUENCY RESPONSE vs SUPPLY
VOLTAGE
50
25
820pF
470pF
2200pF
1200pF
45
40
35
30
25
20
220pF
15
100pF
820pF
56pF
A
= 10
A
= 10
V
V
R = 10k
R = 10k
C
R /R = 10
R
R
10
5
= 10pF
C
L
= 10pF
L
R /R = 10
F
F
G
G
F
F
G
G
R
R
= 10k
= 10k
= 100
= 100
10
10
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. EL8171 FREQUENCY RESPONSE vs C
FIGURE 6. EL8172 FREQUENCY RESPONSE vs C
LOAD
LOAD
FN6293 Rev 6.00
October 9, 2015
Page 4 of 14
EL8171, EL8172
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
+
-
CM
L
120
100
80
60
40
20
0
90
80
70
60
50
40
30
A
= 10
A = 100
V
V
20
10
0
-10
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 8. EL8172 CMRR vs FREQUENCY
FIGURE 7. EL8171 CMRR vs FREQUENCY
120
120
100
80
60
40
20
0
100
80
60
40
20
0
PSRR+
PSRR+
PSRR-
PSRR-
A
= 10
100
V
A
= 10
100
V
10
1k
10k
100k
1M
10
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 9. EL8171 PSRR vs FREQUENCY
FIGURE 10. EL8172 PSRR vs FREQUENCY
1400
1200
1000
800
600
400
200
0
700
600
500
400
300
200
100
0
A
= 10
100
V
A
= 100
V
1
10
1k
10k
100k
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 11. EL8171 VOLTAGE NOISE SPECTRAL DENSITY
FIGURE 12. EL8172 VOLTAGE NOISE SPECTRAL DENSITY
FN6293 Rev 6.00
October 9, 2015
Page 5 of 14
EL8171, EL8172
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
+
-
CM
L
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
6
5
4
3
2
1
0
A
= 100
V
A
= 10
V
1
10
100
1k
10k
100k
10k
1
10
100
1k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 13. EL8171 CURRENT NOISE SPECTRAL DENSITY
FIGURE 14. EL8172 CURRENT NOISE SPECTRAL DENSITY
TIME (1s/DIV)
TIME (1s/DIV)
FIGURE 15. EL8171 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
(GAIN = 10)
FIGURE 16. EL8172 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
(GAIN = 100)
80
90
N = 1500
85
N = 1000
75
MAX
80
MAX
70
75
65
60
55
50
45
40
MEDIAN
70
MEDIAN
65
60
MIN
MIN
55
50
45
40
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 17. EL8171 SUPPLY CURRENT vs TEMPERATURE,
V , V = ±2.5V, V = 0V
FIGURE 18. EL8172 SUPPLY CURRENT vs TEMPERATURE,
V , V = ±2.5V, V = 0V
+
-
IN
+
-
IN
FN6293 Rev 6.00
October 9, 2015
Page 6 of 14
EL8171, EL8172
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
+
-
CM
L
2.5
2.0
1.5
1.0
0.5
0
0.7
N = 1000
N = 1500
0.5
MAX
MAX
0.3
0.1
MEDIAN
MEDIAN
-0.1
-0.3
-0.5
-0.7
-0.5
-1.0
-1.5
-2.0
MIN
40
MIN
80
-40
-20
0
20
40
60
100 120
-40
-20
0
20
60
80
100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 19. EL8171 V
vs TEMPERATURE, V , V = ±2.5V,
FIGURE 20. EL8172 V
vs TEMPERATURE, V , V = ±2.5V,
OS
+
-
OS
+
-
V
= 0V
V
= 0V
IN
IN
0.9
0.7
2.5
2.0
1.5
1.0
0.5
0
N = 1000
N = 1500
MAX
0.5
MAX
0.3
MEDIAN
0.1
MEDIAN
-0.5
-1.0
-1.5
-2.0
-2.5
-0.1
-0.3
-0.5
-0.7
MIN
60
MIN
40
-40
-20
0
20
40
80
100 120
-40
-20
0
20
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 21. EL8171 V
vs TEMPERATURE, V , V = ±1.2V,
FIGURE 22. EL8172 V
vs TEMPERATURE, V , V = ±1.2V,
OS
+
-
OS
+
-
V
= 0V
V
= 0V
IN
IN
140
130
120
110
100
90
140
130
120
110
100
90
N = 1500
N = 1000
MAX
MAX
MEDIAN
MEDIAN
MIN
40
TEMPERATURE (°C)
MIN
40
TEMPERATURE (°C)
80
80
-40
-20
0
20
60
80
100
120
-40
-20
0
20
60
80
100
120
FIGURE 24. EL8172 CMRR vs TEMPERATURE,
= +2.5V TO -2.5V, V , V = ±2.5V
FIGURE 23. EL8171 CMRR vs TEMPERATURE,
= +2.5V TO -2.5V, V , V = ±2.5V
V
V
CM
+
-
CM
+
-
FN6293 Rev 6.00
October 9, 2015
Page 7 of 14
EL8171, EL8172
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
+
-
CM
L
140
130
120
110
100
90
140
130
120
110
100
90
N = 1500
N = 1000
MAX
MAX
MEDIAN
MIN
MEDIAN
MIN
80
80
70
70
60
60
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 25. EL8171 PSRR vs TEMPERATURE,
V , V = ±1.2V TO ±2.5V
FIGURE 26. EL8172 PSRR vs TEMPERATURE,
V , V = ±1.2V TO ±2.5V
+
-
+
-
1.5
1.3
1.1
0.9
0.7
0.5
0.3
0.1
-0.1
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
N = 1000
N = 1500
MAX
MAX
MEDIAN
MEDIAN
MIN
MIN
-0.1
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 27. EL8171% GAIN ERROR vs TEMPERATURE,
= 100k
FIGURE 28. EL8172% GAIN ERROR vs TEMPERATURE,
= 100k
R
R
L
L
4.91
4.90
4.89
4.88
4.87
4.86
4.85
4.84
4.83
4.91
4.90
4.89
4.88
4.87
4.86
4.85
4.84
4.83
N = 1000
N = 1500
MAX
MAX
MEDIAN
MEDIAN
MIN
MIN
80
-40
-20
0
20
40
60
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 29. EL8171 V
HIGH vs TEMPERATURE,
FIGURE 30. EL8172 V
HIGH vs TEMPERATURE,
OUT
= 1k, V , V = ±2.5V
OUT
R = 1k, V , V = ±2.5V
L
R
L
+
-
+
-
FN6293 Rev 6.00
October 9, 2015
Page 8 of 14
EL8171, EL8172
Typical Performance Curves V = 5V, V = 0V,V = 2.5V, R = Open, unless otherwise specified. (Continued)
+
-
CM
L
180
170
160
150
140
130
120
110
100
90
200
180
160
140
120
100
80
N = 1000
N = 1000
MAX
MAX
MEDIAN
MEDIAN
MIN
MIN
-40
-20
0
20
40
60
80
100 120
-40
-20
0
20
40
60
80
100
120
120
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 32. EL8172 V
LOW vs TEMPERATURE,
FIGURE 31. EL8171 V
LOW vs TEMPERATURE,
OUT
= 1k, V , V = ±2.5V
OUT
= 1k, V , V = ±2.5V
R
R
L
+
-
L
+
-
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.60
0.58
0.56
0.54
0.52
0.50
0.48
0.46
0.44
0.42
0.40
MAX
N = 1500
MAX
N = 1000
MEDIAN
MEDIAN
MIN
MIN
-40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 33. EL8171 +SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V @ GAIN + 100
FIGURE 34. EL8172 +SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V @ GAIN + 100
0.65
0.70
N = 1000
MAX
N = 1500
MAX
0.65
0.60
0.60
MEDIAN
0.55
0.55
0.50
0.45
0.40
MEDIAN
0.50
0.45
MIN
0.40
MIN
0.35
0.30
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 36. EL8172 -SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V @ GAIN + 100
FIGURE 35. EL8171 -SLEW RATE vs TEMPERATURE,
INPUT = ±0.015V @ GAIN + 100
FN6293 Rev 6.00
October 9, 2015
Page 9 of 14
EL8171, EL8172
Pin Descriptions
EL8171/EL8172
PIN NAME
EQUIVALENT CIRCUIT
PIN FUNCTION
1
2
3
DNC
IN-
Do Not Connect; Internal connection - Must be left floating.
Circuit 1A, Circuit 1B
Circuit 1A, Circuit 1B
High impedance input terminals. EL8172 input circuit is shown in Circuit 1A, and
the EL8171 input circuit is shown in Circuit 1B. EL8171: to avoid offset drift, it is
recommended that the terminals are not overdriven beyond 1V and the input
current must never exceed 5mA.
IN+
4
5
8
V-
Circuit 3
Negative supply terminal.
FB-
FB+
Circuit 1A, Circuit 1B
Circuit 1A, Circuit 1B
High impedance feedback terminals. EL8172 input circuit is shown in Circuit 1A,
and the EL8171 input circuit is shown in Circuit 1B. EL8171: to avoid offset drift, it
is recommended that the terminals are not overdriven beyond 1V and the input
current must never exceed 5mA.
7
6
V+
Circuit 3
Circuit 2
Positive supply terminal.
Output Voltage.
VOUT
V+
V+
V-
V+
V+
CAPACITIVELY
COUPLED
ESD CLAMP
IN+
FB+
IN+
FB+
IN-
FB-
IN-
FB-
OUT
V-
V-
V-
CIRCUIT 1A
CIRCUIT 2
CIRCUIT 3
CIRCUIT 1B
voltages at lower gain applications. It is recommended however,
that the input terminals of the EL8171 are not overdriven beyond
1V to avoid offset drift. An external series resistor may be used as
an external protection to limit excessive external voltage and
current from damaging the inputs.
Description of Operation and Application
Information
Product Description
The EL8171 and EL8172 are micropower instrumentation
amplifiers (in-amps) which deliver rail-to-rail input amplification
Input Stage and Input Voltage Range
and rail-to-rail output swing on a single 2.4V to 5.5V supply. The
EL8171 and EL8172 also deliver excellent DC and AC
specifications while consuming only 65µA typical supply current.
Because EL8171 and EL8172 provide an independent pair of
feedback terminals to set the gain and to adjust the output level,
these in-amps achieve high common-mode rejection ratio
regardless of the tolerance of the gain setting resistors. The
EL8171 is internally compensated for a minimum closed loop gain
of 10 or greater, well suited for moderate to high gains. For higher
gains, the EL8172 is internally compensated for a minimum gain
of 100.
The input terminals (IN+ and IN-) of the EL8171 and EL8172
are single differential pair P-MOSFET devices aided by an
Input Range Enhancement Circuit (IREC) to increase the
headroom of operation of the common-mode input voltage.
The feedback terminals (FB+ and FB-) also have a similar
topology. As a result, the input common-mode voltage range of
both the EL8171 and EL8172 is rail-to-rail. These in-amps are
able to handle input voltages that are at or slightly beyond the
supply and ground making these in-amps well suited for single
5V or 3.3V low voltage supply systems. There is no need to
move the common-mode input of the in-amps to achieve
symmetrical input voltage.
Input Protection
All input and feedback terminals of the EL8171 and EL8172 have
internal ESD protection diodes to both positive and negative
supply rails, limiting the input voltage to within one diode drop
beyond the supply rails. The inverting inputs and FB- inputs have
ESD diodes to the V-rail, and the non-inverting inputs and FB+
terminals have ESD diodes to the V+ rail. The EL8172 has
additional back-to-back diodes across the input terminals and
also across the feedback terminals. If overdriving the inputs is
necessary, the external input current must never exceed 5mA. On
the other hand, the EL8171 has no clamps to limit the differential
voltage on the input terminals allowing higher differential input
Output Stage and Output Voltage Range
A pair of complementary MOSFET devices drive the output
V
to within a few mV of the supply rails. At a 100k load,
OUT
the PMOS sources current and pulls the output up to 4mV
below the positive supply, while the NMOS sinks current and
pulls the output down to 4mV above the negative supply, or
ground in the case of a single supply operation. The current
sinking and sourcing capability of the EL8171 and EL8172 are
internally limited to less than 35mA.
FN6293 Rev 6.00
October 9, 2015
Page 10 of 14
EL8171, EL8172
Gain Setting
2.4V TO 5.5V
V
, the potential difference across IN+ and IN-, is replicated
IN
7
1
(less the input offset voltage) across FB+ and FB-. The
obsession of the EL8171 and EL8172 in-amp is to maintain the
differential voltage across FB+ and FB- equal to IN+ and IN-;
(FB+ - FB-) = (IN+ - IN-). Consequently, the transfer function
can be derived. The gain of the EL8171 and EL8172 is set by
VIN/2
VIN/2
V+
3
2
8
5
IN+
IN-
+
-
6
VOUT
EL8171/2
FB+
FB-
+
-
VCM
V-
4
two external resistors, the feedback resistor R , and the gain
2.4V TO 5.5V
F
resistor R .
G
R1
2.4V TO 5.5V
REF
R2
RG
RF
7
1
VIN/2
VIN/2
V+
3
2
8
5
IN+
IN-
+
-
FIGURE 38. CIRCUIT 2 - GAIN SETTING AND REFERENCE
CONNECTION
6
VOUT
EL8171/2
FB+
FB-
+
-
VCM
R
R
F
R
G
F
V-
4
(EQ. 2)
--------
--------
V
=
1 +
V + 1 +
V
REF
OUT
IN
R
G
susceptibility to external noise is reduced, however the VREF
source must be capable of sourcing or sinking the feedback
RG
RF
current from V
OUT
through R and R .
F
G
2.4V TO 5.5V
FIGURE 37. CIRCUIT 1 - GAIN IS BY EXTERNAL RESISTORS
R
AND R
F
G
7
1
VIN/2
R
V+
3
IN+
IN-
F
(EQ. 1)
--------
V
=
1 +
V
+
OUT
IN
R
G
2
8
5
-
VIN/2
6
VOUT
EL8171/2
FB+
FB-
In Figure 37, the FB+ pin and one end of resistor RG are
connected to GND. With this configuration, Equation 1 is only
true for a positive swing in V ; negative input swings will be
+
-
VCM
V-
4
IN
ignored and the output will be at ground.
Reference Connection
RG
RF
Unlike a three-op amp instrumentation amplifier, a finite series
resistance seen at the REF terminal does not degrade the
EL8171 and EL8172's high CMRR performance, eliminating
the need for an additional external buffer amplifier. Circuit 2
(Figure 38) uses the FB+ pin to provide a high impedance REF
terminal.
VREF
FIGURE 39. CIRCUIT 3 - REFERENCE CONNECTION WITH AN
AVAILABLE VREF
R
F
(EQ. 3)
--------
V
=
1 +
V + V
REF
OUT
IN
R
G
The FB+ pin is used as a REF terminal to center or to adjust
the output. Because the FB+ pin is a high impedance input, an
economical resistor divider can be used to set the voltage at
the REF terminal without degrading or affecting the CMRR
performance. Any voltage applied to the REF terminal will shift
External Resistor Mismatches
Because of the independent pair of feedback terminals provided
by the EL8171 and EL8172, the CMRR is not degraded by any
resistor mismatches. Hence, unlike a three op amp and especially
a two op amp in-amp, the EL8171 and EL8172 reduce the cost of
external components by allowing the use of 1% or more tolerance
resistors without sacrificing CMRR performance. The EL8171 and
EL8172 CMRR will be maintained regardless of the tolerance of
the resistors used.
V
by V
times the closed loop gain, which is set by
OUT
REF
resistors R and R . See Circuit 2 (Figure 38). Note that any
F
G
noise or unwanted signals on the reference supply will be
amplified at the output according to Equation 2.
The FB+ pin can also be connected to the other end of resistor,
Gain Error and Accuracy
R . See Circuit 3 (Figure 39). Keeping the basic concept that the
G
EL8171 and EL8172 in-amps maintain constant differential
voltage across the input terminals and feedback terminals (IN+ -
IN- = FB+ - FB-), the transfer function of Circuit 3 can be derived.
Note that the VREF gain term is eliminated and
The EL8172 has a Gain Error (EG) of 0.2% typical. The EL8171
has an EG of 0.15% typical. The gain error indicated in the
“Electrical Specifications” table on page 2 is the inherent gain
error of the EL8171 and EL8172 and does not include the gain
FN6293 Rev 6.00
October 9, 2015
Page 11 of 14
EL8171, EL8172
error contributed by the resistors. There is an additional gain
error due to the tolerance of the resistors used. The resulting
non-ideal transfer function effectively becomes:
where:
• P
is the sum of the maximum power dissipation
DMAXTOTAL
of each amplifier in the package (PD
)
MAX
R
F
• PD
MAX
Equation 7:
for each amplifier can be calculated as shown in
--------
V
=
1 +
1 – E
+ E
+ E V
RF G IN
(EQ. 4)
OUT
RG
R
G
V
OUTMAX
R
L
----------------------------
PD
= 2*V I
+ V - V
OUTMAX
Where:
MAX
S
SMAX
S
(EQ. 7)
E
E
E
= Tolerance of R
= Tolerance of R
RG
RF
G
G
where:
• T
F
= Maximum ambient temperature
= Gain Error of the EL8171 or EL8172
MAX
• = Thermal resistance of the package
The term [1-(E
RG
+E +E )] is the deviation from the
G
JA
• PD
RF
theoretical gain. Thus, (E
+E +E ) is the total gain error.
RG
RF
G
= Maximum power dissipation of 1 amplifier
MAX
For example, if 1% resistors are used for the EL8171, the total
• V = Supply voltage (Magnitude of V and V )
gain error would be:
S
+
-
= E
+ E
+ E typical
• I
= Maximum supply current of 1 amplifier
MAX
RG
RF
G
(EQ. 5)
= 0.01 + 0.01 + 0.003
= 2.3%
• V = Maximum output voltage swing of the
OUTMAX
application
• R = Load resistance
L
Power Dissipation
It is possible to exceed the +150°C maximum junction
temperatures under certain load and power-supply conditions.
It is therefore important to calculate the maximum junction
temperature (T
) for all applications to determine if power
JMAX
supply voltages, load conditions, or package type need to be
modified to remain in the safe operating area. These
parameters are related in Equation 6:
T
= T
+ xPD
MAXTOTAL
(EQ. 6)
JMAX
MAX
JA
FN6293 Rev 6.00
October 9, 2015
Page 12 of 14
EL8171, EL8172
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make
sure that you have the latest revision.
DATE
REVISION
CHANGE
October 9, 2015
FN6293.6
- Updated Ordering Information Table on page 1.
- Added Revision History.
- Added About Intersil Verbiage.
About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask.
Reliability reports are also available from our website at www.intersil.com/support.
© Copyright Intersil Americas LLC 2005-2007. All Rights Reserved.
All trademarks and registered trademarks are the property of their respective owners.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such
modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are
current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its
subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6293 Rev 6.00
October 9, 2015
Page 13 of 14
EL8171, EL8172
Small Outline Package Family (SO)
A
D
h X 45°
(N/2)+1
N
A
PIN #1
I.D. MARK
E1
E
c
SEE DETAIL “X”
1
(N/2)
B
L1
0.010 M
C A B
e
H
C
A2
A1
GAUGE
PLANE
SEATING
PLANE
0.010
L
4° ±4°
0.004 C
b
0.010 M
C
A
B
DETAIL X
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO)
INCHES
SO16
(0.150”)
SO16 (0.300”)
(SOL-16)
SO20
SO24
(SOL-24)
SO28
(SOL-28)
SYMBOL
SO-8
0.068
0.006
0.057
0.017
0.009
0.193
0.236
0.154
0.050
0.025
0.041
0.013
8
SO-14
0.068
0.006
0.057
0.017
0.009
0.341
0.236
0.154
0.050
0.025
0.041
0.013
14
(SOL-20)
0.104
0.007
0.092
0.017
0.011
0.504
0.406
0.295
0.050
0.030
0.056
0.020
20
TOLERANCE
MAX
NOTES
A
A1
A2
b
0.068
0.006
0.057
0.017
0.009
0.390
0.236
0.154
0.050
0.025
0.041
0.013
16
0.104
0.007
0.092
0.017
0.011
0.406
0.406
0.295
0.050
0.030
0.056
0.020
16
0.104
0.007
0.092
0.017
0.011
0.606
0.406
0.295
0.050
0.030
0.056
0.020
24
0.104
0.007
0.092
0.017
0.011
0.704
0.406
0.295
0.050
0.030
0.056
0.020
28
-
0.003
0.002
0.003
0.001
0.004
0.008
0.004
Basic
-
-
-
c
-
D
1, 3
E
-
E1
e
2, 3
-
L
0.009
Basic
-
L1
h
-
Reference
Reference
-
N
-
Rev. M 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994
FN6293 Rev 6.00
October 9, 2015
Page 14 of 14
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