EL8286IY

更新时间:2024-11-08 19:11:14
品牌:RENESAS
描述:OP-AMP, 1000uV OFFSET-MAX, 0.7MHz BAND WIDTH, PDSO10, MSOP-10

EL8286IY 概述

OP-AMP, 1000uV OFFSET-MAX, 0.7MHz BAND WIDTH, PDSO10, MSOP-10 运算放大器

EL8286IY 规格参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:MSOP包装说明:TSSOP, TSSOP10,.19,20
针数:10Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:5.92放大器类型:OPERATIONAL AMPLIFIER
架构:VOLTAGE-FEEDBACK最大平均偏置电流 (IIB):0.002 µA
25C 时的最大偏置电流 (IIB):0.002 µA标称共模抑制比:110 dB
频率补偿:YES最大输入失调电压:1000 µV
JESD-30 代码:S-PDSO-G10JESD-609代码:e0
长度:3 mm低-失调:NO
微功率:YES负供电电压上限:
标称负供电电压 (Vsup):功能数量:1
端子数量:10最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP10,.19,20
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240电源:5 V
认证状态:Not Qualified座面最大高度:1.1 mm
最小摆率:0.07 V/us标称压摆率:0.13 V/us
子类别:Operational Amplifiers最大压摆率:0.075 mA
供电电压上限:5.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BIPOLAR
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
标称均一增益带宽:700 kHz最小电压增益:200000
宽度:3 mmBase Number Matches:1

EL8286IY 数据手册

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EL8186  
®
Data Sheet  
January 11, 2005  
FN7455.1  
PRELIMINARY  
Micropower Single Supply Rail-to-Rail  
Input-Output Op Amp  
Features  
• 55µA supply current  
The EL8186 is a micropower operational amplifier optimized  
for single supply operation at 5V and can operate down to  
2.4V.  
• 400µV typical offset voltage  
• 500pA input bias current  
• 700kHz gain-bandwidth product  
• 0.13V/µs slew rate  
The EL8186 draws minimal supply current while meeting  
excellent DC-accuracy noise and output drive specifications.  
Competing devices seriously degrade these parameters to  
achieve micropower supply current. Offset current, voltage  
and current noise, slew rate, and gain-bandwidth product are  
all two to ten times better than on previous micropower op  
amps.  
• Single supply operation down to 2.4V  
• Rail-to-rail input and output  
• Output sources and sinks 26mA load current  
Applications  
The 1/f corner of the voltage noise spectrum is at 1kHz. This  
results in low frequency noise performance which can only  
be found on devices with an order of magnitude higher  
supply current.  
• Battery- or solar-powered systems  
• 4mA to 25mA current loops  
• Handheld consumer products  
• Medical devices  
The EL8186 can be operated from one lithium cell or two  
Ni-Cd batteries. The input range includes both positive and  
negative rail. The output swings to both rails.  
• Thermocouple amplifiers  
• Photodiode pre amps  
• pH probe amplifiers  
Ordering Information  
TAPE &  
PART NUMBER  
EL8186IW-T7  
PACKAGE  
REEL  
PKG. DWG. #  
MDP0038  
MDP0038  
MDP0043  
MDP0047  
Pinouts  
6-Pin SOT-23  
7” (3K pcs)  
EL8186  
(6-PIN SOT-23)  
TOP VIEW  
EL8186IW-T7A  
6-Pin SOT-23 7” (250 pcs)  
EL8286IY (Note) 10-Pin MSOP  
EL8286IL (Note) 10-Pin DFN  
-
-
OUT  
VS-  
IN+  
1
2
3
6
5
4
VS+  
NOTE: Contact factory for availability  
ENABLE  
IN-  
+
-
EL8286*  
(10-PIN MSOP, DFN)  
TOP VIEW  
INA+  
CEA  
VS-  
1
2
3
4
5
10 INA-  
-
+
9
8
7
6
OUTA  
VS+  
+
-
CEB  
INB+  
OUTB  
INB-  
*COMING SOON  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Intersil Americas Inc. 2004, 2005. All Rights Reserved  
1
All other trademarks mentioned are the property of their respective owners.  
EL8186  
Absolute Maximum Ratings (T = 25°C)  
A
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V  
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite  
Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C  
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C  
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V  
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V + 0.5V  
S
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests  
are at the specified temperature and are pulsed tests, therefore: T = T = T  
A
J
C
Electrical Specifications  
V
= 5V, 0V, V  
= 0.1V, V = 1.4V, T = 25°C unless otherwise specified.  
CM O A  
S
PARAMETER  
DESCRIPTION  
CONDITIONS  
MIN  
TYP  
0.4  
MAX  
UNIT  
mV  
V
Input Offset Voltage  
1
OS  
V  
Time  
Long Term Input Offset Voltage Stability  
Input Offset Drift vs Temperature  
TBD  
µV/Mo  
OS  
------------------  
V  
1.5  
µV/°C  
OS  
---------------  
T  
I
Input Offset Current  
0.4  
0.5  
25  
1.2  
2
nA  
nA  
OS  
B
I
Input Bias Current  
e
Input Noise Voltage Density  
Input Noise Current Density  
Input Voltage Range  
f
f
= 1KHz  
nV/Hz  
pA/Hz  
V
N
O
O
i
= 1KHz  
0.1  
N
CMIR  
CMRR  
PSRR  
Guaranteed by CMRR test  
0
5
Common-Mode Rejection Ratio  
Power Supply Rejection Ratio  
Large Signal Voltage Gain  
V
V
V
V
= 0V to 5V  
90  
110  
110  
500  
25  
dB  
CM  
= 2.4V to 5V  
90  
dB  
S
A
= 0.5V to 4.5V, R = 100kΩ  
200  
V/mV  
V/mV  
mV  
mV  
V
VOL  
O
O
L
= 0.5V to 4.5V, R = 1kΩ  
L
V
Maximum Output Voltage Swing  
Output low, R = 100kΩ  
3
6
OUT  
L
Output low, R = 1kΩ  
130  
4.997  
4.88  
0.13  
700  
55  
200  
L
Output high, R = 100kΩ  
4.994  
4.8  
L
Output high, R = 1kΩ  
V
L
SR  
Slew Rate  
0.07  
0.16  
V/µs  
kHz  
µA  
GBW  
Gain Bandwidth Product  
Supply Current, Enabled  
Supply Current, Disabled  
Short Circuit Output Current  
Short Circuit Output Current  
Minimum Supply Voltage  
Enable Pin High Level  
Enable Pin Low Level  
Enable Pin Input Current  
Enable Pin Input Current  
A
= 1  
V
I
I
40  
75  
10  
S,ON  
3
µA  
S,OFF  
I +  
R
R
= 10Ω  
= 10Ω  
18  
17  
31  
mA  
mA  
V
O
L
L
I -  
26  
O
V
V
V
2.2  
2.4  
2
S
V
INH  
INL  
ENH  
ENL  
0.8  
0.25  
-0.5  
V
I
I
V
V
= 5V  
= 0V  
0.7  
0
2
µA  
EN  
EN  
+0.5  
µA  
FN7455.1  
2
January 11, 2005  
EL8186  
Typical Performance Curves  
8
45  
40  
35  
30  
25  
20  
15  
10  
5
4
V =±1.0V  
S
V =±1.25V  
S
0
-4  
-8  
V =±2.5V  
S
V =±2.5V  
S
A =100  
V
R =10k  
A =1  
V
V =±1.25V  
S
L
C =2.7pF  
L
R =10kΩ  
L
R /R =99.02  
V =±1.0V  
C =2.7pF  
L
F
G
S
R =221kΩ  
R =100Ω  
F
F
G
R
=2.23kΩ  
R
=OPEN  
1K  
G
0
100  
10K  
100K  
1M  
10M  
100  
1K  
10K  
FREQUENCY (Hz)  
100K  
1M  
FREQUENCY (Hz)  
FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGE  
FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE  
60  
50  
40  
30  
20  
10  
0
140  
120  
100  
80  
60  
40  
20  
0
-20  
-40  
-60  
-80  
100  
80  
60  
40  
20  
0
-20  
-40  
-60  
-80  
-100  
-120  
2
2.5  
3
3.5  
4
4.5  
5
5.5  
1
10  
100  
1K  
10K 100K 1M  
10M  
SUPPLY VOLTAGE (V)  
FREQUENCY (Hz)  
FIGURE 3. SUPPLY CURRENT vs SUPPLY VOLTAGE  
200  
FIGURE 4. OPEN LOOP GAIN + PHASE vs FREQUENCY  
0
V
=V /2  
CM DD  
150  
100  
50  
A =-1  
V
-20  
V
, µV  
OS  
-40  
-60  
V
V
=5V  
DD  
0
=2.5V  
-50  
DD  
-100  
-150  
-200  
-80  
-100  
0
1
2
3
4
5
0
1
2
3
4
5
OUTPUT VOLTAGE (V)  
COMMON-MODE INPUT VOLTAGE (V)  
FIGURE 5. INPUT OFFSET VOLTAGE vs OUTPUT VOLTAGE  
FIGURE 6. INPUT OFFSET VOLTAGE vs COMMON-MODE  
INPUT VOLTAGE  
FN7455.1  
January 11, 2005  
3
EL8186  
Typical Performance Curves  
JEDEC JESD51-3 LOW EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
10K  
0.45  
0.4  
391mW  
0.35  
0.3  
1K  
100  
10  
I +  
B
0.25  
0.2  
I
I -  
B
OS  
0.15  
0.1  
0.05  
0
1
0
1
2
3
4
5
0
25  
50  
75 85 100  
125  
150  
COMMON-MODE INPUT VOLTAGE (V)  
AMBIENT TEMPERATURE (°C)  
FIGURE 7. INPUT BIAS + OFFSET CURRENTS vs COMMON-  
MODE INPUT VOLTAGE  
FIGURE 8. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL  
CONDUCTIVITY TEST BOARD  
0.5  
435mW  
0.45  
0.4  
0.35  
0.3  
0.25  
0.2  
0.15  
0.1  
0.05  
0
0
25  
50  
75 85 100  
125  
150  
AMBIENT TEMPERATURE (°C)  
FIGURE 9. PACKAGE POWER DISSIPATION vs AMBIENT  
TEMPERATURE  
FN7455.1  
January 11, 2005  
4
EL8186  
Charge Pump  
Applications Information  
The EL8186 has a built-in charge pump to increase the input  
range up to the positive supply rail. The charge pump  
provides an internal supply voltage to bias the input stage  
enabling a ground-sensing configuration to swing from  
Introduction  
The EL8186 is a rail-to-rail micropower operational amplifier.  
The device eliminates concerns introduced by traditional rail-  
to-rail I/O operation making it ideal for portable and single-  
supply design.  
ground to V  
.
DD  
The charge pump, operating at around 3MHz, is transparent  
to the user. The EL8186 is adequately bypassed inside the  
chip and will perform quietly. There is no need for a  
dedicated external bypass capacitor, minimizing  
components.  
Rail-to-Rail Input Stage  
The EL8186 achieves rail-to-rail input operation without  
introducing errors or degrading performance. The EL8186  
has a single differential-pair bipolar PNP input stage  
(ground-sensing amplifier) aided by a charge pump to  
increase upper common-mode range amplification up to the  
positive rail. The PNP differential pair remains active  
throughout the entire input common-mode voltage range  
eliminating a drastic shift in offset voltage and offset current  
as the common-mode approaches either rail. Since there is  
no common-mode threshold crossover, unlike a  
Enable/Disable Feature  
The EL8186 offers an EN pin. The active low enable pin  
disables the device when pulled up to at least 2.2V. Upon  
disable the part consumes typically 3µA, while the output is  
in a high impedance state. The EN also has an internal pull  
down. If left open, the EN will pull to negative rail and the  
device will be enabled by default.  
conventional paralleled PNP and NPN rail-to-rail input stage  
amplifier, the EL8186's offset voltage, and input offset  
current exhibit an undistorted and smooth behavior over the  
common-mode input range.  
Rail-to-Rail Output Stage  
A pair of complementary MOSFET devices achieves rail-to-  
rail output swing. The NMOS sinks current to swing the  
output in the negative direction. The PMOS sources current  
to swing the output in the positive direction. The EL8186 with  
a 100kload will swing to within 3mV of the supply rails.  
In general, bipolar amplifiers have higher bias currents if  
intended for high-speed operation. The bipolar PNP input  
bias currents of the EL8186 are decimated down to a typical  
of 500pA while maintaining an excellent bandwidth for a  
micropower operational amplifier. Inside the EL8186 is an  
input bias cancelling circuit. The transistors are still biased  
with an adequate current for speed but the cancelling circuit  
sinks most of the base current, leaving a small fraction for  
input bias current.  
The EL8186's ground-sensing input amplifier takes  
advantage of many slew-rate-enhancing techniques that  
cannot be implemented to an amplifier with a dual pair rail-  
to-rail input. Hence, compared to other operational amplifiers  
with a dual pair rail-to-rail input with comparable supply  
currents, the EL8186 slew rates are several times faster.  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN7455.1  
5
January 11, 2005  

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