GRM1555C1H2N20J [RENESAS]
RF Amplifier 1.7GHz to 2.2GHz;
| 型号： | GRM1555C1H2N20J |
| 厂家： | 
RENESAS TECHNOLOGY CORP |
| 描述： | RF Amplifier 1.7GHz to 2.2GHz |
| 文件： | 总17页 (文件大小：2463K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RF Amplifier
F1421
1.7GHz to 2.2GHz
Datasheet
Description
Features
The F1421 is a high gain / high linearity RF amplifier used in high-
performance RF applications. The F1421 provides 20.3dB gain
with a +40dBm OIP3 and 5.5dB noise figure at 1.9GHz. This device
uses a single 5V supply and 138mA of ICC.
.
.
.
.
.
.
.
.
Broadband 1.7GHz to 2.2GHz
20.3dB typical gain at 1.9GHz
5.5dB noise figure at 1.9GHz
+40dBm OIP3 at 1.9GHz
In typical base stations, RF amplifiers are used in the RX and TX
traffic paths to boost signal levels. The F1421 amplifier offers very
high reliability due to its construction using silicon die in a QFN
package.
+23dBm output P1dB at 1.9GHz
Single 5V supply voltage
ICC = 138mA
-40°C to +105°C operating temperature
.
50Ω single-ended input / output impedances
Typical Applications
.
.
Standby mode for power savings
4mm x 4mm, 24-pin QFN package
.
.
.
.
.
.
.
Multi-mode, multi-carrier transmitters
PCS1900 base stations
DCS1800 base stations
Block Diagram
Figure 1. Block Diagram
WiMAX and LTE base stations
UMTS/WCDMA 3G base stations
PHS/PAS base stations
Public safety infrastructure
Zero-DistortionTM
RFIN
RFOUT
STBY
VCC
1
Rev O May 11, 2018
Pin Assignments
Figure 2. Pin Assignments for 4mm x 4mm x 0.9mm QFN Package – Top View
1
18
17
16
15
14
13
NC
NC
NC
NC
NC
NC
NC
EPAD
2
3
4
5
6
NC
NC
GND
RFOUT
GND
Control Circuit
Pin Descriptions
Table 1.
Pin Descriptions
Number
Name
Description
1 - 7, 12,
16 - 20, 24
No internal connection. These pins can be left unconnected, have a voltage applied, or be connected to
ground (recommended).
NC
Standby (HIGH = device power OFF, LOW/Open = device power ON). Internally this pin has a pull-down
resistor that is connected to GND.
8
STBY
9
RSET
RDSET
VCC
Amplifier bias current setting resistor. Connect a 2.26kΩ resistor to ground.
Amplifier second bias current setting resistor. Connect a 5.76kΩ resistor to ground.
Power supply for the amplifier.
10
11
13, 15, 21,
23
GND
RFOUT
RFIN
Internally grounded. These pins must be grounded as close to the device as possible.
RF output. Must use an external DC block as close to the pin as possible.
14
RF input internally matched to 50Ω. Must use an external DC block. The DC block should be placed as
close to the pin as possible for best RF performance.
22
Exposed paddle. Internally connected to ground. Solder this exposed paddle to a printed circuit board
(PCB) pad that uses multiple ground vias to provide heat transfer out of the device into the PCB ground
planes. These multiple ground vias are also required to achieve the specified RF performance.
– EPAD
2
Rev O May 11, 2018
Absolute Maximum Ratings
The absolute maximum ratings are stress ratings only. Stresses greater than those listed below can cause permanent damage to the device.
Functional operation of the F1421 at absolute maximum ratings is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Table 2.
Absolute Maximum Ratings
Parameter
Symbol
Minimum
Maximum
Units
Supply Voltage
VCC
VSTBY
VRFIN
-0.3
-0.3
+5.5
VCC + 0.25
+0.3
V
V
STBY
RFIN Externally Applied DC Voltage
RFOUT Externally Applied DC voltage
Maximum RF CW Input Power
Continuous Power Dissipation
Junction Temperature
-0.3
V
VRFOUT
PMAX_IN
PDISS
VCC - 0.15
VCC + 0.15
+18
V
dBm
W
1.5
TJMAX
TSTOR
TLEAD
+150
°C
°C
°C
Storage Temperature Range
Lead Temperature (soldering, 10s)
-65
+150
+260
Electrostatic Discharge – HBM
(JEDEC/ESDA JS-001-2012)
2000
(Class 2)
VESDHMB
VESDCDM
V
V
Electrostatic Discharge – CDM
(JEDEC 22-C101F)
500
(Class C2)
3
Rev O May 11, 2018
Recommended Operating Conditions
Table 3.
Recommended Operating Conditions
Parameter
Symbol
Condition
Minimum
Typical
Maximum
Units
Supply Voltage
VCC
TEP
fRF
4.75
-40
5.25
+105
2.2
V
Operating Temperature Range
RF Frequency Range
Exposed Paddle
°C
Operating Range
1.7
GHz
Maximum Operating Input
RF Power [a]
PIN_MAX
+10
dBm
RF Source Impedance
RF Load Impedance
ZRFI
Single Ended
Single Ended
50
50
Ω
Ω
ZRFO
[a] Input / output load impedance < 2:1 VSWR any phase based in a 50Ω system.
4
Rev O May 11, 2018
Electrical Characteristics
See the F1421 Typical Application Circuit. Specifications apply when operated at VCC = +5.0V, fRF = 1.9GHz, TEP = +25°C, ZS = ZL = 50, tone
spacing = 5MHz, POUT = +4dBm/tone, evaluation board (EVKit) traces and connectors are de-embedded, unless otherwise stated.
Table 4.
Electrical Characteristics
Parameter
Symbol
Condition
Minimum
Typical
Maximum
Units
1.1 [a]
Logic Input High Threshold
Logic Input Low Threshold
Logic Current
VIH
VIL
VCC
0.8
10
V
V
IIL, IIH,
ICC
ICC_STBY
G1.7
Standby Pin
µA
mA
mA
-10
Standby = LOW or open
Standby = HIGH
fRF = 1.7GHz
138
0.6
153
1.2
Supply Current
19.6
20.3
21.0
15
Gain
G1.9
fRF = 1.9GHz
dB
18.8
21.8
G2.2
fRF = 2.2GHz
Input Return Loss
Output Return Loss
Gain Flatness
RLIN
RLOUT
GFLAT
dB
dB
dB
15
fRF = 1.7GHz to 2.2GHz
1.3
In any 20MHz range over RF
Band
Gain Ripple
GRIPPLE
0.06
dB
fRF = 1.7GHz
5.6
5.5
5.6
6.3
fRF = 1.9GHz
Noise Figure
NF
dB
fRF = 2.2GHz
fRF = 1.9GHz, TEP =+105°C
POUT = +4dBm/tone
5MHz tone delta
Output Third Order Intercept Point
Output 1dB Compression
OIP3
40
23
dBm
dBm
36
21
OP1dB
50% STBY control to within
0.2dB of the on state final gain
value
Power ON Switching Time
tON
120
ns
ns
50% STBY control to 30dB
below on state gain value
Power OFF Switching Time
tOFF
80
[a] Specifications in the minimum/maximum columns that are shown in bold italics are guaranteed by test. Specifications in
these columns that are not shown in bold italics are guaranteed by design characterization.
5
Rev O May 11, 2018
Thermal Characteristics
Table 5.
Package Thermal Characteristics
Parameter
Symbol
Value
Units
Junction to Ambient Thermal Resistance
θJA
45
°C/W
Junction to Case Thermal Resistance
(Case is defined as the exposed paddle)
θJC-BOT
36
°C/W
Moisture Sensitivity Rating (Per J-STD-020)
MSL 1
Typical Operating Conditions (TOC)
.
.
.
.
.
.
.
.
Vcc = 5.0V
ZL = ZS = 50 Single Ended
fRF = 1.9GHz
TEP = 25ºC (All temperatures are referenced to the exposed paddle)
STBY = LOW (0V)
POUT = +4dBm/Tone
5MHz Tone Spacing
Evaluation Kit traces and connector losses are de-embedded
6
Rev O May 11, 2018
Typical Performance Characteristics
Figure 3. Gain vs Frequency
Figure 4. Reverse Isolation vs Frequency
25
20
15
10
5
-20
-25
-30
-35
-40
-45
-50
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Frequency (GHz)
Frequency (GHz)
Figure 5. Input Return Loss vs Frequency
Figure 6. Output Return Loss vs Frequency
0
0
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
-5
-10
-15
-20
-25
-30
-5
-10
-15
-20
-25
-30
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Frequency (GHz)
Frequency (GHz)
Figure 7. Gain vs Frequency
Figure 8. Stability vs Frequency
23
22
21
20
19
18
17
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
16
15
0.5
0.0
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Frequency (GHz)
Frequency (GHz)
7
Rev O May 11, 2018
Typical Performance Characteristics
Figure 9.
Output IP3 versus Frequency
Figure 10. Output P1dB versus Frequency
50
48
46
44
42
40
38
36
34
32
30
25
24
23
22
21
20
19
18
17
16
15
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6
1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6
Frequency (GHz)
Frequency (GHz)
Figure 11. Second Harmonic versus Frequency
Figure 12. Third Harmonic versus Frequency
-30
-30
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
+4.75 V / -40 C
+5.00 V / -40 C
+5.25 V / -40 C
+4.75 V / +25 C
+5.00 V / +25 C
+5.25 V / +25 C
+4.75 V / +105 C
+5.00 V / +105 C
+5.25 V / +105 C
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
-35
-40
-45
-50
-55
-60
-65
-70
-75
-80
-85
-90
1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6
1.4 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 2.4 2.5 2.6
Frequency (GHz)
Frequency (GHz)
Figure 13. Noise Figure versus Frequency
Figure 14. Standby Switching Speed
8.0
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
20
15
10
5
STBY OFF to ON
STBY ON to OFF
0
-5
RF Power is calculated by
20 log (Envelope of RF Voltage).
Voltage dynamic range limits power
dynamic range to about 30 dB.
-10
-15
-20
-25
-30
+4.75 V / -45 C
+5.00 V / -45 C
+5.25 V / -45 C
+4.75 V / +20 C
+5.00 V / +20 C
+5.25 V / +20 C
+4.75 V / +100 C
+5.00 V / +100 C
+5.25 V / +100 C
1.0
0.5
0.0
0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2
-20
0
20
40
60
80
100 120 140 160 180
Frequency (GHz)
Time (ns)
8
Rev O May 11, 2018
Evaluation Kit Picture
Note: The evaluation board is used for multiple devices.
Figure 15. Top View
Figure 16. Bottom View
9
Rev O May 11, 2018
Evaluation Kit / Applications Circuit
Figure 17. Electrical Schematic
10
Rev O May 11, 2018
Table 6.
Bill of Material (BOM)
Part Reference
QTY
Description
Manufacturer Part #
Manufacturer
C1
C4
C7
C8
C9
2
2
1
1
1
1
1
1
1
3
1
1
3
1
1
2.2pF ±0.1, 50V, C0G Ceramic Capacitor (0402)
4.0pF ±0.1, 50V, C0G Ceramic Capacitor (0402)
2pF ±0.1pF, 50V, C0G Ceramic Capacitor (0402)
1000pF ±5%, 50V, C0G Ceramic Capacitor (0402)
0.1µF ±10%, 16V, X7R Ceramic Capacitor (0402)
10µF ±20%, 16V, X6S Ceramic Capacitor (0603)
1.87kΩ ±1%, 1/10W, Resistor (0402)
5.11kΩ ±1%, 1/10W, Resistor (0402)
1kΩ ±1%, 1/10W, Resistor (0402)
GRM1555C1H2N20J
GRM1555C1H470J
GRM1555C1H2R0B
GRM1555C1H102J
GRM155R71C104K
GRM188C81C106M
ERJ-2RKF2001X
ERJ-2RKF3401X
ERJ-2RKF1001X
ERJ-2GE0R00X
961102-6404-AR
961103-6404-AR
142-0701-851
Murata
Murata
Murata
Murata
Murata
C10
Murata
R1
Panasonic
Panasonic
Panasonic
Panasonic
3M
R2
R3
C3, C6, R4
J4
0Ω Resistors (0402)
CONN HEADER VERT SGL 2 X 1 POS GOLD
CONN HEADER VERT SGL 3 X 1 POS GOLD
Edge Launch SMA (0.375 inch pitch ground, tab)
AMP
J5
3M
J1, J2, J3
U1
Emerson Johnson
IDT
F1421NLGK
Printed Circuit Board
F1420 EVKit REV 1
IDT
C2, C5
DNP
11
Rev O May 11, 2018
Evaluation Kit Operation
Power Supply Setup
Set up a power supply in the voltage range of 3.0V to 5.25V with the power supply output disabled. The voltage can be applied via one of the
following connections (see Figure 18):
.
.
J3 connector
J4 header connection (GND is the pin farthest away from the J4 label)
Figure 18. Power Supply Connections
Standby (STBY) Pin
The Evaluation Board has the ability to control the F1421 for standby operation. The logic voltage is applied to the J5 header connection as
shown in Figure 19.
To place the amplifier in the active mode (on) use one of these options:
.
.
.
Make no connections on J5
Apply a logic LOW signal to STBY (pin 2 of J5 or the middle pin).
Make a connection between pin 3 (GND) and pin 2 (STBY, the middle pin) of J5.
To place the amplifier in the standby mode (off), use one of these options:
.
.
Apply a logic HIGH signal to the STBY (pin 2 of J5 or the middle pin).
Make a connection between pin 1 (VCC) and pin 2 (STBY, the middle pin) of J5.
Figure 19. Standby Pin Connection
12
Rev O May 11, 2018
Power-On Procedure
Set up the voltage supplies and Evaluation Board as described in the "Power Supply Setup" section with the "Standby Pin” set for logic LOW.
.
.
Enable the power supply.
The STBY pin now can now be exercised.
Power-Off Procedure
.
Set the STBY pin to logic LOW.
.
Disable the power supply.
Application Information
The F1421 has been optimized for use in high-performance RF applications from 1.7GHz to 2.2GHz.
Standby Mode (STBY)
The F1421 has a standby pin which allows the amplifier to be turned off to decrease overall power requirements. The pin uses simple logic
levels and is compatible with both JEDEC 1.8V and JEDEC 3.3V logic. Table 7 lists the amplifier state for the logic. An internal pull-down resistor
causes the amplifier to default to the on state.
Table 7.
Standby Truth Table
STBY (pin 8)
Condition
LOW or Open
HIGH
Amplifier On
Amplifier Off
RSET and RDSET
The F1421 has been optimized for gain and intermodulation products by adjusting the bias resistors RSET and RDSET. For the optimized
setting, RSET (R1) is 1.87kΩ and RDSET (R2) is 5.11kΩ.
Power Supplies
The power supply pin should be bypassed with external capacitors to minimize noise and fast transients. Supply noise can degrade the noise
figure, and fast transients can trigger ESD clamps and cause them to fail. Supply voltage changes or transients should have a slew rate less
than 1V/20µs.
13
Rev O May 11, 2018
Control Pin Interface
If control signal integrity is a concern and clean signals cannot be guaranteed due to overshoot, undershoot, ringing, etc., the following circuit
at the input of each control pin is recommended. This applies to control pin 8 (STBY). Note the recommended resistor and capacitor values do
not necessarily match the EVKit BOM for the case of poor control signal integrity.
Figure 20. Control Pin Interface for Signal Integrity
1
2
3
4
5
6
18
17
16
15
14
13
EPAD
Control Circuit
4.7 kohm
STBY
2pF
Digital Pin Voltage and Resistance Values
Table 8 provides the open-circuit DC voltage referenced to ground and resistance value for the control pin listed.
Table 8.
Digital Pin Voltages and Resistance
Open Circuit
DC Voltage
Pin
Name
Internal Connection
8
STBY
0V
580kΩ resistor to ground
14
Rev O May 11, 2018
Package Drawings
The package outline drawings are appended at the end of this document and are accessible from the link below. The package information is
the most current data available.
https://www.idt.com/document/psc/nlnlg24p1-package-outline-40-x-40-mm-body-05-mm-pitch-qfn-epad-size-245-x-245-mm
Ordering Information
Orderable Part Number
Package
MSL Rating
Carrier Type
Temperature
F1421NLGK
F1421NLGK8
F1421EVBI
4mm x 4mm x 0.9mm 24-pin QFN
4mm x 4mm x 0.9mm 24-pin QFN
Evaluation Board
1
1
Tray
Reel
-40° to +105°C
-40° to +105°C
Marking Diagram
Line 1 and 2 are the part number.
Line 3 “ZA” is for die version.
IDTF14
21NLGK
ZA721FTG
Line 3 “721” is one digit for the year and week that the part was assembled.
Line 3 “FTG” denotes the production process.
15
Rev O May 11, 2018
Revision History
Revision
Revision Date
Description of Change
O
May 11, 2018
Initial Release.
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